High performance global positioning system receiver means and method

Claims

What is claimed is:

1. A high performance global positioning system receiver means for receiving transmitted signals from one or more global positioning satellites and deriving information therefrom used in calculating at least user three-dimensional position and velocity, said transmitted signals from said satellites containing a carrier wave at radio frequency, data regarding ranging information modulated on the carrier wave, and at least one code pseudo-randomly modulated to the carrier wave comprising:

a first circuit means including a transmitted signal receiving means, adapted for operative association with an antenna means, for receiving, amplifying and converting transmitted signals from analog to digital signals, said first circuit means comprising;

first filter means for selecting a predetermined frequency band signal of the transmitted signal;

first amplifying means for pre-amplifying the selected frequency band signal from the first filter means;

first frequency mixer means for mixing a first injection frequency into the selected frequency band signal to produce a first intermediate frequency signal;

second amplifying means for selectively amplifying the first intermediate frequency signal;

signal splitting means for directing the first intermediate frequency signal into first and second pathways;

a pair of second frequency mixer means, each mixing an identical but differently phased second injection frequency into said first and second parts of the first intermediate frequency signal to produce differently phased second intermediate frequency signals in each of the first and second pathways;

a pair of comparator means for comparing the level of the differently phased second intermediate frequency signals;

a pair of analog-to-digital converter means for converting the differently phased second intermediate frequency signals passed by the comparator means to digital signals; and

a second circuit means including a signal processing means for processing the digital signals from the first circuit means into ranging information usable in calculating at least the user's position and velocity comprising;

frequency correction means for correcting velocity Doppler frequency shifts in the transmitted signal as now represented by the digital signals;

third frequency mixer means for mixing appropriate frequencies to multiply off the modulated codes in said digital signals;

carrier demodulation means for removing the carrier wave frequencies from the data modulated thereto;

means for processing and preparing the digital signals for operative utilization by computer means.

2. The receiver means of claim 1 wherein the first circuit means includes a voltage controlled oscillator adapted for operative connectio to a source of stable reference frequency for providing a frequency output to be utilized in producing the first and second injection frequencies.

3. The receiver means of claim 2 wherein the first circuit means includes a frequency divider means for dividing the output of the voltage control oscillator means, and including identical outputs for directing second injection frequencies to the pair of second frequency mixer means, said frequency divider including means for offsetting the phase of the second injection frequency from each output.

4. The receiver means of claim 3 wherein the first circuit means includes a phase lock circuit means for locking the phase of any stable reference frequency with that produced by the voltage control oscillator means and frequency divider means.

5. The receiver means of claim 3 wherein the frequency divider means includes a timing output means for utilizing the output of the frequency divider means for timing purposes for other parts of the receiver means.

6. The receiver means of claim 1 wherein the first injection frequency is 137 F, where F equals 10.23 megahertz.

7. The receiver means of claim 3 wherein the output of the frequency divider means is 137 F divided by 8, where F equals 10.23 megahertz, and the two outputs are related by 90.degree. in phase.

8. The receiver means of claim 7 wherein the second intermediate frequency is F divided by eight, where F equals 10.23 megahertz.

9. The receiver means of claim 1 wherein the first circuit means includes a switching means associated with the first filter means for selecting a desired transmitted frequency band signal.

10. The receiver means of claim 1 wherein the first circuit means includes a multiplexing switch means for switching between multiple inputs.

11. The receiver means of claim 1 wherein the first amplifying means of the first circuit means includes switch filter means to improve the selectivity of the first circuit means.

12. The receiver means of claim 1 further comprising a plurality of first and second circuit means for processing transmitted signals from two or more satellites simultaneously.

13. The receiver means of claim 3 wherein the output of the voltage control oscillator means is divided by the frequency divider means by an integer power of 2.

14. The receiver means of claim 1 wherein the second amplifying means comprises an automatic gain control circuit including an automatic gain control amplifier connected in an automatic gain control servo loop with a fast automatic gain control function means for providing fast automatic gain control, whereas gain is lowered in the presence of interference, and gain is raised as interference decreases.

15. The receiver means of claim 1 wherein each second frequency mixer means comprises a quadrature mixer.

16. The receiver means of claim 1 wherein each comparator means comprises an automatic gain control amplifier.

17. The receiver means of claim 16 wherein the comparator means further comprises a statistical automatic gain control function means connected in an automatic gain control servo loop with the automatic gain control amplifier to provide slow gain control to the automatic gain control amplifier, whereby the output from the second frequency mixer means is compared to a predetermined level.

18. The receiver means of claim 14 wherein each comparator means comprises an automatic gain control amplifier having a statistical automatic gain control function means connected thereto in an automatic gain control servo loop for providing slow gain control to the automatic gain control amplifier, so that the fast automatic gain control circuit compensates for time varying amplitude interference, and the slow comparator means provides improved accuracy over long intervals.

19. The receiver means of claim 1 wherein each analog-to-digital converter means is a three level converter, wherein the converter includes means for recognizing three signal levels, greater than a threshold level, less than the negative of the threshold level, and in between the threshold level and the negative of the threshold level.

20. The receiver means of claim 19 wherein the converter means includes means to output a digital word having a first bit representing the sign of the signal, whether negative or positive, and a second bit representing the magnitude of the signal, the magnitude falling within the three level, and if the magnitude exceeds the threshold level or is less than the negative of the threshold level, a digital one is output.

21. The receiver means of claim 19 wherein the converter means includes a pair of signal-to-threshold comparator means for comparing the positive and negative values of the threshold level with the signal, and outputting the signal if it exceeds the threshold.

22. The receiver means of claim 21 wherein the converter means further comprises adaptive threshold adjustment circuitry including logic means which produces a positive voltage signal if the magnitude of the signal exceeds a threshold level; filtering means for passing voltage a signal representing a fraction of outputs from the comparator means which are non-zero; comparator means for comparing the filtered value with an adjustable variable voltage, the output of this comparison being the threshold level determined by the analog-to-digital converter means.

23. The receiver means of claim 1 wherein the frequency correction means comprises a phase rotator means which receives the digitized signals from the first circuit means, said digitized signals being offset in phase by 90.degree., and also receives a velocity Doppler frequency control correction signal computed in a processing computer; a frequency control means for receiving the velocity Doppler frequency control correction signal, and which outputs a frequency control signal to the phase rotator means, so that digitized signals are rotated 90.degree. and the velocity Doppler error is corrected.

24. The receiver means of claim 1 wherein the second circuit means includes a code generator means for duplicating the codes modulated to the transmitted signal, and directing the duplicating codes to the third frequency mixer means so that the codes can be multiplied off from the digitized signals.

25. The receiver means of claim 24 wherein a variable code clock means for fine adjustment of the code generator means is operatively connected to the code generator means, and operates from timing frequencies obtained from the first circuit means of the receiver means.

26. The receiver means of claim 1 wherein the second circuit section further comprises fourth frequency mixer means connected in parallel to the pair of third frequency mixer means, and receiving as one input the digitized signal and as a second input, a code generator signal from a code generator means for duplicating the modulated code of the transmitted signal, the output of the fourth frequency mixer means being directed to the means for processing and preparing the digital signals for operative utilization by computer means.

27. The receiving means of claim 1 wherein the means for processing and preparing the digital signals to the second circuit means comprises integrate and dump counter means for receiving digitized signals mixed in the third frequency mixer means, counting zero and one values of the digitized signal, and creating eight bit digital signals which can be utilized by computer means and which represent the navigational component of the transmitted signals.

28. The receiver means of claim 23 wherein the phase rotator means converts the signal to direct current.

29. The receiver means of claim 28 wherein the signal, prior to entering the phase rotator means, is at F divided by eight where F equals 10.23 megahertz.

30. The receiver means of claim 1 further comprising a carrier tracking loop means for tracking the carrier wave of the selected transmitted signal from the satellite, providing velocity information regarding the receiver means with respect to the satellites, and demodulating navigational information from the carrier portion of the transmitted signal, and includes a phase rotation means for correcting any Doppler shift between the transmitted signals from the satellite to the receiver means, and correlator means for preparing the signals for software processing.

31. The receiver means of claim 30 wherein the software means includes means for demodulating the navigational information from the carrier wave of the transmitted signal, means for deriving tracking error for the carrier wave of the transmitted signal, means to compute and derive delta range information, and means to derive velocity information.

32. The receiver means of claim 30 wherein the output of the correlator means is at 50 hertz, which is the data rate for navigation information on the transmitting signal from the transmitting satellites.

33. The receiver means of claim 1 further comprising a code lock loop means for tracking the modulated code on the transmitter signal from the satellites, including means for generating early, late, and prompt codes, means for subtracting the early code from the late code, means for correlating the value of the subtracted early minus late code, means to correlate the prompt codes, and software means to multiply the correlated prompt and early minus data codes to produce a code tracking error signal.

34. The receiver means of claim 33 further comprising first and second delay means connected in series, the prompt signal being produced after passing the signal through the first delay means, the late signal means produced after passing the signal through both first and second delay means, whereas the early signal is not passed through either a first, second and delay means.

35. The receiving means of claim 34 further comprising a logic device means which subtracts the early code signal from the late code signal and outputs two signals, first indicating whether the remainder is positive or negative, the second containing the magnitude of the remainder.

36. The receiver means of claim 33 wherein the correlator means comprise a correlator logic device means and an up-down counter means, the correlator logic device means receiving two bit binary signals representing the digitized signal and two bit signals representing digitization of the code, and outputting a two bit binary word representing the multiplication of the two bit signal and code, that output being received by the up and down counter means which is incremented when both magnitude bits are one and sign bits are the same, and which is decremented when the sign bits are different and both magnitude bits are one.

37. The receiver means of claim 1 wherein a majority of the first circuit means is reducible to microcircuit format; and all of the second circuit means is reducible to a microcircuit format.

38. The receiving means of claim 37 wherein portions of the first circuit means reducible to microcircuit format can be comprised of hardware on the order of 1.25 micron bulk CMOS.

39. The receiver means of claim 37 wherein the second circuit means is reducible to microcircuitry on the order of a single GaAs MMIC.

40. A high performance global positioning system receiver means for receiving global positioning system signals carried at frequencies centered generally at 154 F and 120 F, where F=10.23 Mhz, comprising: a first circuit section including;

frequency selection means for selecting between the 154 F or 120 F carrier frequency;

frequency generation means adapted to receive a stable reference frequency and convert the same into 137F frequency, that frequency being midway between 154 F and 120 F frequency;

means for injecting the 137 F frequency into the selected signal carrier frequency, and to mix the same;

signal splitting means for splitting the mixed carrier signal and 137 F generated signal into two pathways;

frequency divider means for dividing the 137 F frequency by an integer power of 2;

means for injecting the divided 137 F frequency into both pathways and to mix the same to produce a fraction of F frequency;

means to convert the fraction of F frequency into a digital

representation;

a second circuit section including;

means to convert the fraction of F frequency to DC;

means to process the DC signal to a form usable by a computer means, said DC signal containing the global positioning system information.

41. The means of claim 40 wherein the integer power of 2 is taken from the subset comprising 2, 4, 8, 16, 32, and 64.

42. The means of claim 10 wherein the integer power of 2 is 8, wherein 137 F divided by 8 equals 17.125 F, which is approximately equal to the difference between 154 F and 137 F, and the difference between 120 F and 137 F.

43. A high performance global positioning system receiver means comprising:

carrier tracking loop means for tracking a carrier wave transmitted by the global positioning system satellites to obtain velocity information and to decode globe position system information, including;

phase rotation means for removing the Doppler shift from the signal, said signal having been digitized;

correlation means for correlating digitized code and digitized signal signs by taking the exclusive-or logic function result of the same and accumulating this result;

number generator means converting velocity information to phase rotation;

differentiating means for deriving the derivative of the result.

BACKGROUND OF THE INVENTION

a. Field of the Invention

The present invention relates to global positioning systems, and in particular, to a high performance global positioning system receiver means and method.

b. Problems in the Art

A procedure has been developed which allows derivation of three-dimensional location and velocity (if applicable) of a vehicle or user, to a high degree of accuracy. The procedure, and components involved in the procedure, are known as the global positioning system (or GPS); all of which is well known within the art. The general principles involved in such a system are also well known within the art, and described in U.S. Pat. No. 4,613,977 to Wong, et al., issued Sep. 23, 1986; the contents of which is incorporated by reference herein. Additional background material, incorporated by reference herein, is set forth at the end of this specification.

The purpose of the global positioning system is to enable highly accurate, virtually instantaneous determination of a user's position and velocity. Obviously, it therefore can be used to continuously keep track of position and movement, and can be used as an navigational tool. GPS generally involves receiving and decoding signals transmitted from a plurality of satellites, the signals containing information such as time and position of each satellite. By processing of the signals according to GPS theory, user position (and velocity) can be derived.

Although different types of global positioning systems have been developed and are in use, there still exists areas for improvement in the components and methods used. There is room for improvement in the speed, accuracy and performance of global positioning systems. Additionally, there is a need for miniaturizing hardware components to substantially decrease the size of the devices needed to accomplish global positioning; to make the system more powerful with higher performance, and to simplify it for more efficiency and economy. Certain methods currently used in global positioning are simply not as efficient or accurate as desired, and need to be improved upon.

Therefore, it is a principal object of the present invention to provide a high performance global positioning system receiver means and method which improves over or solves the problems and deficiencies in the art.

Another object of the present invention is to provide a means and method as above described which improves the overall performance and accuracy for a global positioning system.

A further object of the present invention is to provide a means and method as above described which allows simplification and reduction of substantial portions of the components for the receiver, allowing the same to be micronized, both improving the performance and economy of the system.

Another object of the present invention is to provide a means and method as above described which is fast, accurate, efficient, and economical.

These and other objects, features, and advantages of the present invention will become clear with further reference to the specification and claims.

SUMMARY OF THE INVENTION

The present invention improves the performance of a conventional global positioning system. It includes a two-stage or two-section receiver which utilizes components and methodology resulting in improvements upon the conventional receiver hardware and procedures currently in use. Additionally, the present invention's utilization of components and methodology allows micronization of a substantial portion of the combined stages.

The present invention further can select a certain signal from one satellite, can be configured to allow for either simultaneous receipt of a plurality of signals from global positioning satellites, or be multiplexed to sequentially receive those signals. This can easily be accomplished by those having skill in the art.

First, the receiving stage of the system of the invention functions to receive the radio frequency signals from the satellites, and then convert them from analog to digital signals. Secondly, the processing stage then operates on the digital signals to derive the position and navigational information from the signals and prepare it for use by a computer to ultimately compute position and other navigational factors.

The invention operates quickly and efficiently, and does not require some of the space-consuming and costly components of conventional receivers and pre-processing circuitry. The processing stage functions to correct for Doppler shift in the received satellite signals, remove the modulated code contained in the radio frequency signals from the satellite, and remove the modulated positioning data from the carrier wave. The present invention also allows for adjustment to fine tune its high performance operation.

The present invention is operatively connectable to a conventional radio frequency receiving antenna used with conventional global positioning systems, and also is operatively connectable to a digital computer which incorporates appropriate software to control tracking and acquisition of the satellite signals, and calculate the navigational results desired.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematical representation of the first stage of the present invention which comprises the radio frequency receiver and analog to digital conversion components.

FIG. 2 is a schematic representation of the second stage of the present invention which comprises the components for frequency correction, demodulation of navigation data, removal of code modulations, and processing of the signals for preparation for use in the computer.

FIG. 3 is a schematic representation of a code lock loop for tracking the codes contained in the signals transmitted by the global positioning satellites.

FIG. 4 is a schematic representation of generation of the binary word to represent and identify the codes being received, and includes a logic table for interpreting the binary words.

FIG. 5 is a schematic representation of how the binary words are correlated, and includes a logic table to interpret the same.

FIG. 6 is a schematic representation of the output and input gain for a preferred embodiment of the analog-to-digital converter of the present invention and includes a table of values related to the binary word output from the analog-to-digital converter.

FIGS. 7 and 8 graphically depict performance of an analog-to-digital converter according to a preferred embodiment of the invention.

FIG. 9 is an electrical circuit schematic of a three-level analog-to-digital converter including an adaptive threshold adjustment.

FIGS. 10 and 11 are schematic representations of the frequency plan utilized in the preferred embodiment of the invention, FIG. 11 depicting specifically the function of the phase rotator, including a logic table.

FIG. 12 is a schematic representation of a carrier wave tracking loop depicting both hardware and software functions.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

I. Overview

A preferred embodiment of the present invention will now be described with reference to the accompanying drawings. Like reference numerals will represent like components throughout the drawings and description.

FIGS. 1 and 2 represent generally a preferred embodiment of the high performance global positioning system receiver means and method. The remaining drawings illustrate specific qualities, or embodiments of subcomponents of the general system of FIGS. 1 and 2.

The preferred embodiment of FIGS. 1 and 2 will first be discussed with alternatives and additional components following thereafter.

II. The Preferred Embodiment of FIGS. 1 and 2

A. Stage 1--Receiver/Digital-to-Analog Conversion

By particular reference to FIG. 1, the first stage of the general preferred embodiment of the invention is schematically depicted. The circuitry of FIG. 1 will be referred to as "first stage 10". It is to be understood that dashed line 12 encloses all of the components which can be easily micronized (that is, reduceable to micro-circuit format), which is one of the objects of the present invention.

Generally, the transmitted or broadcast signals (radio-frequency or r.f. waves) from the global positioning satellites are captured by a conventional, known in the art antenna (not shown and not a part of this invention), and these signals are then introduced to pre-select filter 14. As is conventional, broadcast signals from the satellites are centered at one of two frequencies (1575.42 megahertz (MHZ) and 1227.60 (MHZ)). It is further known that these two signals are referred to in the art as "L1" and "L2", respectively. For purposes of the following description, and by design of the present invention, the frequencies of signals L1 and L2 can be alternatively referred to as 154 F and 120 F, where "F" equals 10.23 MHZ. 10.23 MHZ, by design, is the frequency of one of two codes which are modulated into the transmitted satellite signals and is referred to as the P-Code. The second code is referred to as the C/A Code and is at 1.023 MHZ. Modulations are unique for each satellite. Pre-select filter 14 controls which of signals L1 or L2 will be allowed to pass to the following parts of first stage 10. It is to be understood that each of the components described before and hereafter are interconnected by appropriate electrical conducting pathways, such as are known in the art.

The signal from pre-select filter 14 is amplified in low-noise pre-amp 16. An injection frequency of 137 F generated in voltage controlled oscillator 18 is injected into the amplified signal at frequency mixer device 20. 137 F is selected as the first injection frequency because it is midway between L1 (154 F) and L2 (120 F), and it allows a single frequency, 17 F, to be used in subsequent operations.

Band-pass filter 22 passes all the mixed signal (now at an intermediate frequency (i.f.) of 17 F) in further filtered form to AGC (automatic gain control) amplifier 24. AGC amp 24 is controlled by a fast AGC function device 26 which is inserted in the conventional AGC servo-loop connected between the output of AGC amp 24 and the gain control input of AGC amp 24. It is to be understood that the terminology "fast" is utilized to describe that the AGC combination 24 and 26 responds quickly to changes in signal level, but the response is still relatively slow compared to the modulation rate of 10.23 MHZ.

The output of the AGC combination 24 and 26 produces a level signal which is split into two pathways at junction 28, with the signal being sent to a pair of identical quadrature mixers 30 and 32. A frequency divider 34 introduces injection frequencies of 17-1/8)F into each quadrature mixer 30 and 32. The injection frequencies are derived from the division of first injection frequency 137 F by 8. The only difference between the injection frequencies to quadrature mixers 30 and 32 is that they are out of phase by 90.degree., as is shown in FIG. 1 (one at 0.degree. phase, the other at 90.degree.). This phase difference is produced by binary frequency divider 34, a result of which is readily obtainable from divider 34, such as is known in the art.

The outputs from quadrature mixers 30 and 32 are then sent to identical sub-circuit combinations for conversion from analog-to-digital. At this point, the signals are mixed down to an intermediate frequency (i.f.) of 1/8 F. In the embodiment shown in FIG. 1, signals are fed to AGC amps 36 and 38 which are provided slow gain control by statistical AGC function devices 40 and 42, which again are basically within an AGC servo-loop for each AGC amp 36 and 38. As opposed to AGC amp 24 (with fast AGC function device 26), AGC amps 36 and 38 (with their statistical function devices 40 and 42), can be "slow" in the sense that speed is not critical, and therefore these subcircuits can operate slower, but can then be made more accurate. The purpose of "slower" AGC amps 36 and 38 is to adjust for manufacturing tolerances and minor defects due to temperature changes. AGC amps 36 and 38 serve to accurately adjust the signal level relative to the threshold level of the analog to digital converters 44 and 46. An equivalent implementation is to adjust the threshold level relative to the signal level. This is the implementation described subsequently relative to FIGS. 7, 8 and 9.

The output of each AGC amp 36 and 38 carries intermediate frequency signals of 1/8 F into analog-to-digital (A/D) converters 44 and 46 which issue digital signals representing the content of the analog signals, and which are designated as X and Y signals, as shown in FIG. 1. It is to be understood that the X and Y signals are digitized quadrature representations of the received satellite signal selected by the receiver 10. X and Y are used to represent the quadrature components before frequency connection. U and V will represent corresponding components after Doppler frequency correction, whereas I and Q will represent corresponding components after integrate and dump counters 74 in FIG. 2.

It can therefore be seen that the first stage of the preferred embodiment of the invention selects a desired frequency signal which has been captured from the global positioning satellites, amplifies the signal, mixes it to the intermediate 137 F frequency, filters it again, levels the signal in the fast gain control AGC amplifier, splits the signal into the quadrature mixers, and then processe