Method of manufacturing semiconductor device

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BACKGROUND OF THE INVENTION

The present Invention concerns a method of manufacturing a semiconductor device and, more particularly, it relates to a method of manufacturing a semiconductor device capable of forming electrodes or wirings of excellent step coverage at a low temperature.

Polycrystalline silicon (Si) films formed by thermal decomposition of silane (SiH.sub.4) through a low pressure chemical vapor deposition (LPCVD) method have been generally utilized for electrodes and wirings in semiconductor devices. Since the polycrystalline Si film formed by the LPCVD method has extremely high resistivity, impurities are doped by well-known thermal diffusion or ion implantation to lower the resistivity and provide an electroconductivity in the subsequent step.

In the manufacture of a bipolar transistor, an opening reaching as far as an Si substrate is formed in a dielectric film formed on the Si substrate, a polycrystalline Si film is then deposited, to which impurities are doped by the ion implantation and, subsequently, the impurities in the polycrystalline Si film are diffused to the Si substrate by a heat treatment to form an emitter. The techniques relevant to the method of this kind, is discussed, for example, in VLSI Technology, S.M.Sze, ed (McGraw-Hill, 1988 pp 499-507).

However, in a case of forming the emitter of a pnp bipolar transistor by implantation of boron ions or boron difluoride (BF.sub.2) ions into the polycrystalline Si film, a heat treatment at a high temperature of higher than 900.degree. C. is required for activating boron in the polycrystalline Si film and boron of a large diffusivity is diffused over a long distance making it difficult to form a shallower junction. As a result, there has been a problem that the operation speed of the pnp transistor cannot be improved.

Further, along with the down scaling for LSI, the aspect ratio in the opening for forming the emitter is increased and, in a case of ion implantation to the polycrystalline Si film in the opening having such an abrupt side wall, a portion lacking in boron is formed in the polycrystalline Si film thereby bringing about a problem that the resistivity of electrodes or wirings is increased.

On the other hand, in a case of doping impurities by a thermal diffusion, it is possible to dope the impurities also on the steep stepped side walls by applying a thermal diffusion at a high temperature for a long period of time. However, similar to the case of the ion implantation described above, boron is diffused over a long distance in the portion of the Si substrate in which the polycrystalline Si film is in contact with an Si substrate such as an emitter, making it difficult to form a shallower junction.

As a method of doping boron to the polycrystalline Si film formed on the side walls of the opening as one of the foregoing problems, has also been proposed a method of using disilane (Si.sub.2 H.sub.6) and diborane (B.sub.2 H.sub.6) as source gases and depositing an Si film while doping boron within a temperature range of 520.degree. C.-665.degree. C. (J. Electrochem. Soc: SOLID-STATE SCIENCE AND TECHNOLOGY, Vol. 133, No. 8, pp 1721-1724, August 1986). However, according to the experiment made by the present inventors, the deposited Si film within such a temperature range by using Si.sub.2 H.sub.6 as the source gas brings about a problem that it is poor in the step coverage and the layer thickness on the side wall of the groove is remarkably reduced as compared with the upper surface upon deposition in a deep groove. Further, it has also been found that the deposition reaction of the film is too violent to be controlled within the temperature range of 400.degree. to 600.degree. C.

SUMMARY OF THE INVENTION

An object of the present invention is to overcome the foregoing problems in the prior art and provide a method of manufacturing a semiconductor device capable of easily forming satisfactory electrodes or wirings of excellent step coverage capable of completely burying the inside of a deep groove or an opening of a large aspect ratio.

Another object of the present invention is to provide a method of manufacturing a semiconductor device capable of easily forming an extremely shallow junction.

For attaining the foregoing objects, in accordance with the present invention, a boron doped amorphous Si film is formed at a temperature range higher than 200.degree. C. and lower than 400.degree. C. by a low pressure CVD (CVD conducted at a gas pressure lower than 1 atm) using a gas mixture comprising diborane (B.sub.2 H.sub.6) and at least one of disilane (Si.sub.2 H.sub.6) and trisilane (Si.sub.3 H.sub.6) as source gases.

The thus formed amorphous Si film is excellent in the step coverage and can completely fill even in a deep groove.

This is assumed to be due to the following reasons. At a temperature higher than about 400.degree. C., Si.sub.2 H.sub.6 is decomposed in a gas phase by the following reaction:

Si.sub.2 H.sub.6 (g).fwdarw.SiH.sub.2 (g)+SiH.sub.4 (g) (1)

to form SiH.sub.2 (silylene). Since SiH.sub.2 is highly reactive, it reacts with a substrate directly after the decomposition to deposit an Si film. As a result, the film deposition reaction is controlled by the feed rate of SiH.sub.2. On the side wall of a deep step and in the groove, supply of SiH.sub.2 becomes insufficient as compared with that for a flat portion, so that step coverage is deteriorated. An inert gas or a doping gas forming an n-type dopant (for example, phosphine (PH.sub.3) or arsine (AH.sub.3)) has lower sticking probability to the substrate as compared with SiH.sub.2 and gives no effect on the reaction of the formula (1). Accordingly, if such a gas is introduced together with Si.sub.2 H.sub.6 into a reaction vessel, it scarcely changes the deposition rate of the Si film and the step coverage is also poor.

On the other hand, B.sub.2 H.sub.6 has a low decomposing temperature and reacts with the substrate already at a temperature of higher than about 200.degree. C. to form adsorption species. Since the adsorption species readily react with Si.sub.2 H.sub.6, the Si film deposition reaction proceeds even at a temperature of lower than 400.degree. C. Since the reaction is an utterly surface reaction, it does not cause deterioration in the step coverage as in the case of not containing impurities or flowing the n-type doping gas simultaneously and the film can be deposited uniformly even within a deep groove.

By the plasma CVD process, using B.sub.2 H.sub.6 and at least either one of SiH.sub.4 or Si.sub.2 H.sub.6 as source gases, it is possible to deposit an Si film at a temperature equal to or lower than that in the present invention. However, the film formed by the plasma CVD process has a poor step coverage and, when buried in a deep groove, results in voids. Accordingly, if the plasma CVD process is employed for the formation of the Si film, it is difficult to completely bury the inside of a deep groove even if the starting source gases are identical.

In the present invention, the Si film is amorphous in the state as it is deposited. When it is applied with a heat treatment, for example, in a nitrogen or inert atmosphere at about 650.degree. C. for about 15 min, dendrites are grown and, at the same time, activation of impurities is completed to obtain a sufficient electroconductivity. Accordingly, remarkable temperature lowering can be attained in a process for forming electrodes or wirings made of polycrystalline Si which was conducted so far at a temperature higher than about 900.degree. C. When the Si film obtained in accordance with the present invention is used as an impurity diffusion source for forming a p-type emitter of a bipolar transistor, it is particularly preferred since an extremely shallow base-emitter junction can be formed to attain an improved operation speed for LSI. Further, when the Si film formed in accordance with the present invention is applied to the formation of a MOS transistor, since a shallow P-type source-drain diffusion layer can be formed, even a minute transistor of a short gate length can also be operated stably. Accordingly, it has an effect also for the large scale of integration of LSI. The average grain size of the Si film formed in accordance with the present invention is greater than the film thickness, which is one order of magnitude greater than that of the polycrystalline Si film prepared by the existent method. Accordingly, the carrier mobility is great and there is also an advantageous effect capable of obtaining a high electroconductivity even if the boron concentration is lowered.

Since the Si film formed in accordance with the present invention is excellent in the step coverage, the inside of a deep contact hole can be buried completely. Accordingly, after filling the Si film into the contact hole in accordance with the present invention, when it is reacted as a reducing agent with a tungsten (W)-containing compound gas to substitute the Si film for a tungsten film, the contact hole can be filled with tungsten to form a multi level interconnection with a low resistivity. In the present invention, since the temperature upon depositing the Si film is lower than 400.degree. C., the present invention can be practiced even when low melting point wiring material such as an aluminum alloy is present in the underlying layer.

The reaction for substituting the Si film for a tungsten film is shown by the formula (2).

2WF.sub.6 (g)+3Si(s).fwdarw.2W(s)+3SiF.sub.4 (g) (2)

In the reaction shown by the formula (2), the tungsten film is formed corresponding to the shape of the Si film while consuming the Si film and, in this meaning, an expression "substitution" is adopted in the present specification. Accordingly, in the reaction shown by the formula (2), when all the Si film is exhausted as the reducing agent, the tungsten substitution reaction is terminated spontaneously. Thus, tungsten is not deposited at a position where SI film is not present. When the Si film formed by the present invention is substituted for the tungsten film, since boron is doped in the Si film, it has been observed that a little amount of Si and boron is present in the tungsten film after substitution.

In the substitution of the Si film for the tungsten film, when a thin tungsten film is formed over the entire surface of the Si film at the initial stage of the reaction, the proceeding of the reaction between WF.sub.6 and Si in the direction of the film thickness (depth) is made extremely slower and, at last, the reaction is terminated in a portion where the Si film is extremely thin. Accordingly, in a case of forming a thick tungsten film, it is necessary to previously form a tungsten nucleation control film on the Si film and, subsequently, take place a substitution reaction by conducting CVD at an appropriate temperature (200.degree.-400.degree. C.). According to this method, the thin tungsten film is less formed on the surface of the Si film and the reaction between WF.sub.6 and Si proceeds forward in the direction of the depth of the Si film and even a thick Si film can be substituted for the tungsten film. Although an Si oxide film is preferred as the reaction control film of this kind, a film comprising any other material may also be used so long as it is a thin film having an effect of hindering the formation of nuclei for substituting the surface of the Si film for tungsten in the initial stage of the reaction and promoting the reaction into the direction of the depth of the film. In this case, it is preferable that the thickness of the film is as thin as 1-3 nm. Then, in view of the easiness of the pretreatment and its effect, an Si oxide film is preferably formed from a practical point of view. It is practical to use a method of apply oxidation by using a well-known chemical referred to as a chemical oxide for the chemicals capable of forming the thin silicon oxide film on the surface of the Si film. After the completion of the W-substituting reaction, the reaction control film is no more necessary and it is removed.

Further, if it is desired to terminate the tungsten substitution reaction at the boundary between the Si film and its underlying substrate, a film as a barrier for the reaction may be disposed at the interface. The barrier film contributes to the termination of the substitution reaction at the interface when the Si film is gradually substituted for tungsten in the direction of the depth from the surface. Accordingly, it is desirable that the barrier layer has low resistivity, as well as it is less reactive with tungsten and thermally stable substance in the temperature region for Si and WCVD (.ltoreq.400.degree. C.). As the barrier layer, there can be used, a conductor layer comprising, for example, at least one of materials selected from the group consisting of transition metal elements such as W, Mo, Ti and Ta, nitrides or silicides thereof, cobalt silicides, aluminum nitrides and Ti-W alloys. The thickness is preferably from 50 to 300 nm, more preferably, 100 to 200 nm. Al, Au, Ag or the like is highly reactive and, hence, not preferred. The barrier film of this kind is effective, for example, in a case where direct connection between a semiconductor substrate and tungsten is not desirable or in a case where it is intended to surely terminate the tungsten substitution reaction at the bottom interface of the Si film which is an object of substitution with tungsten.

After substituting the Si film with the tungsten film, when SiH.sub.4, H.sub.2 or the like is added for reducing WF.sub.6 as in the prior art, it is apparent that the tungsten deposition reaction from WF.sub.6 is proceeded and tungsten can be deposited further in the gap of the substituted tungsten film or thereabove.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a graph illustrating a relation between an Si deposition rate and a temperature;

FIG. 2 is a graph illustrating a relation between a step coverage of the Si film and a deposition temperature,

FIG. 3 is a view illustrating the outline of one embodiment of an apparatus used for practicing the present invention,

FIGS. 4a to 4c and FIGS. 5a to 5e are, respectively, views illustrating methods of preparing specimens in different embodiments according to the present invention;

FIGS. 6a, 6b and FIGS. 7a, 7b are, respectively, views for illustrating one embodiment according to the present invention;

FIGS. 8a to 8d are step charts for illustrating another embodiment of the present invention;

FIGS. 9a to 9f and FIGS. 10a-10f are, respectively, step charts for illustrating an embodiment in which the present invention is applied to the formation of an emitter or a base of a bipolar transistor;

FIGS. 11a and 11b are views illustrating an embodiment in which the present invention is applied to the formation of a memory device;

FIG. 12 is a view illustrating a relation between a thickness and a time of a tungsten film obtained upon substituting an Si film with tungsten;

FIGS. 13a to 13i are step charts illustrating another embodiment of the present invention;

FIG. 14a to 14e are step charts illustrating a further embodiment of the present invention;

FIGS. 15a to 15f are step charts illustrating a further embodiment of the present invention; and

FIGS. 16a and 16b are views illustrating a still further embodiment according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Example 1

FIG. 3 is a schematic view for a horizontal type low pressure CVD apparatus used in this embodiment. A quartz holder 30 was placed at the center of a quartz tube 10, on which a silicon substrate 40 was placed. As the silicon substrate, the following two kinds of substrates were provided. A substrate 1 comprised an Si substrate formed with a thermal oxide of 100 nm thickness, on which a boron doped Si film was deposited and then measured for the film thickness. A substrate 2 was formed by the procedures shown in FIG. 4. At first, a thermal oxide film 102 of 1 .mu.m thickness was formed on an Si substrate 101 (FIG. 4a). Then, grooves 103 each of 0.5 .mu.m width were formed at an equivalent distance by known lithography and dry etching technique (FIG. 4b). Subsequently, an oxide film 104 of 100 nm thickness was formed by a low pressure CVD process (FIG. 4c).

After placing the substrate 1 and the substrate 2 on the quartz holder 30 and evacuating the inside of the quartz tube 10, a valve 50 and a valve 60 were opened to flow Si.sub.2 H.sub.6 at 50 cc/min and B.sub.2 H.sub.6 at 0.5 cc/min of flowrate simultaneously to deposit boron doped Si to a thickness of about 200 nm. The flowrate ratio for both of the gases: B.sub.2 H.sub.6 /Si.sub.2 H.sub.6 was 0.01. The flowrate ratio can be properly selected within a range from 0.005 to 0.02. The pressure at the inside of the quartz tube was maintained at 30 Pa during supply of Si.sub.2 H.sub.6 and B.sub.2 H.sub.6. After flowing the gases for a predetermined period of time to deposit an Si film, the substrate 40 was taken out from the inside of the quartz tube 10.

Subsequently, the thickness of the Si film was measured for the substrate 1, by an optical interference method. On the other hand, the substrate 2 was cleaved along a plane in perpendicular to the groove 103 to estimate the step coverage factor. For the step coverage factor, the film thickness a for the upper portion of the step and the film thickness b at the lowermost portion in the side wall of the step were measured in a cross sectional photograph obtained by using a scanning electron microscope and it was defined as b/a.

FIG. 1 shows a relation between a deposition rate and a deposition temperature for the Si film. For the comparison, the results obtained in a case of introducing only Si.sub.2 H.sub.6 at a pressure of 30 Pa with no addition of B.sub.2 H.sub.6 were also shown as the prior art in FIG. 1. From FIG. 1, it can be seen that the deposition temperature for the Si film can be lowered by so much as about 150.degree. C. by the addition of B.sub.2 H.sub.6 and the Si film can be deposited at a sufficient rate even lower than 400.degree. C. In the case of adding B.sub.2 H.sub.6, the deposition rate increases along with the increase of the deposition temperature lower than 400.degree. C., in which the system constitutes a surface reaction control. On the other hand, the deposition rate decrease at a temperature higher than 400.degree. C. and the system constitutes a mass transfer control. In order to process a plurality of substrates together at a good uniformity, it is desirable that the system constitutes the surface reaction control and it is necessary that the deposition temperature of the film is lower than 400.degree. C.

FIG. 2 shows a relation between the deposition temperature and a step coverage factor of the Si film. In a case where the deposition temperature for the Si film was lower than 400.degree. C., the step coverage factor was approximately 1 in which the inside of the deep groove could be buried. It was observed, on the other hand, in a case where the film deposition temperature was higher than 400.degree. C. and in a case where B.sub.2 H.sub.6 was not added, that the step coverage is deteriorated to less than 0.9 and the inside of the deep groove could not be buried completely.

If phosphine (PH.sub.3) or arsine (AsH.sub.3) as an n-type doping gas was added instead of B.sub.2 H.sub.6 to Si.sub.2 H.sub.6, there was no change in the reaction of Si.sub.2 H.sub.6 and no increase was observed in the deposition rate. Further, the step coverage factor was substantially identical with that of a case not containing the impurity and it was impossible to completely bury the inside of the deep groove.

According to this embodiment, the inside of the deep hole can be buried with Si at a sufficient deposition rate and step coverage by depositing the boron doped amorphous Si film at a temperature lower than 400.degree. C. by using Si.sub.2 H.sub.6 and B.sub.2 H.sub.6.

Example 2

This embodiment illustrates a case of using a boron doped amorphous Si film formed in accordance with the present invention as a diffusion source of impurities. Two kinds of specimens 3, 4 were prepared by the method shown in FIG. 5. At first, an Si.sub.3 N.sub.4 film 402 of 0.5 .mu.m thickness was deposited on an Si substrate 401 by a well-known CVD (FIG. 5a). Then, a portion of the Si.sub.3 N.sub.4 film 402 was removed by well-known lithography and dry etching technique to form grooves 403 each of 0.5 .mu.m with at an equal distance (FIG. 5b). Subsequently, an Si film was formed and the impurity was doped as shown below. For the specimen 3, Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 were supplied at 50 cc/min and 0.5 cc/min simultaneously and, under the conditions at 350.degree. C. and 30 Pa, a boron doped amorphous Si film 404 of 30 nm thickness was formed as shown in FIG. 5c. In the specimen 4, after forming a polycrystalline Si film 405 of 30 nm thickness under the conditions at 630.degree. C. and 80 Pa by using SiH.sub.4 as a source gas as shown in FIG. 5d, BF.sub.2 ions 406 were implanted at an implantation energy of 20 KeV and an implantation dose of 2.5.times.10.sup.15 /cm.sup.3. Then, the specimens 3 and 4 were annealed at such a temperature that impurities are thoroughly activated to form a diffusion layer 409, and then the distance that the impurities diffused from the surface to the inside of the Si substrate 401 (that is depth x of the diffusion region 409) was measured by secondary ion mass spectroscopy (SIMS). The results are shown in FIGS. 6a, 6b. In the specimen 3 using the boron doped amorphous Si film as the diffusion source in accordance with the present invention, activation for the impurities was completed at a low temperature of 700.degree. C., and an extremely shallow junction of 35 nm diffusion depth was formed as shown in FIG. 6a. On the other hand, in a case of using the specimen 4 in which BF.sub.2 + ions were implanted into the polycrystalline Si film, a heat treatment at about 900.degree. C. was necessary for sufficiently activating the impurity and, as a result, a diffusion depth was increased as large as 2SO nm and a formation of a shallow junction was impossible.

According to this embodiment, it was confirmed that the temperature of the heat treatment could be lowered and an extremely shallow junction could be formed while suppressing the diffusion of the impurities by using the boron doped amorphous Si film formed In accordance with the present invention as the impurity diffusion source.

Transition from the amorphous Si to the polycrystalline Si occurs about at a temperature higher than 550.degree. C. However, since the reaction is extremely slow and it takes a long time at a temperature from 550.degree. to 600.degree. C., it is practically preferred to apply annealing about at a temperature higher than 6SO.degree. C. In this case, diffusion of boron atoms in the amorphous Si film is conducted simultaneously but it is preferred to further apply annealing in order to obtain a predetermined junction depth.

Example 3

This embodiment shows a case of using a boron doped amorphous Si film formed in accordance with the present invention as a diffusion source upon forming a source-drain region of a MOS transistor.

The MOS transistor was prepared by the procedures shown below. At first, as shown in FIG. 7a, an isolation oxide film 202 was formed by a well-known selective oxidation technique on the surface of an n-type Si substrate 201' with 10 .OMEGA.cm of resistivity and (100) of crystal orientation. Then, the surface of the Si substrate 201' was oxidized in an oxygen atmosphere to form a gate oxide film 202' of 10 nm thickness. Then, after depositing a polycrystalline Si film 203 of 100 nm by a low pressure CVD process and, adding impurities to lower the resistivity, an SiO.sub.2 film 205 of 200 nm thickness was formed by a low pressure CVD process. Subsequently, unnecessary portions in the SiO.sub.2 film 205 and the polycrystalline Si film 203 were removed by known lithography and dry etching technique. Subsequently, after forming an SiO.sub.2 film of 20 nm thickness entirely by a low pressure CVD process, anisotropic dry etching was applied till the surface of the Si substrate 201' was exposed to form the SiO.sub.2 film 205' only on the side wall such as of SiO.sub.2 film 205. Subsequently, a boron doped amorphous Si film 208 of 200 nm thickness was formed under the conditions at 350.degree. and 30 Pa by a low pressure CVD process using Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 as source gases and, successively the Si film 208 was patterned into a predetermined shape by a known method (FIG. 7a).

Then, the amorphous Si film 208 was annealed in a nitrogen atmosphere at 700.degree. C. for 20 min to diffuse boron in the amorphous Si film 208 into the Si substrate to form a source-drain region 204 as shown in FIG. 7b. By the annealing, the Si film 208 is transformed from amorphous to polycrystalline 214.

The MOS transistor prepared in this embodiment had a high punch through break down voltage and could be operated with a sufficient margin even in a case where the gate length was extremely short as about 0.3 .mu.m, because a junction of extremely shallow and of generally rectangular shape could be formed by thermal diffusion at a temperature as low as 700.degree. C. On the other hand, in a case of forming a source-drain region by BF.sub.2 + ion implantation using a polycrystalline Si film gate electrode as a mask as in the prior art, the effective channel length was shortened and a punch through phenomenon was caused at a voltage lower than the method according to the present invention. As a result, in a case of the gate length of 0.3 .mu.m, it was impossible to obtain stable transistor characteristics, because the implanted impurities were distributed over a wide range in accordance with a Gaussian distribution and because a heat treatment higher than 900.degree. C. was necessary for the activation of impurities, so that implanted impurities were diffused deeply in the silicon substrate.

In this embodiment, since impurities are diffused from the boron doped Si film formed in accordance with the present invention to form a source-drain region, there is provided an advantageous effect capable of preparing a MOS transistor of high punchthrough breakdown voltage and capable of down scaling the LSI.

Example 4

This embodiment shows a case of using the boron doped Si film deposited in an amorphous state was used for the formation of a diffusion layer in a polycrystalline Si MOS transistor.

A polycrystalline Si MOS transistor was prepared by the procedures shown in FIG. 8. At first, a dielectric SiO.sub.2 film 218 was formed on a semiconductor substrate 201 as shown in FIG. 8a. Subsequently, Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 were supplied simultaneously by a low pressure CVD process to form a boron doped amorphous Si film 208 of 100 nm thickness under the conditions at 350.degree. C. and 30 Pa. Then, the boron doped Si film 208 was patterned into a predetermined shape by using well-known lithography and dry etching. Subsequently, an amorphous Si film 215 of 10 nm thickness not containing impurities was formed by a low pressure CVD process using Si.sub.2 H.sub.6 as a source gas at 525.degree. C., as shown in FIG. 8b. Then, a SiO.sub.2 film 205 of 20 nm thickness was deposited at 700.degree. C. by a low pressure CVD process. This process transformed the Si films 208, 215 into polycrystalline Si films 214, 216 and, simultaneously, a diffusion layer 204 was formed. Then, a boron doped amorphous Si film of 100 nm thickness was formed by a low pressure CVD process by using Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 as source gases and, after annealing in a nitrogen atmosphere at 700.degree. C. for 20 min, it was patterned to form a gate electrode 214' of a transistor as shown in FIG. 8c. Then, after forming an interlevel dielectric film 217 by a well-known CVD process as shown in FIG. 8d, a contact hole reaching the diffusion layer 204 was formed and, after forming an Al film 211 successively, it was patterned to form lead wirings.

The polycrystalline Si MOS transistor prepared in this embodiment had a high punchthrough break down voltage and could be operated with a sufficient margin even in a case where the gate length was about 0.3 .mu.m. In the prior art, the source-drain was formed by ion implantation through the gate oxide film 205 which resulted in a problem of damaging the gate oxide film. In this embodiment, since the ion implantation is not employed, the gate oxide film is free from such damage.

With this embodiment, since the Si film formed at a low temperature by using SiH.sub.6 and B.sub.2 H.sub.6 as the source-drain of the polycrystalline Si MOS transistor, high reliability can be obtained even upon large scale integration.

Example 5

This embodiment shows an example of using a boron doped amorphous Si film formed in accordance with the present invention for forming an emitter region of a pnp type bipolar transistor.

At first, as shown in FIG. 9a, a boron buried layer 516 with 1.2 .mu.m depth was formed at a predetermined region on an n-type Si substrate 501 with crystal orientation (100) by a thermal diffusion using boron nitride. Then, after forming an epitaxial layer 503 of 500 nm thickness, an SiO.sub.2 film 504 of 30 nm thickness was formed by a well-known dry oxidation method and, further, an Si.sub.3 N.sub.4 film 505 of 80 nm thickness was deposited by a low pressure CVD process. Then, after forming an isolation groove reaching the buried layer and a groove for the separation of emitter and collector regions by a well-known photoetching technique, the grooves were burred with SiO.sub.2 films 504', 504", and polycrystalline Si 506. Then, an Si.sub.3 N.sub.4 film was formed and, after implantation of boron ions thereto using a mask, an annealing was performed at 950.degree. C. for 30 min to form a collector region 507. Then, ion implantation of phosphorus was conducted and then a heat treatment is applied in a nitrogen atmosphere at 900.degree. C. for 10 min to form an extrinsic base area 508 connecting intrinsic base region.

Subsequently, the Si.sub.3 N.sub.4 film 505 and the SiO.sub.2 film 504 at predetermined regions were successively removed by using well-known lithography and dry etching. Subsequently, 5.times.10.sup.13 /cm.sup.2 of arsenic ions were implanted under an acceleration voltage of 40 KeV and then a heat treatment was applied in a nitrogen atmosphere at 900.degree. C. for 10 min to form an intrinsic base region 510 as shown in FIG. 9b.

As shown in FIG. 9c, an SiO.sub.2 film 504'" was deposited by means of a well-known low pressure CVD process and holes for forming an emitter was opened by well-known photoetching.

Then, a boron doped amorphous Si film 509 of 50 nm thickness was formed as shown in FIG. 9d by a low pressure CVD process using Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 as source gases under the conditions at 350.degree. C., 30 Pa. In this case, the boron concentration in the Si film was set to 5.times.10.sup.20 /cm.sup.3. Then, unnecessary portion of the amorphous Si film 509 was removed by the well-known photoetching.

An annealing was then performed in a nitrogen atmosphere at 700.degree. C. for 20 min., and boron in the amorphous Si film 509 was diffused into the Si substrate to form an emitter region 513 as shown in FIG. 9e. By the annealing, the amorphous Si film 509 is transformed into a polycrystalline silicon film 511 and shows conductivity.

After forming contact holes to an external base region and a collector as shown in FIG. 9f, an Al film 515 was formed and patterned into a predetermined shape as electrodes.

Both of the thickness for the emitter and the base regions of the pnp bipolar transistor formed in this embodiment was about 20 nm which was extremely shallower as compared with emitter or base formed in the prior art and, as a result, high cut off frequency could be obtained. Further, the emitter resistance was also reduced as compared with the prior art.

In accordance with this embodiment, since a boron doped amorphous Si film was formed at a low temperature by using Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 as source gases and impurities were diffused from the Si film to form an emitter region, the cut off frequency of the bipolar transistor could be improved to increase the operation speed.

Example 6

This embodiment shows an example of using a boron doped amorphous Si film for the formation of a base region of an npn type bipolar transistor.

At first, as shown in FIG. 10a, an antimony buried layer 502 of low resistivity with 1.2 .mu.m thickness was formed by thermal diffusion in a predetermined region on a p-type Si substrate 501 of crystal orientation of (100) and resistivity of 10 ohm cm. Then, after forming an epitaxial layer 503 of 400 nm thickness by using a well-known Si epitaxial growth technique, there were formed an SiO.sub.2 film 504 of 30 nm thickness by a dry oxidation method and an Si.sub.3 N.sub.4 film 505 of 80 nm thickness by a low pressure CVD process successively. Subsequently, a groove for device isolation reaching the buried layer 502 and a groove for separating the emitter and the collector were formed by a well-known photoetching, and the inside of the grooves were buried by forming SiO.sub.2 films 504', 504" and polycrystalline Si 506 by the well-known low pressure CVD processes. After forming an Si.sub.3 N.sub.4 film (not illustrated) and implanting phosphorous ion by using the film as a mask, an annealing was performed at 950.degree. C. for 30 min to form a collector region 507. Subsequently, BF.sub.2 + ions were implanted and, succeedingly, an annealing was applied in a nitrogen atmosphere at 900.degree. C. for 10 min to form an extrinsic base region 508 connecting intrinsic base region.

As shown in FIG. 10b, the Si.sub.3 N.sub.4 film 505 and the SiO.sub.2 film 504 at predetermined regions were successively removed by using well-known lithography and dry etching. Then, a boron doped Si film 509 of 20 nm thickness was formed by a low pressure CVD process using Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 as source gases under the conditions at 300.degree. C., 20 Pa. The boron concentration in the film was controlled so as to be 1.times.10.sup.19 /cm.sup.3. The boron doped Si film 509 was then patterned into a predetermined shape by a well-known photoetching.

A heat treatment was applied in a nitrogen atmosphere at 700.degree. C. for 20 min and boron in the Si film 509 was diffused into an Si substrate to form the base region 510 as shown in FIG. 10c. With this heat treatment, the Si film 509 was transformed into single crystal by the solid phase epitaxial growth at the portion in contact with the substrate and into a polycrystalline silicon film 511 at the remaining portion.

As shown in FIG. 10, a phosphorous doped amorphous Si film 512 of 50 nm thickness was formed on an Si film 511 by a low pressure CVD process using Si.sub.2 H.sub.6 and PH.sub.3 as source gases under the conditions at 500.degree. C., 30 Pa. In this case, the phosphorous concentration in the Si film 512 was controlled to 4.times.10.sup.20 /cm.sup.3. Then, the amorphous Si film 512 was patterned into a predetermined shape by a well-known photoetching as shown in FIG. 10d.

Subsequently, an annealing was performed in a nitrogen atmosphere at 700.degree. C. for 20 min and phosphorous in the Si film 512 was diffused into the Si substrate to form an emitter 513 as shown in FIG. 10e. With the annealing, the Si film 512 was transformed into a polycrystalline silicon film 514 and showed electroconductivity.

Successively, after forming contact holes each to the extrinsic base region and the collector region, an Al film 515 was formed as an electrode as shown in FIG. 10f.

Since the thickness of the base region of the bipolar transistor formed in this embodiment is extremely shallow as about 30 nm compared with that of the prior art, much higher cut off frequency could be obtained as compared with the prior art.

With this embodiment, since a boron doped Si film was formed by using Si.sub.2 H.sub.6 and B.sub.2 H.sub.6 as source gases and impurities were diffused therefrom to form a base region, there is an effect capable of improving the cutting frequency of the bipolar transistor.

Example 7

This embodiment shows an example of using a boron doped amorphous Si film formed at a low temperature in accordance with the present invention as a memory cell in a dynamic random access memory (DRAM).

As shown in FIG. 11a, a groove of 5 .mu.m depth was formed in a predetermined region of an Si substrate 701 by a well-known lithography and dry etching. Then, after forming an SiO.sub.2 film 702 by a low pressure CVD process using SiH.sub.4 and N.sub.2 O as source gases, aniso