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Description  |
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FIELD OF THE INVENTION
The present invention relates to a spread spectrum communication device and
in particular to an improvement for making it possible to reproduce data
by using a single correlator in a spread spectrum communication receiver.
BACKGROUND OF THE INVENTION
An example of a multiplex communication device by a prior art spread
spectrum communication system carrying out high speed data communication
is indicated in FIGS. 6 and 7.
FIG. 6 represents a transmitter, in which reference numeral 1 is a
serial-parallel convertor; 2-l.sub..about. 2-n are multipliers;
3-l.sub..about. 3-n are PN code generators; 4-l.sub..about. 4-n are BPSK
modulators; and 5 is an adder.
In the transmitter inputted high speed data (A) are converted into parallel
data sets (B1), (B2), . . . and (Bn) by the serial-parallel convertor 1.
Each of the parallel data sets (B1), (B2), . . . and (Bn) is inputted to
one of the inputs of each of the multipliers 2-1, 2-2, . . . and 2-n. On
the other hand, each of PN codes (C1), (C2), . . . and (Cn) different from
each other outputted by the PN code generators 3-1, 3-2, . . . and 3-n,
respectively, is inputted to the other input of each of the multipliers
3-1, 3-2, . . . and 3-n. Outputs (D1), (D2), . . . and (Dn) of the
multipliers 2-1, 2-2, . . . and 2-n are inputted to the BPSK modulators
4-1, 4-2, . . . and 4-n, respectively, to modulate a high frequency
carrier signal (E). In this way high frequency signals (F1), (F2), . . .
and (Fn) are outputted by the BPSK modulators 4-1, 4-2, . . . and 4-n,
respectively, to be inputted to the adder 5. Finally a multiplexed speed
spectrum signal (G) is outputted by the adder 5 to be transmitted.
FIG. 7 represents a receiver, in which 7-l.sub..about. 7-n are convolvers;
8-l.sub..about. 8-n are multipliers; 9-l.sub..about. 9-n are PN code
generators; 10-l.sub..about. 10-n are detectors; and 12 is a data
demodulator.
In the receiver described above a received signal (H) is distributed to be
inputted to one of the inputs of each of the convolvers 7-1, 7-2, . . .
and 7-n.
On the other hand, each of PN codes (K1), (K2), . . . and (Kn) outputted by
the PN code generators 9-1, 9-2, . . . and 9-n is applied to one of the
inputs of each of the multipliers 8-1, 8-2, . . . and 8-n, respectively.
On the other hand, a high frequency carrier signal (L) is inputted to the
other input of each of the multipliers 8-1, 8-2, . . . and 8-n. Each of
outputs (I1), (I2), . . . and (In) of the multipliers 8-1, 8-2, . . . and
8-n is applied to the other input of each of the convolvers 7-1, 7-2, . .
. 7-n, respectively.
Outputs (J1), (J2), . . . and (Jn) of the convolvers are inputted to the
detectors 10-1, 10-2, . . . and 10-n, respectively. At this time a
correlation spike is generated in each of the outputs of the convolvers
with a same timing for every data channel. Outputs (M1), (M2), . . . and
(Mn) of the detectors 10-1, 10-2, . . . and 10-n are inputted to the data
demodulator 12. Reproduced data (N) are outputted by the data demodulator
12.
The prior art multiplex communication device described above has drawbacks
that synchronization of the carrier signal is necessary and that it
requires a plurality of convolvers (or matched filters) serving as
correlators.
OBJECT OF THE INVENTION
Therefore the object of the present invention is to remove the drawback
that the prior art multiplex communication device requires a plurality of
correlators and to provide a multiplex communication device capable of
demodulate inputted signals by using a single correlator.
SUMMARY OF THE INVENTION
In order to achieve the above object, a spread spectrum communication
device according to the present invention consists of a transmitter
comprising means for converting serial transmission data into a plurality
of parallel data sets; spread-spectrum-modulating means for
spread-spectrum-modulating the plurality of parallel data sets; and means
for synthesizing a multiplexed spread-spectrum-modulated signal to output
it by combining a spread-spectrum-modulated signal outputted by the
spread-spectrum-modulating means and a spread-spectrum-modulated signal
independent of the transmission data; and a receiver comprising a
correlator for correlating the multiplexed spread-spectrum-modulated
signal with a reference signal; correlation pulse generating means for
generating a correlation pulse by converting an output of the correlator
into a signal in a base band information band, which is further converted
into binary pulses; detecting means for detecting a correlation pulse
component corresponding to the spread-spectrum-modulated signal
independent of the transmission data from the correlation pulse; sampling
pulse generating means for generating a sampling pulse from the
correlation pulse component thus detected; and information reproducing
means for reproducing the data, based on the sampling pulse from the
correlation pulse coming from the correlation pulse generating means.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1a and 1b are block diagrams showing an embodiment of the transmitter
and the receiver, respectively, of a device according to the present
invention;
FIGS. 2a and 2b are block diagrams showing another embodiment of the
transmitter and the receiver, respectively, of a device according to the
present invention;
FIGS. 3(a)-3(c) are a diagram for explaining the operation of the
transmitter stated above;
FIG. 4 is a diagram for explaining the operation of the receiver stated
above;
FIGS. 5(a)-5(c) are another diagram for explaining the operation of the
receiver stated above;
FIG. 6 is a block diagram showing an example of the transmitter of a prior
art device;
FIG. 7 is a block diagram showing an example of the receiver of the prior
art device;
FIG. 8 is a block diagram indicating an example of the construction of a
sounder detecting circuit;
FIGS. 9a and 9b are diagrams showing an example of sure data sampling
methods;
FIG. 10 is a block diagram showing an example of the construction for
realizing this method;
FIGS. 11a and 11b are block diagrams showing other examples of the
construction for realizing this method;
FIG. 12 is a block diagram showing an example of the construction of
information detecting means and parallel-serial converting means used in a
spread spectrum receiver according to the present invention;
FIGS. 13(a)-13(g) are a timing chart for explaining the operation of the
device indicated in FIG. 12;
FIG. 14 is a block diagram showing a modified example of the device
indicated in FIG. 12;
FIGS. 15(a)-15(g) are a timing chart for explaining the operation of the
device indicated in FIG. 14;
FIG. 16 is a block diagram showing an example of the construction of a
binary pulse generating circuit used in the spread spectrum receiver
according to the present invention; and
FIG. 17 is a timing chart for explaining the operation of the circuit
indicated in FIG. 16.
DETAILED DESCRIPTION
Hereinbelow the present invention will be explained, referring to the
embodiments indicated in the drawings.
FIGS. 1a and 1b represent the transmitter and the receiver, respectively,
constituting an embodiment of the spread spectrum (SS) communication
device according to the present invention.
As indicated in FIG. 1a, the transmitter is composed of a serial-parallel
converting circuit 101, a group of selectors 102, a group of delay devices
103, an adder 104, a PN code generator 105, a high frequency carrier
generator 106 and a multiplier 107.
As indicated in FIG. 1b, the receiver is composed of a convolver 201
serving as a correlator, a multiplier 202, a high frequency carrier
generator 203, a PN code generator 204, a high pass filter (HPF) 205, an
amplifier 206, a detector 207, a binary pulse generating circuit 208, a
sounder pulse detecting circuit 209, a sampling pulse generating circuit
210, an information detecting circuit 211 and a parallel-serial converting
circuit 212.
Now the operation of the embodiment described above will be explained. At
first, in the transmitter, transmission data a are converted into signals
in a plurality of channels by the serial-parallel converting circuit 101.
Here, for the sake of simplifying the explanation, it is supposed that the
number of channels is N. Further the transmission data a are converted
into the signals so that each output has a lower transmission speed. For
example they are converted into parallel data having a transmission speed
of 1/N or another transmission speed, which is arbitrarily lower than the
transmission speed of the transmission data a. Spread spectrum modulation
(SS modulation) is effected in accordance with the polarity of the signal
in each channel from the serial-parallel converting circuit 101.
The SS modulation is effected e.g. according to either one of two following
systems.
1. CSK (Code Shift Keying) system: System, by which either one of two kinds
of PN codes (PN1) and PN2) is selected to be outputted according to the
polarity of data (signal).
2. OOK (On Off Keying) system: System, by which it is selected according to
the polarity of data (signal) whether a PN code (PN1) should be outputted
or not.
In order to realize the SS modulation operation according to the two
systems described above, the spread spectrum modulator is constructed by
the PN code generator 105 for generating the PN codes (PN1 and PN2) and
the group of selectors 102 for effecting the selection described
previously according to each of the output of the serial-parallel
converting circuit 101. Next the output of each of the selectors in the
spread spectrum modulator is inputted to each of the delay devices in the
group of delay devices 103. Each of the SS modulated signals (information
channels), for which arbitrary delay amounts different from each other are
set, using the phase of the PN code (here it is supposed to be PN1) of the
sounder channel serving as a synchronizing signal for data demodulation,
is obtained, starting from the output of each of the delay devices. This
aspect is indicated in FIG. 3. FIG. 3 represents differences between the
CSK system (b) and the OOK system (c) for different delay amounts
(.tau..sub.1.about. .tau..sub.4), in the case where there are four
information channels 11.sub..about. 14, in which S represents the sounder
channel. Further it represents that the transmission speed of the
transmission data (a) is transformed into lower transmission speeds of the
information channels. Here it is transformed into a transmission speed of
1/4. N SS modulated signals of the information channels obtained from the
different delay devices and the signal of the sounder channel are added in
the analogue manner (multiplexing operation) in the adder 104. The output
of the adder 104 is multiplied by the output of the high frequency carrier
generator in the multiplier 107 to obtain a multiplexed SS signal.
Now, in the receiver, the multiplexed SS signal obtained in the transmitter
is inputted to one of the input terminals of the convolver 201 as the
received signal.
On the other hand, a high-frequency-modulated PN code obtained by
multiplying a PN code obtained by the PN code generator 204 (here a PN
code (PN1), which is in the inverted relation in time with respect to the
PN code (PN1) used in the transmitter, is used) by the output of the high
frequency carrier generator 203 in the multiplier 202 is inputted to the
other input terminal of the convolver as the reference signal.
The convolver 201 carries out correlation operation of the received signal
and the reference signal to obtain a high frequency correlation output
(refer to FIG. 4). In this explanation the gate length of the convolver
(processing time) corresponds to 2T.
In FIG. 4, correlation peaks are obtained, which correspond to the
different PN codes of the different information channels, which are in
different phase relations, by using the phase of the PN code of the
sounder channel explained, referring to FIG. 3, as the reference.
Here a state is indicated, where correlation peaks representing
self-correlations are obtained for the sounder channel and all the
information channels.
Consequently, in the case where no self-corelation can be obtained for
either one of the CSK system and the OOK system (CSK system . . . mutual
correlation, OOK system . . . no correlation), no correlation peak is
produced.
Although, in the above embodiment, the case where convolvers are used for
correlators is described, there is no problem, even if matched filters are
used instead thereof.
However the place where the reference signal is produced is replaced by
patterns on the matched filters and therefore it is unnecessary.
Then the output of the convolver is detected by the detector 207 through
the high pass filter 205 and the amplifier 206 to be transformed into a
signal in the base band information and a logic level pulse train is
obtained by the binary pulse generating circuit 208.
In the binary pulse generating circuit 208 a threshold level is set so that
the correlation peak can be separated from the spurious level in the
optimum manner.
Since the correlation output corresponding to the sounder channel produces
the correlation peaks always periodically, the correlation peak is
detected by the sounder pulse detecting circuit 209 to obtain the
reference time signal.
The reason why such a time signal serving as the reference is necessary is
to make the spread spectrum code synchronization in the usual DS-SS system
unnecessary.
That is, the present invention doesn't relate to a system, by which data
are reproduced by effecting the phase synchronization between the PN code
of the received signal and the PN code of the reference signal on the
convolver, but realizes an asynchronous system, in which a mere code
synchronization process is omitted.
The sampling pulse generating circuit 210 produces a sampling pulse for
sampling a correlation output corresponding to each of the information
channels on the basis of the reference time signal, which is the output of
this sounder pulse detecting circuit 209.
In the case where a convolver is used for the correlator, since the
received signal and the reference signal inputted in the convolver
correspond to each other, the correlation peak is produced at the gate
delay time/2. That is, in this way, the correlation outputs corresponding
to the delay amounts (.tau..sub.1.about. .tau..sub.r) of the different
information channels with respect to the phase of the PN code of the
sounder channel on the transmitter side indicated in FIG. 3 are produced,
separated in time by about .tau..sub.1 /2.sub..about. .tau..sub.4 /2.
Consequently the sampling pulses are produced, taking the property
described above into account. In this way the information detecting
circuit 211 reproduces a data train for each of the information channels
by sampling the correlation output corresponding to the relevant
information channel on the basis of the sampling pulse.
The data obtained here are those having a transmission speed equal to the
lower transmission speed after the serial-parallel conversion on the
transmitter side.
Then the transmission data are reproduced by converting N parallel data
trains thus obtained into serial data in the parallel-serial converting
circuit 212.
The outline of this series of operations is indicated in FIG. 5.
As described above, in the receiver, correlation operation is carried out
by the correlator. The correlation output thus obtained id detected and
converted into binary pulses to obtain a logic level correlation pulse
train. The correlation pulse component corresponding to the sounder
channel is detected from the correlation pulse train signal by the sounder
detecting circuit and such a detection of the correlation pulse component
of the sounder channel serving as the reference signal for the information
channels can be said to be an initial synchronizing process in a broad
sense. Next a concrete example of the sounder detecting circuit will be
explained.
In the transmitter the PN code of the sounder channel is set so that the
correlation output corresponding to the sounder channel is produced always
periodically. For example, PN1 described previously is set successively.
In this way it is possible to detect the sounder by utilizing the
periodicity that the correlation output is produced always periodically.
FIG. 8 indicates an example of the construction of the sounder detecting
circuit, in which 300-l.sub..about. 300-n are delay devices; 301 is an
adder; 302 is a reference value generating circuit; and 303 is a
comparator.
As described previously, supposing that the period of generation of the
correlation pulse component corresponding to the sounder channel is known,
delay times of the different delay devices 300-l.sub..about. 300-n are set
so as to be in accordance with that period and the outputs of the
different delay devices 300-l.sub..about. 300-n are added by the adder 301
in an analogue manner. In this way the number of pulses at that time for
every period of generation of the correlation pulse component is obtained.
For example, when there are 4 delay devices, the greatest number of
pulses, which can be detected, is 5.
The output of the adder 301 is compared with the reference value (5) from
the reference value generating circuit 302 by the comparator 303. The
output signal from the comparator 303 is obtained, when they are in
accordance with each other. In the case where this signal has been
obtained, it is judged that periodical signals have been inputted, i.e.
the sounder pulse has been detected. Although the signal judgment
precision can be improved by increasing the number of stages of the delay
devices described above, the number of stages is properly determined,
taking the circuit scale or the use environment into account.
As described above, the output signal of the comparator 303 stated above is
transmitted to the sampling pulse generating circuit and information is
reproduced by sampling the correlation pulses corresponding to the
different information channels by using sampling pulses obtained by the
sampling pulse generating circuit.
When the multiplexed SS signal is obtained in the transmitter at the
sounder detection described above, in the case where the transmission data
are data, in which 1s succeed one after another, i.e. in the case where
the multiplexed SS signal is obtained to be outputted in the form, in
which PN1s are outputted successively in the SS modulation, the
correlation pulses corresponding to the different information channels in
the outputs of the correlators stated above are produced successively and
periodically similarly to the sounder channel. In this case it is possible
for the sounder pulse detecting circuit to give a detection judgment both
for the correlation pulses corresponding to the sounder channel and for
those corresponding to the information channels.
As the result, in the case where the sounder channel has not been able to
be detected for either one of the information channels, the correlation
pulses corresponding to the information channels cannot be sampled or
erroneous data are reproduced.
In order to solve this problem, following methods (a) and (b) are known.
(a) When data to be transmitted (information) are produced, only the
sounder channel is outputted, as indicated in FIG. 9a, before the
transmission data are multiplexed to output a multiplexed SS signal. The
transmission period is supposed to be sufficient only for detecting the
correlation pulse component corresponding to the sounder channel by the
sounder detecting circuit.
In this case, if there is no high level handshake between the side
inputting data in the transmitter, i.e. the side, where the data to be
transmitted are produced (e.g. when communication between different
personal computers concerns, a personal computer), and the transmitter, a
delay device 400 is disposed in the stage succeeding the serial-parallel
converting circuit, as indicated in FIG. 10 so that the data to be
transmitted (information) are delayed from the beginning of the generation
of the correlation pulse by the transmission period thereof.
(b) When data to be transmitted (information) are produced, as indicated in
FIG. 9b, the transmission data are coded and multiplexed in the
transmitted to output a multiplexed SS signal. As this coding method, a
method, by which 0s are inserted here and there in the transmission data,
in which 1s succeed one after another, according to a predetermined
algorithm, etc. are used so that the correlation pulse corresponding to
the sounder channel can be surely detected by the sounder detecting
circuit. Since 1s don't succeed one after another in this way, erroneous
detections can be removed in the sounder detecting circuit.
In the data reproduction in the receiver, the transmission data are
decoded, before they are reproduced to be outputted. That is, contrarily
to the processing on the transmitter side, the coded transmission data are
restored by removing the inserted 0s according to the predetermined
algorithm. An example of the construction of the principal parts of the
transmitter and the receiver in this case are indicated in FIGS. 11a and
11b.
In these figures, 500 is a coding circuit and 501 is a decoding circuit.
The construction of the other parts is identical to those indicated in
FIGS. 1a and 1b.
The sounder detection described above makes the spread spectrum code
synchronization in the usual DS-SS system unnecessary. That is, it is
devised in order to realize an asynchronous system. Consequently, in this
case, the correlation peak should be surely outputted by the convolver.
For this reason, it is necessary that the information channels should be
longer than the gate length of the convolver. That is, the gate length
(processing time) of the convolver corresponds to 2T (T representing the
transmission data transmission speed). Consequently for each of the
information channels it is preferable that the transmission speed of the
transmission data is transformed into a transmission speed lower than
twice thereof (e.g. 1/4). In this way, a plurality of (e.g. 4) correlation
peaks are produced by the convolver for every bit of each of the
information channels. However, in reality, since the level of the
correlation peak at a variation point of data is undetermined, in the case
where the procedure described above is executed, it is necessary to detect
a sure correlation peak point in 1 bit length of the information channel
data.
As a method for detecting such a sure correlation peak point, a method, by
which variation points of data are recognized to be avoided, may be
adopted. That is, in the case where the data are "0", although no
correlation outputs are produced at the variation points of the data
directly preceding and succeeding it, outputs having some levels are
produced. Consequently, when data to be transmitted are produced,
arbitrary dummy data having an information channel length and variation
points of data for making it possible to detect optimum points are
transmitted. Since these dummy data are subjected also to the
serial-parallel conversion similarly to the usual data, the dummy data are
loaded on either one of the information channels of the multiplexed SS
signal finally obtained and in the receiver only that channel is observed
and detected.
In this case the dummy data should be transmitted before the transmission
data, taking the number of multiplex into account so as to form an
alternate pattern, e.g. 1, 0, 1, 0, 1, 0, . . . , etc. in one of the
information channels.
FIGS. 2a and 2b represent an example of the construction of the principal
parts of the transmitter and the receiver, respectively, in the case where
the method described above for detecting the correlation peak points is
adopted.
In FIG. 2a, 600 is a delay device; 601 is a dummy data generating circuit;
602 is a counter (or delay device) having a same delay device as the delay
device stated above; and 604 is a selector. The construction succeeding
the selector is one indicated in FIG. 1a or one of obtained by adding the
circuit indicted in FIG. 10 or FIG. 11a thereto.
FIG. 2b indicates an example of the construction of the information
detecting circuit 211 in the transmitter, in which 700 is a shift
register; 701-1, 701-2, 701-3, . . . 701-n are delay devices; 702 is a
pattern correcting circuit; 703 is a reference value generating circuit;
704 is a comparator; and 705 is an adder. The pattern correcting circuit
702 includes e.g. inverters INV1 and INV2.
In the transmitter indicated in FIG. 2a, e.g. in the case where the number
of multiplex for the information is 4, dummy data 1000000010000000 . . .
generated by the dummy data generating circuit 601 are inputted before the
transmission data by the selector 604, responding to a transmission data
start signal to obtain the multiplex SS signal through the SS convertor,
etc. after the serial-parallel conversion. Since the serial transmission
data to be transmitted are delayed by the delay device 600 during the
dummy data transmission period by a same time as that period, no problem
is produced and the selector 604 switches its output from the dummy data
to the transmission data, responding to the output of the counter, after
the lapse of that period.
In the receiver indicated in FIG. 2b, the correlation pulses from the
binary pulse generating circuit 208 are sampled by sampling pulses by
means of the shift register 700. A correlation pulse corresponding to one
of the information channels of the correlation pulses is inputted to the
delay devices 701-1, 701-2, . . . 701-n. The delay time of these delay
devices is set so as to be equal to the information channel length.
The outputs of the different delay devices are added by the adder 705
through the pattern correcting circuit 702 in an analogue manner. Since in
the pattern correcting circuit 702 an alternate pattern, which is e.g.
101010 . . . , inverters INV1, INV2 are disposed for every two delay
devices. In this way, at a suitable point, the pattern of 101010 . . . is
transformed into a unipolar pattern such as 111111 . . . . Therefore, when
the final output of the comparison with the reference value by means of
the comparator 704 is obtained, it represents the optimum point of the
data, i.e. the point suitable for reproducing the data by sampling.
Although any dummy pattern may be used, inverters in the pattern correcting
circuit of the receiver are set, depending on the dummy pattern. However
the dummy pattern length should be longer than the longest delay time in
the group of delay devices 701, i.e. it should be sufficiently long to be
detected
Next another embodiment of the present invention will be explained.
FIG. 12 indicates an embodiment of the information detecting means 11 and
the parallel-serial converting means 22 corresponding to the information
detecting circuit 211 and the parallel-serial converting circuit 212
indicated in FIG. 16 described previously, constituting the principal part
of the spread spectrum receiver according to the present invention and the
other construction is identical to that described previously.
The information detecting means 11 consists of shift registers 12 and 13
constituting first and second serial-parallel converting means; a group of
OR circuits 14; a correlation peak point detecting circuit 15; and a latch
and parallel-serial converting signal generating circuit 16.
The correlation peak point detecting circuit 15 is provided with a group of
delay devices 17; a pattern correcting circuit 18 including inverters INV1
and INV2; an adder 19; a reference value generating circuit 20; and a
comparator 21 so as to detect sure correlation peak points in a one-bit
length of the information channel data to output a data detecting signal.
The parallel-serial converting means 22 is provided with a latch circuit 23
and a selector 24. The latch circuit 23 is controlled by a latch signal e
from the circuit 16 described above, while the selector 24 is controlled
by a parallel-serial converting signal f.
FIG. 13 is a timing chart for explaining the operation of the embodiment
described above, in the case where the transmission data are 1, 0, 1, 1,
in which a represents correlation pulses; b first information sampling
pulses; c second information sampling pulses; d sounder sampling pulses;
and g reproduced data.
Next the operation of the embodiment described above will be explained.
At first, correlation pulses a corresponding to the transmission data are
inputted to the shift register 12, responding to sampling pulses (first
information sampling pulses b), which sample sure correlation peak points
in a one-bit length of he information channel data obtained from the
sampling pulse generating circuit after the sounder pulse detection.
Next correlation outputs for the succeeding period, which are sure
correlation peak points in a one-bit length of the information channel
data, are inputted to the shift register 13 by the second information
sampling pulses identical to the first information sampling pulses delayed
by about the gate length/2 of the convolver. Then parallel outputs
QA.sub..about. QD and QA'.sub..about. QD' of the shift registers 12 and
13, respectively, are inputted to the group of OR circuits 14 to form
respective logic sums.
This is done for effecting reproduction of the information by using sure
correlation peak points and correlation peaks produced in the succeeding
period, because a plurality of correlation peaks from the convolver are
produced in a one-bit len | | |
