A power amplifier circuit includes an amplifying transistor and a dc bias circuit for biasing the amplifier transistor to obtain a conduction angle of at least about 180.degree.. The dc bias circuit includes a self-bias boosting circuit for initially decreasing and then increasing the dc bias voltage provided to a control terminal of the amplifying transistor by the dc bias circuit as the input signal provided to the power amplifier increases. The self-bias boosting circuit is extremely simple and compact in design, and permits the power amplifier circuits to operate in Class B or Class AB with improved power output characteristics.

An K-band amplifier circuit (10) with two samplers (12, 18) coupled to detectors (22, 26) that detect an input and an output RF signal level. These two reference signals are provided to a differential gain control circuit (24) which is coupled to one or more variable gain amplifier (VGA) (14) stages. The VGAs compensate for the gain of an entire chain of amplifiers (16). When the individual amplifier gains vary for any reason, (i.e., process, temperature effects or end of life degradation) the variation in gain causes higher or lower levels of detected output reference signals for a given RF input signal. The gain control circuit (24) drives the VGA (14) up or down as appropriate. By maintaining a constant offset in input and output reference control signals, the gain control circuit (24) drives the amplifier chain (16) to a constant gain.

A frequency-adjustable direct current biasing circuit is disclosed for providing a DC bias voltage or a DC connection to ground for an RF or microwave circuit without substantially affecting the RF or microwave signal of the circuit. The biasing circuit includes a transmission line having a first portion for connection to the RF circuit and a second portion connected to a low-impedance-to-ground structure, such as a bypass capacitor or a DC path to ground. The electrical length between the first and second portions is about 90 degrees. The biasing circuit further includes an open ended tuning stub coupled to the transmission line that has a length that is adjustable. By adjusting the length of the tuning stub, the biasing or grounding circuit can provide better isolation for RF energies at different selected frequencies. Also disclosed herein is a dielectric resonator oscillator (DRO) that uses the frequency-adjustable biasing circuit. Further disclosed is a DRO that includes a FET gate return having an RF-shunted, relatively high resistance coupled to the gate of a field effect transistor by way of a quarterwave transmission line. This improved FET gate return provides for reduced phase noise of the DRO.

An automatic gain compensation circuit for actively adjusting the gain of an amplifier caused by in-loop and/or out-of-loop influences on system gain. Two matched RF detectors convert pre- and post-amplified signals to input and output voltages representative of the power of the RF signals. A gain control circuit which may include a Digital Analog Converter (DAC) utilizes an offset voltage that is weighted along with the input and output voltages to produce an error voltage. The error voltage is used to drive a voltage-controlled attenuator within the amplification path. Operational amplifiers may be used in the weighting circuits for weighting the input, output, and offset voltages in order to prevent loading of the RF detector outputs and to obtain rapid settling time. During amplifier operation, the offset voltage is adjusted by a processing unit to compensate for gain changes in the amplifier due to out-of-loop temperature-related influences on system gain.