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Plastic pin grid array package with locking pillars
   
Document Number
US Patent 5255157
Issued Date
October 19, 1993
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Abstract
A plastic pin grid array package is detailed. Where the semiconductor device is mounted within a cavity in the printed wiring board, it is surrounded by a ring of holes that extend completely through the board. When the plastic housing is transfer molded around the face of the board, plastic will enter the holes thereby forming plastic pillars that lock the encapsulant to the board mechanically. When the package is flexed, the pillars will prevent any motion between the encapsulant and the board or the semiconductor device mounted thereupon. The invention can be applied to single or multichip packages. It can be employed in any package that is based upon a printed wiring board substrate.
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Plastic pin grid array package with locking pillars - US Patent 5255157 Drawing
Drawing from US Patent 5255157
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Number of Claims:
9
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Owner
Published
October 19, 1993
Application Number
07/824,641
Filed
January 24, 1992
US Classification
361/783   174/522 174/549 257/787 257/E21.502 257/E23.061 257/E23.125 361/761 361/807
Int'l Classification
H01L   21/56   (20060101)   H01L   23/498   (20060101)   H01L   21/02   (20060101)   H01L   23/48   (20060101)   H01L   23/28   (20060101)   H01L   23/31   (20060101)  
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USPTO Field of Search
361/388   361/389   361/397   361/400   361/401   361/412   361/417   361/420   174/52.2   174/255   174/260   357/68   357/70   357/71   357/72   357/74   357/80  
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Description
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