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Memory circuit including an EEPROM provided with unique addressing means for storing at selected memory cells frequently incremented count data    

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United States Patent5280438   
Link to this pagehttp://www.wikipatents.com/5280438.html
Inventor(s)Kanemaru; Kenji (Toyota, JP)
AbstractA counter is provided which updates a most-recent counter value to be stored in a non-volatile memory. The counter includes a counter circuit for receiving a series of count pulses defining a count operation and outputting a series of coded binary signals in response thereto. Each one of the series of coded binary signals includes at least first digit data and second digit data. A selecting circuit is coupled to the non-volatile memory and the counter circuit for logically selecting, in response to each respective second digit data, a first select memory cell in the non-volatile memory for which the corresponding first digit data is to be stored. A write control circuit is coupled to the non-volatile memory and the counter circuit for writing a subsequent first digit data over the first select memory cell when a counting operation of the respective digit value has not reached completion, and writing the subsequent first digit data in a different memory cell when a counting operation of the respective digit value has reached completion.
   














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Drawing from US Patent 5280438
Memory circuit including an EEPROM provided with unique addressing means

     for storing at selected memory cells frequently incremented count data - US Patent 5280438 Drawing
Memory circuit including an EEPROM provided with unique addressing means for storing at selected memory cells frequently incremented count data
Inventor     Kanemaru; Kenji (Toyota, JP)
Owner/Assignee     Nippondenso Co., Ltd. (Kariya, JP)
Patent assignment
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Company News
Publication Date     January 18, 1994
Application Number     07/846,959
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     March 6, 1992
US Classification     377/50
Int'l Classification     G06F 015/20
Examiner     Cosimano; Edward R.
Assistant Examiner    
Attorney/Law Firm     Cushman, Darby & Cushman
Address
Parent Case     This is a continuation of application No. 07/358,791, filed May 30, 1989 now U.S. Pat. No. 5,095,452.
Priority Data     May 30, 1988[JP]63-131957 Jun 09, 1988[JP]63-142633 Jun 14, 1988[JP]63-146612
USPTO Field of Search     235/95 R 364/561 377/24.1 377/26 377/50
Patent Tags     memory circuit including eeprom provided unique addressing means storing selected memory cells frequently incremented count data
   
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5095452
Kanemaru
702/165
Mar,1992

[0 after 0 votes]
4803707
Cordan, Jr.
377/24.1
Feb,1989

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4750104
Kumamoto
700/56
Jun,1988

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4718168
Kerr
33/735
Jan,1988

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4682287
Mizuno
702/165
Jul,1987

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4638457
Schrenk
365/189.01
Jan,1987

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4519969
Murakami
264/210.7
May,1985

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Nozawa
700/193
Apr,1985

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4162443
Brearley
324/76.58
Jul,1979

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4125295
Ruhnau
303/156
Nov,1978

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3978727
Griverus
73/861.03
Sep,1976

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3947664
Cox
377/24
Mar,1976

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3858033
Esch
377/50
Dec,1974

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Konisi
377/50
Oct,1974

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377/50
Jun,1973

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Betz
377/50
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427/445
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Jun,1971

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I claim:

1. A non-volatile counter comprising:

a counter circuit for generating parallel bit codes in response to externally provided count pulses, said parallel bit codes including higher digit bit codes and lower digit bit codes;

an electrically erasable and writable non-volatile memory for storing at least the lower digit bit codes at a memory cell selected by a lower digit controlling circuit on the basis of said higher digit bit codes, said memory cells being arranged in matrix configuration including a plurality of rows and columns; and

write controlling means for storing said at least lower digit bit codes in the memory cell selected by said lower digit controlling circuit, said write controlling means including:

means for reading the contents of a selected memory cell corresponding to a previous lower digit bit code stored therein and comparing said contents to a current lower digit bit code to be written in the selected memory cell;

means for erasing the contents of said selected memory cell before writing said current lower digit bit code thereto when said previous lower digit bit code differs from said current lower digit bit code at more than one bit position relative to each other, and performing only a single bit write operation otherwise; and

column designating means coupled to said lower digit controlling circuit for selecting a memory cell associated with a column adjacent to a first column of a previously stored lower digit bit code when a count operation associated with said first column has been completed.

2. The non-volatile counter of claim 1, wherein said erasing means erases all bit positions of all columns associated with the row of the selected memory cell to be erased.

3. The non-volatile counter of claim 1, wherein said counting circuit generates said parallel bit codes based on coding scheme which minimizes the number of times the erasing means must erase the selected memory cell just before a subsequent lower digit bit code, differing by more than one bit position from a previous lower digit bit code, must be written thereto, and before a count operation associated with said selected memory cell has ben completed.
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BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a non-volatile counter, and more precisely, relates to a non-volatile counter in which data is stored in erasable and writable semiconductor non-volatile memory devices.

2. Description of the Related Art

A non-volatile counter in which a counter circuit for counting pulses and a non-volatile memory device such as EEPROM or the like are arranged in parallel to each other, wherein when the value of the counter is changed that value is written in the EEPROM, is well known.

The non-volatile counter can be used as an electronic trip meter of a car or a data collecting device in a plant or the like as it can hold data in the memory after the electric power supply thereto is shut off.

The non-volatile counter provided with the non-volatile memory device such as EEPROM or the like, however, has a problem in that a maximum counting value to be counted is necessarily restricted to a certain value, due to a limitation of the number erasing and writing operations of the EEPROM. Note, since the EEPROM has an endurance characteristic, the number of the erasing and writing operations thereof is naturally limited; for example, when a binary counter is used, the number of changes of data is largest in the least significant bit (LSB), and thus the upper limit of the counting value is inherently decided by the capacity to change the number of data per unit time in the least significant bit (LSB).

Further, when a deficit arises in a memory cell and when the bit in which the deficit arises is a higher digit, the data obtained therefrom is completely different to the correct data.

To overcome these problems, a counter in which a plurality of memory cells for memorizing the count value, especially in a lower digit, is provided in the EEPROM, and the count values for the lower digit are sequentially written in one of the memory cells in turn, to thereby improve the upper limitation of the count value, has been proposed, or a counter in which the same counted values are stored in a plurality of the memory cells and one data thereof is selected therefrom by applying a majority logic thereto, to thereby improve a reliability thereof, also has been proposed.

Even when these counters are used, however, the problems above are not necessarily completely resolved.

Note, when these counters are used, other problems arise in that the number of the cells is naturally increased, and moreover, a monitoring operation for checking a number of writing operations of the memory cells or an operation for processing a majority logic to check the reliability of the cells, must be carried out separately.

Further, when performing these operations, a micro-computer for controlling these operations is usually required, to thereby make the construction of the cells complicated, and accordingly, the reliability thereof will be lost.

Further, in this case, when the micro-computer malfunctions, it becomes difficult to read the count value.

Therefore, to overcome these problems, the present invention provides a non-volatile counter having a simple construction which can improve the upper limitation for the counting value, and further, improve the reliability of the memorized counting value.

To attain the above object of the present invention, there is provided a non-volatile counter which updates data stored in erasable and writable non-volatile memory devices based on count data and performs a counting operation, said memory devices being arranged as an array of cells having a predetermined number of bits, wherein said counter is provided with a selecting means for selecting a cell corresponding to a value of a predetermined digit of said count from said cell array and a writing means for writing data corresponding to the value of a digit different from said predetermined digit in said selected cell.

3. Mode of operation

The non-volatile counter used in the present invention carries out a counting operation by updating the data stored in the cell array having a predetermined bit number and forming an erasable and writable non-volatile memory device, based on count data.

Note, in the present invention, a cell corresponding to a value of the predetermined digit of said count from said cell array is selected by the selecting means and data corresponding to the value of a digit different from said predetermined digit is written in the selected cell by the writing means.

Namely, in the present invention, a plurality of cells are not simply provided in the non-volatile memory device for storing the count value but are arranged in a cell array, and thus a specific cell in the cell array can be designated by a value of a predetermined digit of the count value.

Therefore, the number of writing operations for writing data and the erasing operation for erasing same from each of the cells, can be reduced in proportion to the number of cells arranged in the cell array, and further, each cell can carry not only a value of a certain digit which the cell has memorized but also a value of a certain digit with respect to a position thereof in the cell array.

4. Effect of the Invention

According to the non-volatile counter used in this invention, cells comprising an array of a predetermined number of bits, constituting a volatile memory, are selected according to the predetermined digits of the count and data corresponding to the value of another digit is written in the cell, so the numbers of the erasing and writing operations per cell can be remarkably reduced at the lower digits of the conventional simple counter, and thus a superior and improved reliability of the count to be stored is obtained.

Further, each cell comprising the non-volatile memory carries not only information on the value of a certain digit stored by the cell but also information on the value of a predetermined digit obtained by the position of the cell in the array, so the volume of the information stored can be increased compared to the case wherein a plurality of cells is used.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of an odometer of an automobile to which the present invention is applied;

FIG. 2 is a block diagram of an IC circuit used in a control means shown in FIG. 1;

FIG. 3 is a table of the timing of adjustment of the pulse counting operation;

FIG. 4 is a flow chart of a program for changing the display value used in this invention;

FIGS. 5 and 6 are charts illustrating examples for switching the display value and relationships between each switching operation and the actual number of the output pulses;

FIG. 7 is a block diagram of a device for displaying a physical measure of this invention;

FIG. 8 is a table illustrating another example of the timing of adjustment of the pulse counting operation;

FIGS. 9A, 9B, 9C and 9D collectively show one embodiment of a counter used in this invention showing a non-volatile memory counter;

FIGS. 10(A) and 10(B) show a code system used with the counter shown in FIG. 9;

FIG. 11 is one embodiment of a circuit for a row-decoder used in the non-volatile memory counter shown in FIG. 9; and

FIGS. 12A, 12B, 13, and 14 are charts illustrating the embodiments used with the coding system in the counter shown in FIGS. 10(A) and 10(B).

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will be explained with reference to a digital odometer for an automobile.

FIG. 1 is a block diagram schematically showing a digital odometer for an automobile. In FIG. 1, 1 is a reference pulse generator, mounted on, for example, a gear of a wheel of an automobile, which generates a pulse (reference pulse) at every rotation of the wheel. The generator 1 is set to generate 637 pulses per kilometer running.

Reference 2 is a control device which calculates the running distance of the automobile in either units of kilometers or units of miles by counting the clock pulses from the reference pulse generator 1. Reference numeral 3 is a switching means provided on the control device 2 for switching the processing operation in the control device 2 between the units of kilometers for automobiles used in Japan and units of miles for automobiles used in the U.S. Reference numeral 4 is a display device which displays the running distance of the automobile on a panel provided inside the automobile cabin in accordance with the state of the switching means 3.

FIG. 2 is a block diagram of an IC circuit used inside the control device 2 shown in FIG. 1.

In FIG. 2, reference numeral 5 is a .mu.ROM including a control program for commanding the transfer of data. Reference numeral 6 is a kilometer display EEPROM which stores the running distance of the automobile in units of kilometers. Reference numeral 7 is a mile display EEPROM in which is stored the running distance in units of miles. The value of the EEPROMs 6 and 7 can be selectively displayed on the display panel inside the automobile cabin by the display device 4. In this invention, a RAM may be used instead of using the EEPROMs.

Reference numeral 8 is, a RAM for storing a count of the clock pulses generated from the generator 1, 9 is a data ROM for previously storing a predetermined mile display and a predetermined count of the clock pulses, 10 is an incrementor, 11 is a comparator, and 12 is an internal bus.

The basic principle for adding the running distance used in this invention will now be explained. As explained above, the generator 1, which generates one reference pulse corresponding to a length of one rotation of a wheel of an automobile, i.e., the first physical measure, generates exactly 637 pulses per kilometer. The technology for displaying the running distance in units of kilometers from the reference signal pulses is well known, so the explanation thereof will be omitted.

When it is judged necessary from the state of the switching device 3 to display the distance in miles, as mentioned earlier, it is sufficient to convert it using about 1025.152128 pulses as 1 mile (corresponding to the second physical measure defined in this invention and a physical measure not a whole multiple of the reference signal pulses).

However, counting reference clock pulses in decimal fractions requires a complexed processing operation and additional new memories, so is disadvantageous.

On the other hand, if one adds one mile at every 1025 reference pulses, as the running distance increases, the value displayed will gradually become larger than the actual running distance, so the problem arises that the accuracy will increasingly deteriorate. For example, in such a system, when 10250 pulses are counted, 10 miles will be displayed, i.e., there will be an error of one pulse with respect to respect to 10,251 pulses.

In the embodiment of this invention, to overcome this problem, the count of the clock pulses is adjusted just once at some one point before 10 miles' running, whereby the actual number of clock pulses is made 10,251, though only 10,250 pulses were really counted. Therefore, the accuracy can be improved. This operation is repeated with every 10 miles' running by a suitable program.

Even performing such an operation every 10 miles, the system displays 100 miles when 102,510 pulses are counted, so even in this case, the 100 miles is displayed 5 pulses earlier than when an actual 102,515 pulses are counted.

Accordingly, it is advantageous to adjust the count by five pulses before each 100 miles is reached. That is, assuming that 1025.152128 pulses correspond to 1 mile and using as the approximate number of pulses the uppermost four digits of the same, i.e., 1025, it is sufficient to make adjustments for the value 0.152128, below the decimal point, the same number of times as the figures of each digit at a suitable timing.

The basic idea behind this timing is that, if the digits following the lowest digit of the approximate number of pulses 1025 is the l th digit (l is a natural number) lower than the lowest digit, adjustment of the counting of the clock pulses the same number of times as the figures of each digit before 1025.times.10 l pulses are counted, would enable suppression of the conversion error to mile units to an extremely small level. (Note that, in this embodiment, "adjustment" means to count extra clock pulses).

For example, even by making adjustment to only up to the third digit displayed (up to 1000 mile) and without making any adjustment to the fourth digit on, the display error over the true value after even one million miles is less than 0.2 mile.

Accordingly, in the present invention, a quite practical value for indicating the actual running distance can be obtained.

On the other hand, the information indicating when such adjustment should be carried out is stored in a predetermined address of a data ROM 9. One example of the timing is indicated in (a) of FIG. 3. Note that (a) represents a timing table indicating the times at which an adjusting operation takes place.

FIG. 3 is a two-dimensional map and shows the state of storage in the data ROM 9 of display data to be adjusted.

The vertical column shows the digits corresponding to the current displayed value (units of mile) (with 0.1 mile as the lowest digit).

The horizontal row shows the value of change of the current displayed values corresponding to each digit.

In FIG. 3, circles C, D, E, F, and G are given to certain addresses of the table. Adjustment is performed when the current displayed value moves to those addresses. At portions with no circles, the usual operation goes on and the display value is changed at every 1025 pulses counted.

Each of circles C through G represent a time at which the adjustment should be carried out for the 10 mile digit. Thus, when the 10 mile digit changes from 1 to 2 as shown by reference C in FIG. 3, the adjustment takes place, and the 10 mile digit number is changed from 1 to 2 after 1026 pulses have been counted. Other circles D-G in FIG. 3 represent similar timings.

On the other hand, regarding to the digits below the decimal point, normally, the display value is changed at every 102 pulses counted, but in circle mark portions, the display value is changed at every 103 pulses.

For example, supporting that the current displayed value is 244.6 miles. When this value is about to change to 244.7, adjustment is made since a circle is stored at the address A in the horizontal column of FIG. 3 for the 0.1 mile digits.

As explained above, in this situation, the current displayed value is changed to 244.7 after 103 pulses are counted.

Suppose that the current displayed value is 243.9. When this value is about to change to 244.0, adjustment will be carried out because a circle is stored in the address B in the horizontal column in FIG. 3 of the 1 mile digit. In this situation, the current displayed value is changed to 244.0 after 1026 pulses are counted.

The portion (b) of FIG. 3 shows the stored values for the count of clock pulses in the RAM 8 when the current displayed value is changed. The parenthesized numerals shows the actual number of output pulses of when the adjustment is carried out.

The accuracy can be improved by uniformly dispersing the adjustments at equal intervals, but it is also possible not to specify any particular locations and set them by random numbers.

It is preferable that the storage addresses of the digits of the display data to be adjusted should be kept from overlapping as much as possible.

In this invention, when the current displayed value is changed, the timing of this is based upon the time when the value of the lowest digit of the current displayed value changes from the predetermined value to a successive value. However, it is preferable that the change from the predetermined value to the successive value be from 9 to 0.

The operation of this invention will be explained with reference to the flow chart shown in FIG. 4.

Note that all the following processing steps are previously stored in the .mu.ROM 5.

FIG. 4 shows the processing in the program for changing the current displayed value.

At step 100, it is discriminated whether a pulse generated by a reference pulse generator 1 is input in this system. In other words, if a clock pulse is recognized, the answer to the question shown in the diamond representing step 100 is "Yes," and the program proceeds to step 150. If a clock signal exists, the answer to step 100 is "No," and step 100 is repeated. Each time a pulse is input, steps 150 on are executed.

At step 150, it is determined whether a flag F indicating the timing for carrying out the adjustment is ON or not. When F=0 at step 150 (flag is OFF), the process goes to step 200.

As step 200, data of a count n of the clock pulses stored in the RAM 8 is transferred to an incrementor 10 through an internal bus. The count is incremented by 1, and the value n+1 is set as a new count N.

At step 300, this n is transferred to a comparator 11. A count m (in this case, m is 1025), previously stored in the data ROM 9 as an approximate pulse number, is also transferred to the comparator 11. The value n and m are compared.

If the value n reaches the value m (n.gtoreq.m), the process goes to step 400. If the value n has not yet reached the value m, the process goes to step 700 and the instant value n is returned to the RAM 8 and stored therein.

At step 400, the current displayed value indicated in units of miles stored in the EEPORM 7 is transferred to the comparator 11, while the table indicating the timing at which the adjustment of the clock should be carried out and stored in the data ROM 9, is transferred to the comparator 11.

At step 500, utilizing the table, it is determined whether the values of each digit of a display data to be adjusted and the current mile displayed value coincide. When they coincide (that is, adjustment should be carried out), the process goes to step 600. If not, the process goes to step 800.

At step 600, a flag F indicating the adjustment is ON, i.e., F=1. If F=1, when the next pulse is input, the process goes to step 160 through step 150, whereby the flag F is turned OFF (F=0) and the process goes directly to step 800 without going through steps from 200 to 500.

In accordance with this process, the adjustment of this invention is carried out and the current displayed value is changed after an extra 1 pulse is counted.

At step 800, the count n stored in the RAM 8 is reset to zero, i.e., the number n is cleared. At the following step 900, the displayed value in the EEPROM 7 is incremented by 1.

After steps 600, 700, and 900, the process goes to the next routine.

According to the process as mentioned above, referring to the 10 digit place, for example, the display value is changed along with addresses C, D, E, F, and G in the 10 mile digits of FIG. 3 as 19 miles.fwdarw.20 miles, 39 miles.fwdarw.40 miles, 59 miles.fwdarw.60 miles, 79 miles.fwdarw.80 miles, and 99 miles.fwdarw.100 miles. In actuality, the change is made after the automobile runs 1026 pulses instead of 1025 pulses.

FIGS. 5 and 6 show the relationship between the change of the display by the display device 4 in the passenger compartment and the actual number of pulses output from the reference pulse generator 1.

FIG. 5 shows the case in which the lowest unit of the display is one-tenth of a mile, while FIG. 6 shows the case in which the lowest unit is one mile.

According to this invention, the display of miles can be realized with a high accuracy by just switching a switching device. In this embodiment, further, the adjustment can be realized by amending the control program of the .mu.ROM 5 and slightly increasing the capacity of the memory devices, so production costs are almost the same as in the prior art where no adjustment is performed.

Another embodiment of this invention will be explained below. This embodiment is characterized by the method for storing the display data to be adjusted in the data ROM 9. The constituent elements, circuits, etc. are the same as those in the previous embodiment, so an explanation thereof will be omitted.

In this embodiment, a reference pulse generator 1 which generates exactly 2548 pulses per kilometer and 4100.608512 pulses per mile is used. Further, in the approximate number of pulses is set at 4100, and adjustment is carried for three digits following the lowest digit of the approximate number of pulses (i.e., 0.608).

Note, for example, the display data to be adjusted stored at the address P in FIG. 8. When the current displayed value on the display device 4 changes from 299.9 to 300.0, the comparator 11 determines at step 500 that the two values (display value and display data) coincide. This timing corresponds to when the lowest digit of the current displayed value changes from 9 to 10 (0).

In this situation, in FIG. 8, suppose a display data to be adjusted, is stored in one or more the addresses S.sub.1, S.sub.2, and S.sub.3 where the values of the digits (0.1, 1, and 10) of the digits of a display data to be adjusted other than the highest digit (100) change from 9 to 10 (0). In this case, at least 2 pulses are simultaneously adjusted at the timing when 299.9 changes to 300.0.

Therefore, in this embodiment, display data to be adjusted are not stored in the addresses S.sub.1, S.sub.2, and S.sub.3 as shown in FIG. 8, so 2 or more pulses are never simultaneously adjusted.

It is preferable that the error between the actual running distance of an automobile and the distance obtained by counting pulses fall within one pulse. The adjustment of two or more pulses simultaneously is a problem because of causes more than one pulse worth of error. In this embodiment, however, 2 or more pulses are never simultaneously adjusted, so the error is always kept within one pulse and thus the accuracy can be improved.

This invention is effective when the display data to be adjusted, is not stored in addresses where the value of the 0.1 digit of the lowest digit of the display data to be adjusted, changes from 9 to 10 (0). The timing at which the comparator 11 determines coincidence is the same for predetermined values even other than the timing where the value when the lowest digit of the current displayed value changes from 9 to 10 (0).

In these embodiments, the adjustment is made by adding a predetermined number of pulses, for example, one pulse, to the approximate number of pulses at a suitable timing and at a suitable frequency, but when the approximate number of pulses is set in a different way, the adjustment may be made by subtracting predetermined number of pulses.

In this invention, a second physical measure and a third physical measure may be displayed simultaneously or one of them may be selectively displayed by a suitable switching means. In that case, the second physical measure need not be a whole multiple of the pulses and the third physical measure may be whole multiple.

For example, the second physical measure and the third physical measure may be displayed in units of miles and kilometers respectively.

This invention is not restricted to only digital electronic odometers for automobile and can also be applied to any usage in which the physical measure is obtained by counting pulses of a predetermined interval and the physical measure to be counted is not whole multiple of counted pulses.

Accordingly, in this invention, time, weight, or the like are included as the first physical measure in addition to distance.

Another application of this invention is for a stage moved by a pulse motor. If the moving distance of the stage is not a whole multiple of the pulse or pulse interval, the distance can easily be obtained utilising the present invention.

The invention is also useful when changing the tire diameter of an automobile.

That is, when an automobile tire is changed from a standard size to a different size, the number of pulses corresponding to 1 kilometer will no longer be integral. This can be dealt with by the measuring system of the present invention.

Further, if the display value to be adjusted is stored in an externally rewritable semiconductor memory device, for example, an EEPROM, the contents of the memory can be rewritten so as to deal with such a case effectively when it occurs.

Another application of this invention is to quarantee the accuracy of the oscillator such as a crystal used for a watch or the like or to change the oscillator to one having a different oscillating frequency.

Below, an explanation will be made of a counter in accordance with this invention and useful as a counter for a physical measure display device, particularly a counter having non-volatile characteristics, and a coding system used for the same.

In a display device such as one of the present invention, a tremendous amount of calculations are always performed and therefore a large number of memories must be provided. The size of the device thus becomes large and the production costs thereof increase. Further, there is an adverse effect on accuracy. In the prior art, when the same data processing as in this invention is carried out, the accuracy of the measuring system has been kept at a certain level by restricting the number of memories even at the expense of some accuracy.

The embodiment of the present invention explained below improves on the drawbacks of the prior art and, while restricting the number of memories, uses a non-volatile counter which can impro