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Polishing pad and method for polishing semiconductor wafers
   
Document Number
US Patent 5287663
Issued Date
February 22, 1994
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Abstract
A polishing pad and a method for polishing semiconductor wafers. The polishing pad includes a polishing layer and a rigid layer. The rigid layer adjacent the polishing layer imparts a controlled rigidity to the polishing layer. The resilient layer adjacent the rigid layer provides substantially uniform pressure to the rigid layer. During operation, the rigid layer and the resilient layer apply an elastic flexure pressure to the polishing layer to induce a controlled flex in the polishing layer to conform to the global topography of the wafer surface while maintaining a controlled rigidity over the local topography of the wafer surface.
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Polishing pad and method for polishing semiconductor wafers - US Patent 5287663 Drawing
Drawing from US Patent 5287663
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Number of Claims:
7
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Owner
Published
February 22, 1994
Application Number
07/874,823
Filed
April 28, 1992
US Classification
451/539  
Int'l Classification
B24B   13/00   (20060101)   B24B   13/01   (20060101)   B24B   37/04   (20060101)   B24D   11/00   (20060101)  
Examiner
Attorney/Law Firm
Parent Case
This is a continuation of application Ser. No. 07/824,709, filed Jan. 21, 1992, now abandoned.
USPTO Field of Search
51/401   51/402   51/407   51/394   51/395   51/397  
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Description
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