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Simplex sequence controller
   
Document Number
US Patent 5317724
Issued Date
May 31, 1994
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Abstract
A simplex sequence controller for transmittal of output data is disclosed and includes a time base generator for generating a timing signal, a memory device having a plurality of addressable sequential storage locations for storing a sequence of data pattern with a plurality of output lines and a plurality of input address lines connected to the storage locations, along with an addressing apparatus connected to the memory device input address lines for directing access to predetermined storage locations at predetermined points in the data sequence, and address reset apparatus providing feedback from a first predetermined one of the output lines of the memory device to the addressing apparatus to direct access to a predetermined initial data sequence for output from the memory.
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Simplex sequence controller - US Patent 5317724 Drawing
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Number of Claims:
15
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Published
May 31, 1994
Application Number
07/861,449
Filed
April 1, 1992
US Classification
711/5   700/14 700/23 700/9
Int'l Classification
G05B   19/04   (20060101)   G05B   19/07   (20060101)  
Attorney/Law Firm
USPTO Field of Search
364/138   364/140   364/141   364/143   395/275   395/325   395/375   395/425   395/550   395/700   395/725  
Related Patents
6343355 - Sequence controller capable of executing different kinds of processing at respective periods - Owned by Oki Electric Industry Co., Ltd. (Tokyo,JP)

A sequence controller includes a sequencer to which a basic clock is applied. The sequencer sequentially generates at a period of 125 .mu.sec address signals for reading statements to be executed at a period of 125 .mu.sec and one block of statements to be executed at a period of 10 msec or one block of statements to be executed at a period of 100 msec. A memory stores the above statements beforehand. The statements are selectively read out of the memory in accordance with the address signals and fed to a decoder. The decoder decodes the statements and generates control signals respectively corresponding to the statements and feeds the control signals to a switch. The switch controls each of a plurality of function registers on the basis of the respective control signal.

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