An application binary interface includes linkage structures for interfacing a binary application program to a digital computer. A function in a relocatable shared object module obtains the absolute address of a Global Offset Table (GOT) in the module using relative branch and link instructions through the computer's link register. A dynamic linker lazily constructs a Procedure Linkage Table (PLT) and a pointer table for an object module in a process memory image in which space is allocated for the PLT, but the PLT is not initially provided. The pointer table stores absolute addresses of external functions that cannot be reached by relative branching from the module. The PLT receives calls to these functions, gets the absolute addresses from the pointer table and branches to the absolute addresses of the functions. The PLT also receives calls to functions that can be reached by relative branching from the module, and causes relative branching to the functions. A status instruction precedes each call instruction to a variable argument list function that can pass floating point arguments, indicating if floating point arguments will actually be passed. If so, the function saves the contents of the floating point argument registers in memory. If not, the contents of the floating point argument registers are not saved. Virtual address spaces are allocated for processes respectively. Page table entries for translation of the virtual address spaces into physical addresses are not removed as processes terminate, but only after all virtual address spaces have been allocated.

An application binary interface includes linkage structures for interfacing a binary application program to a digital computer. A function in a relocatable shared object module obtains the absolute address of a Global Offset Table (GOT) in the module using relative branch and link instructions through the computer's link register. The GOT contains addresses of global data such as constants and variables that are identified by symbols and are located outside the module. Implementation requires only three simple instructions, one in the GOT and two in the calling function. The module can load the absolute address of a data item into appropriate registers and read or write the data from memory using a conventional RISC relative address read or write instruction.

A language processing method detects function call in a source program by static analysis, inserts a branching code to profile process per function call detected in the source program and setting a region of a table storing number of times of corresponding function call per an identification number of call pair in function call, executes translation of the source program inserted the branching code to the profiling process, and increments number of function call of the table with taking the identification number corresponding to kind of call pair in corresponding function call, as index, when the inserted profiling process is present.

A processor for processing a program with commands, which has a mother program with a sub-program jump command and a sub-program, which is to be processed in response to the sub-program jump command. The processor has a command processor, which is adapted in the mother program upon occurrence of the sub-program jump command, to extract back-up information about data required in the mother program after processing the sub-program from the sub-program jump command, to back-up data required in the mother program after execution of the sub-program based on the back-up information, to extract a destination address from the sub-program jump command, which refers to the sub-program, and to effect the continuation of the processing of the program with the sub-program based on the destination address.

A processor employing a map unit including register renaming hardware is shown. The map unit may assign virtual register numbers to source registers by scanning instruction operations to detect intraline dependencies. Subsequently, physical register numbers are mapped to the source register numbers responsive to the virtual register numbers. The map unit may stores (e.g. in a map silo) a current lookahead state corresponding to each line of instruction operations which are processed by the map unit Additionally, the map unit stores an indication of which instruction operations within the line update logical registers, which logical registers are updated, and the physical register numbers assigned to the instruction operations. Upon detection of an exception condition for an instruction operation with a line, the current lookahead state corresponding to the line is restored from the map silo. Additionally, physical register numbers corresponding to instruction operations within the line which are prior to the instruction operation experiencing the exception are restored into the current lookahead state. The map unit may use the same physical register to store both a condition code result and an integer result. The physical register number identifying the physical register is recorded for both the condition code register and the integer register. The map unit pops the previous renames from the architected renames block upon retiring one or more instruction operations. The popped physical register numbers are cammed against the updated architectural state. If a cam match is detected, the popped physical register is not freed.