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Claims  |
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We claim:
1. Data transmission method for different classes of traffic with different
synchronization and/or delay requirements (multi-media communication), in
a network comprising stations and interconnection media which carries
information organized into slots of constant size and with predefined
framing periods for circuit-switched (CS) transmission, said media
carrying asynchronous, synchronous, and circuit-switched slots and
signalling traffic, comprising the following steps:
for asynchronous traffic (delay insensitive data traffic) embedding said
asynchronous slots between a start-end delimiter pair characterizing and
controlling said asynchronous traffic and indicating an address, and, if
required, using a first insertion buffer means for delaying or bypassing
said synchronous slots in said stations,
for synchronous traffic (delay sensitive data traffic) embedding said
synchronous slots between a start/end delimiter pair characterizing and
controlling said synchronous traffic and indicating an address, and, if
required, using a second insertion buffer means for delaying or bypassing
said synchronous slots in said stations,
for signalling traffic, which is inserted on demand, embedding signalling
slots between a start/end delimiter pair characterizing and controlling
the type of signalling and indicating an address, and delaying or
bypassing it, if required, by using a third insertion buffer means,
for circuit-switched traffic embedding circuit-switched slots, having
individual channel sizes, between a start/end delimiter pair
characterizing and controlling said circuit-switched traffic and
containing a channel identifier, said circuit-switched slots being
released instantaneously in every framing period by any of the stations as
at a free allocatable position, and bypassing said first, second and third
insertion buffer means,
such that said circuit-switched traffic is transmitted in said free
allocated position, fixed during at least one framing period, and
permeated by asynchronous, synchronous and signalling traffic, and that
the asynchronous, synchronous and signalling traffic are delayed or
bypassed in accordance to a given hierarchy, and that the transmission of
traffic is adapted to the current traffic demand by dynamic allocation
among said asynchronous, synchronous and signalling traffic.
2. The method of claim 1, wherein new circuit-switched slots are generated
by a scheduler at connection set-up and inserted into the information
stream carried on said media by allocating it into a position depending on
a current circuit-switched traffic on said media by delaying or removing
asynchronous or synchronous slots and delaying already existing
circuit-switched slots.
3. The method of claim 1 or 2, wherein circuit-switched slots waiting for
transmission in said scheduler, are inserted again into said media by
delaying removing asynchronous and synchronous slots.
4. The method of claim 1 or 2, wherein already existing circuit-switched
slots are removed from said media by inserting asynchronous and
synchronous slots.
5. The method of claim 1 or 2, wherein insertion of circuit-switched slots
is compensated by a complementary removal process of asynchronous and
synchronous slots, providing for constant ring latencies.
6. The method of claim 1, wherein said network is a LAN (Local Area
Network) with ring topology.
7. The method of claim 1, wherein said network is a LAN with bus topology.
8. The method of claim 1, wherein said predefined framing periods has the
length of about 125 .mu.s according to a sample rate of about 8 kHz.
9. The method of claims 6 or 7 or 8, wherein said network has a latency
according to N times 125 .mu.s framing period for circuit-switched
transmission, with N being an integer number greater than zero.
10. The method of claim 1, wherein several of said slots (50; 64) are
converted into multi-slots (52; 63.1, 63.2) at a source station (61) and
divided again into said slots (64) in the same or another station (62).
11. The method of claim 10, wherein each said multi-slot (52) is embedded
between a start/end delimiter pair and each of said former slots (50) in
said multi-slot (52) is preceeded by a synchronization header (53).
12. The method of claim 2, wherein said asynchronous traffic has the lowest
level in said hierarchy, followed by synchronous and circuit-switched
traffic such, that said circuit-switched traffic may by-pass said
asynchronous and synchronous traffic, and said synchronous traffic may
by-pass said asynchronous traffic.
13. The method of claim 12, wherein by-passing takes place on slot
boundaries.
14. The method of claim 1, wherein said start delimiter is a
start-delimiter Atomic-Data-Unit (ADU; 165) comprising at least a start
delimiter control codeword (SDEL; 160), a slot type-(170), a busy/free
(173), and a priority-indicator (171).
15. The method of claim 1, wherein said end delimiter is a end-delimiter
Atomic-Data-Unit (ADU; 166) comprising at least an end delimiter control
codeword (EDEL; 161), a slot type-(170), and a priority-indicator (171).
16. Network for the transmission of different classes of traffic with
different synchronization and/or delay requirements (multi-media
communication network), comprising stations (e.g. PCs, Hosts, telephones,
telefax, . . . ) and interconnection media with slots of constant size and
predefined framing periods, in particular 125 .mu.s periods for
circuit-switched (CS) transmission, one of said stations operating as a
scheduler, all stations comprising:
decoder means coupled to said interconnection media for recognizing to
which class of traffic the following slot belongs, and for recognizing if
the following slots are integrated into a multi-slot,
payload receiver means (98) coupled to said decoder means for removing
payload from said interconnection media if said decoder means recognizes
that this station is the addressee,
basic-slot regenerator means (95) having an input coupled to said decoder
means and an output for regenerating multi-slots into slots (basic-slots),
bypass means, coupled to said output, for circuit-switched traffic,
delay means (92), coupled to said output, for asynchronous traffic,
delay means (91), coupled to said output, for synchronous traffic,
payload transmitter means for sending payload,
multiplexing means (93), coupled to the bypass means, the delay means, the
payload transmitter means and the interconnection media, for integrating
by-passed circuit-switched, asynchronous, synchronous, and payload traffic
into said interconnection media
control means, coupled to said bypass means, delay means, payload
transmitter means and multiplexing means, for organizing transmission and
bypass/delay with regard to a given hierarchy,
said station operating as a scheduler (100) further comprising:
delay means for circuit-switched traffic (101), being inserted into said
bypass means for circuit-switched traffic,
slot/ADU (Atomic-Data-Unit) generator means (105), coupled to said
multiplexing means, for the generation of new slots.
17. The network of claim 16, wherein more than one station comprises the
additional parts of said scheduler, and one of these stations is operated
as scheduler.
18. Network for the transmission of different classes of traffic with
different synchronization and/or delay requirements (multi-media
communication network), comprising stations (e.g. PCs, Hosts, telephones,
telefax, . . . ) and interconnection media with slots of constant size and
predefined framing periods, in particular 125 .mu.s periods for
circuit-switched (CS) transmission, at least one of said stations
comprising:
decoder means for recognizing if this station is the addressee, for
recognizing to which class of traffic the following slot belongs, and for
recognizing if the following slots are integrated into a multi-slot,
payload receiver means (98) for removing payload from said interconnection
media if said decoder means recognizes that this station is the addressee,
basic-slot regenerator means (95) for regenerating multi-slots into slots
(basic-slots),
bypass means for circuit-switched traffic,
delay means (92) for asynchronous traffic,
delay means (91) for synchronous traffic,
payload transmitter means for sending payload,
multiplexing means (93) for integrating by-passed circuit-switched,
asynchronous, synchronous, and payload traffic into said interconnection
media, and
control means for organizing transmission and bypass/delay with regard to a
given hierarchy. |
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Claims |
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Description |
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TECHNICAL FIELD
This invention relates to a method and system for a collision-free
insertion and removal of circuit-switched channels in a self-adaptive
transmission data structure carrying dominantly different classes of
packet-switched traffic on a slotted LAN (Local Area Network) with a bus
or ring topology. The addressed traffic integration comprises asynchronous
traffic (packet-switched), synchronous traffic (packet-switched,
time-sensitive), isochronous traffic (circuit-switched), and signalling
on-demand.
BACKGROUND OF THE INVENTION
The rapid evolution in the field of information processing, data
communication, and multi-media office communication has led to the
emergence of transmitting different classes of traffic via the same
medium, such as offered on LANs (Local Area Network). The majority of
existing networks, whether circuit-switched or packet-switched, are still
oriented towards particular applications. Thus, we usually have different
networks for voice, signalling, video and data applications operating in
parallel and independently. While each of these networks is suitable for
the application it is designed for, they are not very efficient for
supporting other applications. The advantages of an integrated
communication system which can accommodate a variety of diverse services
with different bandwidth requirements has been recognized for some time.
The following two articles "Design approaches and performance criteria for
integrated voice/data switching", of M. J. Ross, Proc. IEEE, Vol. 65,
September 1977, pp. 1283-1295, and "Plan today for tomorrow data/voice
nets", of H. Frank, Data Communications, September 1978, pp. 51-62, relate
already to the integration of different traffic classes. The objective of
having a unified integrated network allowing the transmission of different
traffic classes is the flexibility to cover existing as well as future
services with good performance and economical resource utilization, and
with a unified network management, operation and maintenance.
In the following sections, we describe the current approaches to integrate
circuit-switched and packet-switched principles on LANs. With regard to
the prevalent trend in the design of LANs and the unknown future traffic
characteristics, we then formulate the objects for the self-adaptive
transmission data structure and method of the present invention.
Already in the early seventies, publications dealt with the integration of
circuit-switched and packet-switched principles on the same transmission
medium. Publications started with an integration on point-to-point links,
as described in the article of K. Kummerle, "Multiplexer Performance of
Integrated Line- and Packet-Switched Traffic", 2nd Intern. Conf. on
Computer Communications (ICCC), Stockholm, 1974, pp. 507-515. Afterwards
the efforts were extended to LANs as well as High-Speed LANs (HSLANs), and
switching nodes with an internal bus structure. Examples representative
for the large number of publications relating to these efforts are:
D. Roffinella, C. Trinchero, G. Freschi, "Interworking Solutions for a
Two-Level Integrated Services Local Area Network", IEEE J. on Sel. Areas
in Comm., Vol. SAC-5, No. 9, 1987, pp. 1444-1453;
J. H. M. Kleinen, "PHILAN: An Integrated Local Area Network for High Speed
Applications", EFOC/LAN 86, Amsterdam, June 1986, pp. 83-87;
R. Calvo, M. Teener, "FDDI-II Architectural and Implementation Examples",
EFOC/LAN 90, Munich, June 1990, pp. 76-86.
The current trend in the design of new LANs is to attach more users, to
carry higher traffic rates, to achieve smaller delays, to integrate more
services, and to cover larger geographical areas. To permit this wide
variety of objectives, the evolving high-speed LANs must have concurrent
access and slot reuse capability, must provide for frame-by-frame as well
as cell-by-cell transmission, and must be able to handle circuit-switched
services, too.
The suitable transmission data-structures are slotted to allow simultaneous
medium access by geographically separated nodes. Because of this, LAN
throughput does not degrade for increasing product of speed and distance.
Destination removal (allowing slot reuse) has the high potential to
increase system throughput significantly beyond the bit rate of the
transmission medium. In today's LANs, transmission is via frames in
contiguous slots. This avoids segmentation (thus, no labeling algorithm is
necessary to identify segments), reduces transmission overhead, and
receiver hardware becomes less complex and its buffer size can be kept
smaller. Moreover, transmission by frames simplifies buffer management of
multiple receiver buffers at high data rates significantly. At the other
hand, transmission of ATM (Asynchronous Transfer Mode) cells is
extensively promoted as solution for Broadband-Integrated Services Digital
Network (B-ISDN). Moreover, for the foreseeable future, the demand for
circuit-switched channels (video, PBX interconnection) on high-speed LANs
becomes increasingly evident.
In slotted LANs, frames are guaranteed to be transmitted in contiguous
slots either by pure reservation, as described in the publications of M.
Nassehi, "CRMA: An Access Scheme for High-Speed LANs and MANs," IEEE
International Conference on Communications, Atlanta, Ga., April 1990, pp.
1697-1702, and "Cyclic Reservation Multiple-Access Scheme for Gbit/s LANs
and MANs based on Dual-Bus Configuration," Eighth European Fibre Optic and
Local Area Networks Conference, EFOC/LAN, Munich, June 1990, pp. 246-251,
or by using the buffer insertion technique as e.g. disclosed in the
following European patent applications:
"Broadband Ring Communication System and Access Control Method",
Application No.: 90810456.5,
"Medium Access Technique for LAN Systems", Application No.: 91810224.5.
Recently, buffer insertion LANs have been augmented by providing a by-pass
mechanism for the so-called synchronous slots, as for example described in
the above named European patent applications 90810456.5 and 91810224.5. In
this way, real-time response for time-sensitive connections is not
affected by insertion buffer delays. This by-pass mechanism is a component
of the described transmission data-structure. Additionally, fairness in
insertion-buffer LANs is now manageable either by a credit mechanism,
described in the European patent application 91810224.5, or by a
reservation mechanism described in the European patent application
90810456.5.
Traffic types
In the following, we will denote circuit-switched channels by isochronous
channels. Slots used for that purpose obey strict periodicity. Slots
carrying traffic according to the packed-switched principle is
differentiated in synchronous and asynchronous. Synchronous slots are used
for time-sensitive connections like packetized voice and video or other
real-time applications. These connections may need a play-out buffer to
adjust network delay variations. All other traffic is transported by
asynchronous slots. Essentially, the three traffic types differ in the
variation of the end-to-end delay. Isochronous traffic exhibits a constant
delay and thus its delay variation is zero. The delay variation for
synchronous traffic varies within a limited range whereas that for
asynchronous traffic can be considerably. In addition to these three
traffic types, signalling traffic for network housekeeping functions (like
monitoring, measurements, slot reservations, as disclosed in the European
patent application 91810224.5, "Medium Access Technique for LAN Systems",
congestion control, and in general network management) must be taken into
consideration, too.
Requirement to adapt to continuously changing traffic characteristics
Most LANs are designed to perform at their best for a particular type of
traffic, but become less efficient in an environment with strongly
different traffic characteristics. As a very simple example, it has been
shown that for long frames token rings perform considerably better than
slotted rings (comparison without slot reuse), whereas for short messages
this is reverse. Because of continuously changing traffic characteristics
and the unknown mix of future traffic in B-ISDN, it is essential to have a
transmission data-structure that naturally adapts to different and
continuously changing traffic characteristics.
Conventional integration of circuit and packet switching on LANs
The integration of circuit switching (CS) and packet switching (PS) on the
same medium of a LAN is based on a periodic framing period of constant
length (e.g. 125 .mu.s). Framing organization may be partitioned (fixed
boundary or movable boundary) with a slotted CS-region and an unstructured
PS-region, or completely slotted with free allocation of CS-connections.
In the latter approach, a PS-frame is either contiguously transmitted in
the remaining slots or is transmitted by autonomous segments with address
information (e.g. ATM cells). An extensive overview of these methods is
described in the article of E.-H. Goldner, "An Integrated Circuit/Packet
Switching Local Area Network--Performance Analysis and Comparison of
Strategies", Computer Networks and ISDN Systems, Vol. 10, No. 3-4,
October/November 1985, pp. 211-219.
A disadvantage of a framing period with a fixed boundary, where the
bandwidth is separated in two fixed parts, is that the bandwidth cannot be
shared when traffic demand changes dynamically. In systems using a framing
period with a movable boundary, the size of the isochronous part is
determined by the position of the last isochronous channel before the
packet-switched part starts. Bandwidth of free isochronous channels lying
before the last channel cannot be used without channel rearrangement.
Channel rearrangement on a ring needs a considerable overhead in terms of
organization and higher-layer communication to assure synchronization of
all involved nodes as disclosed in the European patent 227852, "Local Area
Communication System for Integrated Services Based on a Token-Ring
Transmission Medium". Moving the boundary itself requires a similar
overhead. Then, all nodes must be informed about the new position. On a
ring, moving must be done in several steps to assure that no data is lost.
First the nodes must be informed, then all nodes must confirm, and finally
in a next round the new position of the CS/PS-boundary
circuit-switched/packet-switched) becomes effective. Thus, also a
considerable delay is involved.
In the other two approaches with a completely slotted framing period, slots
for isochronous channels can be arbitrarily allocated. Slots have a flag
indicating the traffic type, so that a frame can be transmitted in an
interleaved manner between the isochronous channels. In the first
approach, segments are variable and carry no addresses. In the second
approach, segments are constant and have address information. Here, the
segments or cells are autonomous, and thus parts of different frames can
be transmitted interleaved, too. Bandwidth adapts optimally to traffic
demand, but on a ring LAN establishment and release of isochronous
channels encounter a similar problem as in the framing organization with a
moveable boundary i.e. slots to be allocated for an isochronous channel
must first be marked as reserved. Thereafter, they get allocated in the
next roundtrip. Additionally, the nodes involved must be informed when the
channel is available.
In FIG. 1, we highlight already the main difference between isochronous
channel support via a movable boundary (left side of figure) and that via
insert/remove self-adaption (right side) as is an integrated part of the
inventive transmission data-structure. Initially, a framing period 1
exists with two isochronous channels CH1 and CH2. In the movable boundary
approach, both channels are located at the begin of the framing period 10
(CS-region). The remaining part of the framing period 10 (PS-part) is used
for asynchronous traffic. The first two positions of the framing period 10
are denoted by 11.1 through 11.5 and 12.1 through 12.5 to differentiate
between the five considered time instants. Initially, locations 11.1 and
12.1 are used by isochronous channels CH1 and CH2, respectively. As CH1
terminates, location 11.2 becomes free but cannot be used by asynchronous
traffic until CH2 is rearranged from location 12.3 to 11.3 and until
boundary 13 is correspondingly moved. As mentioned before, these actions
cause communication overhead and delayed usage of the freed bandwidth.
When later on another isochronous channel has to be established, boundary
13 is moved so that location 12.4 becomes free. It must be noticed that
the boundary 13 cannot be moved immediately, because it must be ensured
that location 12.4 does not carry data. Finally, after some communication
overhead, the new channel CH3 is available at the location 12.5. Compared
with this mode of operation, the insert/remove self-adaptation approach to
establish and release isochronous channels is extremely efficient. First,
both channels can principally be located at arbitrarily positions. We
denote the location of channel CH1 by 14.1 through 14.2, and that of
channel CH2 by 15.1 through 15.3. Initially, two isochronous channels are
located 14.1 and 15.1. All bandwidth around them is available for
asynchronous traffic. When CH1 terminates, its bandwidth at location 14.2
becomes immediately available, i.e. without any delay and without
communication overhead. In case that isochronous channel CH3 is to be
allocated, it can be put anywhere in the framing period (here location
16.3). The key point here is that the channel is immediately available and
needs (apart of course from the normal higher-layer set-up procedure) no
extra communication overhead. This immediate allocation is possible by
inserting the isochronous at the right location and by immediate or
delayed removal of a corresponding number of asynchronous slots. Thus,
generation of isochronous slots for the allocation of a new isochronous
channel is accompanied by destroying free asynchronous slots whereby a
temporary surplus of slots may occur when all asynchronous slot candidates
are busy. At the other hand, releasing an isochronous channel causes a
similar but opposite operation to be executed. This means, a now
instantaneous removal of isochronous slots with simultaneous generation of
asynchronous slots.
With respect to transmission robustness, the approaches with stricted
slotted framing periods have the following drawback. Since only the begin
of the framing period is used for synchronization, the recognition of
individual slot boundaries relies only on counting. A synchronization loss
can only be recovered at the begin of the next framing structure. During
the elapsed time, secondary errors might be produced which require a
complex recovery scheme to resolve them.
The nearest prior art for the present invention is given by the article of
J. Y. Chao, W. T. Lee, L. Y. Kung, "A New Buffer Insertion Ring with Time
Variant Priority Scheme to Facilitate Real-Time Image Transmission on a
High Speed Integrated Local Area Network", 14th Conference on Local
Computer Networks, Minneapolis, October, 1989, and the above named
European patent application 90810456.5, "Broadband Ring Communication
System and Access Control Method".
The objects of the inventive self-adaptive transmission method for slotted
LANs, and the hardware implementation thereof, are given below.
SUMMARY OF THE INVENTION
Central objects of the present invention are to provide for immediate slot
assignment for isochronous channels without interference with other
traffic types, isochronous slots (with strict periodicity) that are
allowed to drift through other transmission entities, and isochronous
channels that can be temporarily deactivated and that are immediately
reactivated by the nodes themselves (i.e. isochronous slots are
immediately created by those nodes).
It is a further object to provide for a self-adaptive transmission method
leading to minimal transmission overhead, maximum bandwidth efficiency,
and optimal sharing between different traffic types (isochronous,
synchronous, asynchronous, and signalling).
Another object of the present invention is a method which provides for
support of dynamic signalling with on-demand bandwidth allocation.
It is a further object to provide for autonomous slot concatenation (up to
a selected bound of slot units) which exists only during transmission of
single frames.
It is another object of the present invention is to provide for
transmission robustness.
It is another object of the present invention to provide a transmission
method with default oriented or user programmable selection of slot-unit
size and isochronous framing period at start-up time.
It is a further object to provide a hardware implementation according to
the inventive transmission method.
The invention as claimed is intended to meet these objectives and to remedy
the remaining deficiencies of known methods and systems for integrated
transmission on slotted LANs. In the inventive method and system, this is
accomplished in that the transmission autonomously adapts to the current
demand by dynamic housekeeping of so-called Atomic Data Units (described
later on) which forms the transmission entities for the different classes
of traffic. These classes of traffic are handled according to their
synchronization and delay requirements such that circuit-switched (e.g.
isochronous) and packet-switched (e.g. asynchronous, synchronous) can be
transmitted in a dynamic interleaved form.
This method is flexible, adapts autonomously to the instantaneously best
transmission efficiency, is robust, and naturally decouples the
transmission of four traffic types: isochronous, synchronous,
asynchronous, and signalling.
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ABBREVIATIONS AND CONVENTIONS
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General
LAN Local Area Network
HSLAN High-Speed Local Area Network
B-ISDN Broadband Integrated Services
Digital Network
ATM Asynchronous Transfer Mode
MAC Medium Access Control
CS Circuit Switching
PS Packet Switching
CRMA Cyclic-Reservation Multiple-Access
C-CRMA Checkpoint-CRMA
DQDB Distributed Queue Dual Bus (IEEE 802.6)
FDDI Fiber Distributed Data Interface
(ANSI X3T9.5)
Hardware
ADU Atomic Data Unit
CMOS Complementary Metal Oxide
Semiconductor
CTRL Control
FSM Finite State Machine
FIFO First-In First-Out
PHY Physical
RX Receiver
TX Transmitter
SYN Synchronous
ASY Asynchronous
ISO Isochronous
Conventions
Source node
Node marking slot
busy to carry payload
Destination node
Node copying slot payload
Removal node
Node making slot free
Basic-slot Slot unit size
Multi-slot Concatenation of contiguous basic-slots
during frame transmission or
during isochronous channel connection
Asynchronous slot
Basic-slot for asynchronous transmission
service: normal data traffic,
large variation in end-to-end delay
Synchronous slot
Basic-slot for synchronous transmission
service: time-sensitive connections
like packetized voice and video, small
variation in end-to-end delay
asynchronous slot by-pass capability
Isochronous slot
Basic-slot for isochronous transmission
service: pure circuit-switched traffic,
constant end-to-end delay,
asynchronous/synchronous slot
or signalling command
preemption capability
Framing period
Strict periodic time interval for
isochronous channels (e.g. 125 .mu.s)
______________________________________
DESCRIPTION OF THE DRAWINGS
The invention is described in detail below with reference to the following
drawings.
FIG. 1 shows the main differences between the conventional isochronous
channel (circuit-switched) support via a movable boundary and that via
insert/remove self-adaption according to the present invention.
FIG. 2 shows a stiff circuit-switching data-infrastructure;
FIG. 3 shows an elastic packet-switching data-infrastructure;
FIG. 4 shows a sequence of embedded autonomous slot units (Basic slots);
FIG. 5 shows a concatenation of contiguous basic-slots into a multi-slot;
FIG. 6 shows an asynchronous multi-slot with by-passing synchronous slot
and signalling command;
FIG. 7 shows a dynamic conversion between multi-slot and basic-slots;
FIG. 8 shows a hierarchical organization of the elastic buffer in the
scheduler;
FIG. 9 shows three different ring latencies;
FIG. 10 shows a principal structure in a node, according to the present
invention;
FIG. 11 shows a principal structure in a scheduler, according to the
present invention;
FIG. 12 shows an isochronous framing period and positions of isochronous
slots;
FIG. 13 shows a continuous flow of synchronous and asynchronous slots;
FIG. 14 shows on-demand signalling between synchronous/asynchronous slots;
FIG. 15 shows isochronous slots combined with synchronous/asynchronous
slots;
FIG. 16 shows isochronous and synchronous/asynchronous slots with on-demand
signalling;
FIG. 17 shows the structures of different Atomic Data Units (ADUs);
FIG. 18 shows the structure of a Start-Delimiter-ADU;
FIG. 19 shows the structure of an End-Delimiter-ADU;
FIG. 20 shows the structure of an asynchronous/synchronous basic-slot;
FIG. 21 shows the structure of an isochronous basic-slot;
FIG. 22 shows a time-controlled insertion of isochronous slots;
FIG. 23 shows the generation of isochronous slots (Establishing phase);
FIG. 24 shows the circulation of isochronous slots (Operation phase);
FIG. 25 shows the destroying of isochronous slots (Release phase);
FIG. 26 shows the rearrangement of isochronous channels;
FIG. 27 shows the generic structure of a node according to the present
invention;
FIG. 28 shows the generic structure of a scheduler according to the present
invention;
FIG. 29 shows the generic structure of an integrated node/scheduler
according to the present invention.
GENERAL DESCRIPTION
Before going into details, we describe in this section the operating
environment, the basic ideas, the principal implementation structure, and
the self-adaptive capabilities of this transmission data-structure. It is
called self-adaptive, because the transmission data-structure naturally
adapts towards optimal utilization.
Network topologies
The described inventive transmission data-structure is valid for
point-to-point links as well as for bus and ring topologies. On a
point-to-point link and on a bus, there exists a clean slot flow: at the
begin of the transmission medium (e.g. bus header) free slots are
generated and at its end-point the slots (busy or free) are destroyed. On
a ring, the slots circulate. Thus, owing to the wrap around, a ring
scheduler (monitor, bandwidth manager) must deal with both free and busy
slots. This complicates slot handling and the CS/PS integration
significantly. Thus, by describing the transmission data-structure for a
ring, the cases for a bus and a point-to-point link are automatically
covered as a simpler topology.
Asynchronous transmission service
An asynchronous transmission service is provided by asynchronous slots.
This is a packet-switched service and provides a data service as it is
commonly used today to transmit all kinds of data traffic ranging from
short messages to large data quantities. In the transmission hierarchy as
explained below, the asynchronous slots obtain no transmission favors.
Synchronous transmission service
The synchronous transmission service is also a packet-switched service, but
it makes use of synchronous slots. These slots receive an expedited
transmission treatment in that all synchronous slots can by-pass
asynchronous slots being delayed by a buffer in the transmission path.
This holds both for the elastic buffer in the scheduler and insertion
buffers in the nodes. The latter ones are only present in buffer insertion
LANs. Only complete slots can be by-passed. Thus, asynchronous slots are
not preempted by synchronous slots. Synchronous slots are introduced to
meet time-sensitive traffic requirements for services like packetized
voice and video when operated on a buffer-insertion LAN.
Isochronous transmission service
The isochronous transmission service is a pure circuit-switched service.
The corresponding slots are the isochronous slots which can be transmitted
at any time within the transmission data-structure. Thus, they are allowed
to preempt both synchronous and asynchronous slots as well as signalling
commands or messages. By this, isochronous slots follow strict timing
rules.
Signalling
The inventive data transmission method and data structure fully supports
dynamic signalling with on-demand allocation of bandwidth as has been
proposed in the European patent application 91810222.9, "Insert/Remove
Signalling In LAN Systems". Thus, signalling commands or messages are not
bound to entire slot sizes and they vary with current signalling need.
Furthermore, signalling commands, messages or information's are inserted
into the data path by using the buffer insertion technique. We propose to
handle signalling traffic as a synchronous transmission service. Thus,
signalling commands or messages can by-pass asynchronous slots being
delayed by a buffer in the transmission path. By-passing of asynchronous
slots is only on slot boundaries. Important applications of this dynamic
signalling method are the reservation process in Checkpoint-CRMA (C-CRMA),
European patent application 91810224.5, "Medium Access Technique For LAN
Systems", and congestion control to prevent (or reduce) receiver buffer
overflow in adapters, routers and bridges as later on described in this
patent application. Signalling can principally belong to the asynchronous
and the synchronous transmission service. The choice depends on the
application.
Multiplexing modes
As described in the European patent application 91810224.5, "Medium Access
Technique For LAN Systems", the so-called second generation CRMA versions
can be operated in three modes: pure, cell, and insertion multiplexing.
Pure multiplexing allows both cell-by-cell and frame-by-frame
transmissions whereby for the latter slot contiguity is provided by the
reservation process. Immediate access and slot reuse can be applied
restrictively. In the cell multiplexing mode, all transmissions only take
place in autonomous entities (ATM mode of operation). Immediate access and
slot reuse can fully be exploited. Finally, insertion multiplexing permits
the transmission of cells or complete frames, immediate access and slot
reuse in a natural way by insertion buffers in the nodes.
In the cases of pure and cell multiplexing, synchronous slots and
signalling commands follow the same data path as the asynchronous slots.
Then, only insertion multiplexing has the capability to temporarily hold
back asynchronous slots when a node currently transmits a frame. Thus only
in insertion LANs, synchronous slots get an express service because of
by-passing. In all three multiplexing modes, however, insertion buffers or
registers are present owing to dynamic signalling with information
insertion. When the buffers are used only for that purpose, they can be
implemented as registers which are more suited for very high data rates
than dual ported buffers (speed gain of two).
Transmission data-structure
The transmission data-structure is based on two overlaying
data-infrastructures each consisting of constant-size slot units denoted
as basic-slots. The size of the basic-slots in each data-infrastructure
can be chosen identical or not. The so-called circuit-switching
data-infrastructure that binds the isochronous slots in strict periodicity
is very stiff. FIG. 2 shows the fixed positions of two isochronous
channels 20, 21 within framing periods 22 of e.g. 125 .mu.s. Within the
remaining transmission bandwidth, slots belonging to the second
data-infrastructure can flow loosely such that they are not bound to fixed
positions. Additionally, this so-called packet-switching
data-infrastructure allows elasticity between basic-slots carrying
synchronous and asynchronous traffic. The varying distance between
basic-slots is at the one hand caused by dynamic signalling with on-demand
bandwidth allocation, see European patent application 91810222.0,
"Insert/Remove Signalling in LAN Systems", and at the other hand by
stuffing when decentralized clocking, as described in the European patent
application 90810456.5, "Broadband Ring Communication System and Access
Control Method", is used. Under specific conditions both
data-infrastructures can temporarily coincide when they are based on
identical basic-slot sizes. In general, however, isochronous slots will
drift through the synchronous and asynchronous slots as well as through
the signalling commands. The drift is sometimes forward sometimes
backward. It is for instance forward when in C-CRMA, as described in the
European patent application 91810224.5, "Medium Access Technique For LAN
Systems", a reserve command grows during the collection of reservation
requests. It is backward when the corresponding confirm command shrinks as
it passes the nodes during the confirmation phase. In FIG. 3, the loose
flow of asynchronous (ASY) and synchronous (SYN) slots around a fixed
positioned isochronous slot (ISO, circuit-switched) is illustrated.
Embedded autonomous slot units (basic-slots)
Basic-slots are handled as completely autonomous entities by embedding each
slot between a Start-Delimiter and an End-Delimiter. Additionally, these
delimiters carry a traffic-type identification. While embedding is
absolutely required in a flexible and self-adaptive transmission
data-structure, it has also advantages in conventional approaches. Then,
embedding allows a clean synchronization on slot boundaries as well as an
immediate and robust error recovery scheme. This is because a node has an
a-priori knowledge about the valid sequences of Start and End-Delimiters,
so that an error case is immediately recognized. Thus, an instantaneous
action can be taken to prevent secondary effects. This possibility makes
error recovery less complex and more robust. This becomes increasingly
more important as transmission speed continues to grow. FIG. 4 shows a
sequence of basic-slots 40.1-40.3, 41.1, 41.2, and 43 belonging to
different traffic types (A | | |
