Semiconductor device having an optical waveguide interposed in the space between electrode members

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BACKGROUND OF THE INVENTION

The present invention relates to an optical interconnection technique for semiconductor devices having a semiconductor chip and a wiring substrate, or more in particular to a clock signal supply system for a ultra-high-speed processor of the computer.

With the increase in the scale of semiconductor devices, a higher-density assembly and a greater number of input and output terminals of the semiconductor chip are sought. In order to meet this requirement, a flip-chip connection system is conventionally used as disclosed in JP-A-61-177738 based on U.S. patent application Ser. No. 695,597 filed Jan. 28, 1985. In this connection system, the semiconductor chip is connected by bump electrodes on a wiring substrate. Electrodes can be installed over the entire surface of the semiconductor chip, thereby making multi-channel connections possible.

An increased internal operating speed of the semiconductor devices has come to pose the problem of propagation delay time and crosstalks in the electric interconnections of the substrate. For solving this problem, conventional optical interconnection techniques as described in J. W. Goodman et al. "Optical Interconnections for VLSI Systems", C. T. Sullivan et al. "Integrated optics approach for high-density optical interconnections in high-speed multichip IC packages", and Y. Yamada et al. "Optical interconnections using silica-based waveguide on Si substrate" are known. In these optical interconnection techniques, optical waveguides are used for interconnecting semiconductor chips. For lack of an increased time constant due to a capacitor and a resistor or crosstalks due to induction unlike in electrical connections, optical waveguides are said to permit high-speed, broad-band interconnections.

A multiplicity of input and output terminals for signal transmission wiring, power supply wiring and clock distribution wiring are indispensable for the semiconductor chip. The optical interconnections, in spite of its advantage of a high speed and a broad band as compared with electric interconnections, cannot reduce the size thereof to the order to wavelength. Considering the delay due to the opto-electric or electro-optic conversion time, on the other hand, the optical interconnections are advantageous over the electric connections only beyond a certain wiring length. It is therefore not advantageous to replace all the electric interconnections with optical ones on a wiring substrate, and it is necessary to secure a certain number of input-output terminals for electric interconnections beforehand. For making electrical and optical interconnections compatible with each other, applying the optical interconnection technique to the flip-chip connection system permitting multi-channel electrical connections is promising.

Two methods are available for performing optical interconnections in a flip-chip connection system: One by interconnecting on the front side and the other on the back side of the semiconductor chip. In a highly-integrated semiconductor chip, however, heat generation is so large that a fin radiator or a cooling channel is formed on the back of the chip. In the flip-chip connection system, therefore, optical interconnections are required on the front, i.e., on the wiring substrate side of the semiconductor chip.

In the aforementioned optical interconnection techniques, the method for forming electrical and optical interconnections on the wiring substrate is not specifically determined. In the case where electrical and optical interconnections are mixed in the same plane of the wiring substrate, for example, the metal forming the electrical wirings does not transmit light, and the dielectric material forming the optical waveguides does not pass electric current. In addition, if electrical wirings are formed on optical waveguides, an optical loss or a change in optical power is a probable result. This has posed the problem of limiting the mutual arrangement of the electrical and optical interconnections.

A clock signal supply system is disclosed in U.S. Pat. No. 5,184,027 and U.S. Pat. No. 5,043,596. In conventional clock signal supply systems, each destination of a clock signal has a phase adjustor in order to reduce the time skew of the clock signal and to automate the phase adjusting process. Such a phase adjuster is supplied with a clock signal and a phase reference signal having a longer period than the clock signal through electric interconnections such as cables or wiring substrate.

Generally, a shorter machine-cycle time, i.e., an improved speed of clock signal is essential for a high-performance operation of the processor.

At the present rate of increase in machine speed, the machine-cycle time, which stands at 7 to 9 nsec in the first half of the 1990s, is expected to decrease to less than 1 nsec in the 2000s, which in turn will require a clock signal of at least 1 GHz in frequency.

Such a ultra-high speed clock signal has not been taken into consideration, however, in designing conventional clock signal supply systems.

Electrical interconnections such as cable and wiring substrate are limited in frequency band by the effect of signal amplitude attenuation due to reactances, reflection caused by impedance mismatch or crosstalks.

In conventional systems, considering the electrical wiring length of several meters and the wiring diameter of less than several millimeters in the processor, it has been very difficult to distribute the clock signal of 1 GHz or more.

Conventional systems for distributing the clock signal by optical interconnections include a configuration comprising a photodetector arranged at each destination of clock signal for distributing the optical clock signal emitted from a light source through such optical paths as optical fiber, optical waveguide, lens and hologram.

The frequency band of optical interconnections is far wider than that of electrical interconnections. It is therefore possible to distribute the optical clock signal of 1 GHz or more in frequency to destinations. The optical clock distribution systems that have been suggested in the prior art, however, have failed to take into consideration the skew due to the difference in optical path length caused by the refractive index distribution, optical aberration, or optical misalignment, or due to variations in the sensitivity or response characteristics of optical detectors.

In a word, according to the prior art systems, the clock signal frequency is undesirably limited by the skew.

Of all the skews, the one due to the difference in optical path length can be reduced by using a programmable optical delay line described in the U.S. Pat. No. 3,516,86 dated May 15, 1989.

The problem of this system, however, is that the operation is very complicated as the distance between two lenses is mechanically changed by manual operation.

When this system is applied to a computer packaged with high density described in F. Kobayashi et al., "Hardware Technology for HITACHI M-880 Processor Group", Proceeding of the 41st Electronic Components and Technology Conference, pp. 693-703, for example, it is extremely difficult to adjust individual optical path lengths manually within a limited package space.

Also, this system still cannot reduce the skew caused by optical detectors.

SUMMARY OF THE INVENTION

An object of the present invention is to provide an optical interconnection technique compatible with electrical interconnections in a flip-chip connection system. In attaining the object, proper mutual arrangement of electrical and optical interconnections and proper assignment of functions between them, as well as appropriate consideration of the method of coupling and forming interconnections of optical devices are required.

Another object of the invention is to provide a clock signal supply system having a high freedom of interconnection designing, in which electrical interconnections and optical waveguide interconnections can be used separately from each other in accordance with different applications without affecting the mutual arrangement thereof.

Still another object of the invention is to provide a clock signal supply system capable of distributing the clock signal very fast without causing any phase deviation.

A further object of the invention is to provide a signal supply system with optical interconnections having a very broad frequency band of more than 1 GHz as compared with electrical interconnections and capable of supplying the clock signal without any phase deviation by the use of a phase reference signal.

According to the present invention, there is provided a clock signal supply system comprising optical waveguide interconnections in the space between electrode members for connecting the semiconductor chip and a wiring substrate in order to apply the optical interconnection technique to the semiconductor device with a semiconductor chip in flip-chip connection with the wiring substrate. Alternatively, a semiconductor chip and a wiring substrate are connected by electrode members through throughholes perpendicular to the main surface of an optical waveguide interconnection.

According to the above-mentioned configuration, optical waveguide interconnections are performed by the use of spaces between electrode members. The electrical wiring layer and the optical waveguide layer are separated from each other, and therefore the arrangement of the electrical wirings on the wiring substrate is not limited by the optical waveguide interconnections. No interference is caused unlike in the case where electrical wirings coexist in the same plane as an optical waveguide layer. A multiplicity of input/output terminals can be taken out from a semiconductor chip by means of electrode members through an optical waveguide interconnection layer, thus making it possible to use the electrical wirings and the optical waveguide interconnections separately from each other in accordance with different applications.

In order to obviate the above-mentioned problem, an optical clock supply system comprises a clock oscillator for generating a clock signal having a predetermined frequency, an optical waveguide interconnection for converting the clock signal into an optical signal, transmitting the optical signal to a plurality of predetermined points and converting the optical signal into an electrical signal at each destination, a reference signal generator for dividing the frequency of the clock signal generated from the clock oscillator and generating an electrical signal, an electrical interconnection for transmitting the electrical signal divided in frequency to the predetermined number of points, and a phase adjuster for setting the signals in phase by adjusting the phase advance or retardation of the electrical signal produced from the optical waveguide interconnection on the basis of the reference signal transmitted by the electrical interconnection and producing a clock signal having a predetermined frequency and phase to an external circuit.

In the aforementioned clock signal supply system, the optical waveguide interconnection may include an optical transmitter for converting the electrical clock signal produced by the clock oscillator into an optical clock signal and an optical transmission path for supplying the optical clock signal to the optical receiver.

The clock signal supply system according to the invention may alternatively comprise a reference signal generator which frequency-divides the clock signal having a first frequency and generates a reference signal lower than the frequency bandwidth of the electrical interconnection.

The clock signal supply system according to the invention may comprise an optical transmitter including a laser diode for oscillating the optical clock signal and a laser diode driver circuit for converting the electrical clock signal into a drive current for the laser diode.

Further, the clock signal supply system according to the invention may comprise an optical transmitter including an optical amplifier for amplifying the optical clock signal.

The optical amplifier may be a rare atom-doped fiber amplifier or a semiconductor optical amplifier based on current pumping.

The optical transmitter of the clock signal supply system according to the invention may include an optical output controller having the function of holding the signal amplitude of the optical clock signal to a predetermined value.

The optical output controller may be an auto power control circuit.

The optical receiver of the clock signal supply system described above may include a photodetector for detecting the optical clock signal and a photodetector driver circuit having the function of converting the photocurrent signal flowing in the photodetector into an electrical clock signal.

The photodetector may be configured of a photodiode.

The optical receiver of the signal supply system according to the invention may include a bandpass device for the frequency of the electrical clock signal.

The bandpass device may include a bandpass filter circuit.

Further, the clock signal supply system according to the invention may comprise an optical transmission path including an optical fiber and/or an optical waveguide.

Also, the optical transmission path may include at least a lens, a mirror, a hologram and/or a prism.

The optical transmission path of the clock signal supply system according to the invention may include an optical splitter for splitting the optical clock signal transmitted thereto.

The optical splitter may include at least one of an optical-fiber star coupler, an optical-waveguide star coupler and a beam splitter.

The optical transmission path may include at least one of an optical path changer, a focusing/collimating lens and an optical shield.

The optical path changer includes at least one a mirror, a prism and a grating. The focusing/collimating lens includes a convex/concave lens and/or a grating lens. Further, the optical shield may have at least one of a partition, a cover and a mask.

In the clock signal supply system according to the invention, the optical clock signal incident upon the optical receiver by the optical transmitter and the optical transmission path is larger than the minimum receivable optical power at the frequency of the optical clock signal.

Also, a processor including a clock signal supply system according to the invention may comprise at least two semiconductor modules each including a wiring substrate with at least two semiconductor devices electrically connected to each other.

The processor includes the optical receiver and the phase adjuster arranged in each semiconductor module. The optical receiver receives the optical clock signal splitted by the optical splitter and supplies a clock signal having a predetermined phase to each semiconductor module.

Further, in a processor comprising the clock signal supply system according to the invention, the optical receiver and the phase adjuster of the clock signal supply system may be installed on the same semiconductor substrate as the processor.

Also, the processor may comprise the optical receiver formed in a semiconductor device of silicon, with the optical clock signal less than 1 .mu.m in wavelength.

Furthermore, the optical receiver of the processor may include a chemical compound semiconductor on a semiconductor device of silicon, with the optical clock signal having a wavelength of 1 .mu.m or more.

The operation of the system according to the invention will be described below.

First, the electrical clock signal generated from the clock oscillator is converted into an optical clock signal by the optical transmitter.

The optical clock signal is transmitted to the optical receiver through the optical transmission path of sufficiently large frequency bandwidth (which may alternatively be described as an optical interconnection according to embodiments) and is converted again into an electrical clock signal by the optical receiver.

In other words, a clock signal having a high frequency is transmitted as an optical signal and finally converted into an electrical signal.

The electrical clock signal outputted from the clock oscillator, on the other hand, is divided in frequency by a reference signal generator and is transmitted to a predetermined position through an electrical interconnection.

Further, a first electrical clock signal outputted from the clock oscillator and a second electrical clock signal frequency-divided by the reference signal generator are both supplied to a phase adjuster.

The phase adjuster detects the time lag (phase deviation) between the two signals on the basis of the rise or fall of the first and second electrical signals and puts the two signals into phase by the use of a delay circuit, for example.

The phase adjuster also supplies a phase-adjusted clock signal to each destination.

As a result, the frequency of the clock signal is not limited by the bandwidth of an electrical interconnection unlike in the prior art.

More specifically, there is provided a clock signal supply system for supplying a clock signal having a high frequency without any phase deviation between clocks.

As described above, a clock signal supply system according to the invention has the advantage that any destination is not affected by the skew (which hereinafter refers to any phase deviation of the clock signal in an LSI at a clock destination) of the optical clock signal which has been unrealizable in the conventional systems.

The system according to the invention is effectively applicable to various processors in a main frame computer, for example, including the one having a long interconnect wiring for supplying clock signals.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional view showing a first embodiment of the invention.

FIG. 2 is a sectional view taken in line A--A' in FIG. 1.

FIGS. 3a to 3e are diagrams showing the process for fabricating a semiconductor device.

FIGS. 4a to 4d are diagrams showing the structure of optical waveguide interconnections.

FIG. 5 is a diagram showing a method of splitting or deflection of optical waveguide interconnections.

FIG. 6 is a diagram showing a mirror configuration required for optical interconnections between a wiring substrate and a semiconductor chip.

FIGS. 7a to 7c are diagrams showing the photolithography process for fabricating a mirror.

FIG. 8 is a sectional view showing a configuration for clock signal distribution using the optical waveguide interconnections according to a second embodiment of the invention.

FIG. 9 is a top plan view showing a second embodiment of the invention.

FIG. 10 is a top plan view showing a third embodiment of the invention.

FIG. 11 is a diagram showing the configuration of a clock signal supply system according to a fourth embodiment of the invention.

FIG. 12 shows the configuration of an optical transmitter according to a fifth embodiment of the invention.

FIG. 13 is a diagram showing the configuration of an optical receiver according to a sixth embodiment of the invention.

FIG. 14 is a sectional view showing the configuration of a processor to which a clock signal supply system is applied according to a seventh embodiment of the invention.

FIG. 15 is a diagram showing a sectional view showing the configuration of a processor to which a clock signal supply system is applied according to an eighth embodiment of the invention.

FIG. 16 is a diagram showing a sectional view of the configuration of a processor to which a clock signal supply system is applied according to a ninth embodiment of the invention.

FIG. 17 is a top plan view for explaining the configuration of an optical waveguide interconnection according to an eighth embodiment of the invention.

FIG. 18 is a perspective view showing the configuration of another optical interconnection according to the invention.

FIG. 19 is a diagram for explaining another optical interconnection according to the invention.

FIG. 20 is a sectional view showing the configuration of a processor to which a clock signal supply system is applied according to a tenth embodiment of the invention.

FIG. 21 is a sectional view showing the configuration of a processor to which a clock signal supply system is applied according to an eleventh embodiment of the invention.

FIG. 22 is a diagram showing a perspective view of the configuration of a processor to which a clock signal supply system is applied according to a twelfth embodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the invention will be described below with reference to the accompanying drawings.

FIG. 1 is a diagram showing a semiconductor device according to a first embodiment of the invention, and FIG. 2 is a sectional view taken in line A--A' in FIG. 1. In FIGS. 1 and 2, a semiconductor chip 1 is connected by flip chip bonding to a wiring substrate 2. An optical waveguide interconnection 5 is interposed in the space between electrode members 4. The semiconductor chip 1 is connected with a wiring layer 3 of the wiring substrate 2 by an electrode member 4 laid through a through hole 7 perpendicular to the principal surface of the optical waveguide interconnection 5.

The semiconductor chip 1 and the wiring substrate 2 are made of a silicon or a chemical compound semiconductor. The semiconductor chip 1 has the surface of the wiring substrate 2 thereof formed with a circuit and optical device section (including a surface-emitting diode and a photodiode). The wiring layer 3 is made of a metal (such as Cu or Al) and an insulating member (such as polyimide or glass). The electrode members 4 are made of a metal bump (Pb-Sn solder, Au, etc.). The optical waveguide interconnection 5 is formed of a dielectric material (polyimide, glass, etc.) and includes a mirror or a grating for coupling to the optical device section.

The optical waveguide interconnection 5 is formed on the surface of the wiring layer 3 by such a method as coating or vapor deposition after the wiring layer 3 is formed on the wiring substrate 2. The patterning of the optical waveguide interconnection 5 and the through hole 7 are accomplished by such a method as photolithography. The semiconductor chip 1 with the electrode members 4 formed in advance thereon is installed, with the circuit-mounted side down, at a predetermined position of the wiring substrate 2, and the electrode members 4 are molten to connect the semiconductor chip 1 and the wiring substrate 2 electromechanically. The self-aligning function of the molten electrode members 4 based on the surface tension thereof eliminates the displacement between the optical device section of the semiconductor chip 1 and the optical waveguide wiring 5, thereby securing optical coupling.

The advantage of the first embodiment is that the optical waveguide can be connected to the optical device section after a multiplicity of electrical input and output terminals between the chip 1 and the electrical wiring in the wiring layer 3 are connected to each other. The arrangement of the wiring layer 3 or the electrode members 4 are not limited by the arrangement of the optical waveguide interconnection 5. In the case where optical waveguide interconnections are laid at 20 -.mu.m pitches between the electrode members 4 with 200 -.mu.m pitches, for example, 2500 pins of electrical connections and about 400 lines of optical waveguide interconnections 5 can be taken out from a 1-cm square semiconductor chip 1. The property of the electrical wiring and the optical waveguide interconnection can be best utilized if the optical waveguide interconnection 5 is used for the broadcast wirings (including bus network wiring and clock wiring) and the long-distance wiring (such as inputs and outputs with external units of the system) and the wiring layer 3 is used for other signal or power supply wirings. Since the optical waveguide interconnection 5 is arranged on the surface of the chip 1 facing the substrate 2, the cooling of the semiconductor chip 1 is not impeded from the opposite side. The self-alignment function of the electrode members 4 may be used for optical coupling between the optical waveguide interconnection 5 and the optical device section of the semiconductor chip 1, thereby eliminating the troublesome job of optical alignment. According to the embodiment under consideration, lattice-arranged optical waveguide interconnections 5 is formed, in which each waveguide can be considered independent as optical signals do not interfere with each other at intersections.

An example of the fabrication process of a semiconductor device will be explained with reference to FIGS. 3a to 3e.

The first step forms, first of all, a multilayer wiring layer 101 and electrodes 102 on the surface of a wiring substrate 100 as shown in FIG. 3a. The wiring layer 101 is formed by repeating the coating of an interlayer insulating film of polyimide or the like, vapor deposition or plating of a metal wire such as aluminum or copper and the patterning by photolithography.

The second step, as shown in FIG. 3b, forms a core layer 104 and clad layers 103, 105 of light-sensitive polymer by coating or applying a film.

The third step, as shown in FIG. 3c, exposes the clad layers 103, 105 and the core layer 104 to light by the use of a photomask 106. The transparent portion of the photomask 106 causes the light-sensitive polymer to be exposed to the ultraviolet light to perform selective photopolymerization. After exposure, the refractive index of the core layer 104 is higher than that of the clad layers 103, 104.

The fourth step, as shown in FIG. 3d, removes the undeveloped portion by development and thus accomplishes the patterning of the clad layers 103, 105 and the core layer 104 thereby to form an optical waveguide interconnection. In the process, the electrodes 102 are bared.

The fifth step, as shown in FIG. 3e, connects the electrodes 108 of the semiconductor chip 107 and the electrodes 102 of the multilayer wiring layer 101 by solder bumps 109.

According to a semiconductor device fabricated in the manner above, the optical signal propagates through the core layer 104 and the electrical signal through the wiring layer 101.

Apart from the above-mentioned fabrication process representing an example of two clad layers and one core layer of an optical waveguide, examples of several other structures of the optical waveguide will be explained with reference to FIGS. 4a to 4d.

FIG. 4a shows a ridge-type waveguide 121 including a core 121 formed on an electrical wiring layer 120, FIG. 4b a waveguide with a core 123 sandwiched from two directions by clads 122, 124 as in the case of the waveguide shown in FIG. 3, FIG. 4c a buried-type waveguide with a core 126 surrounded from three directions by a clad 125, and FIG. 4d a buried-type waveguide with a core 128 surrounded from the four directions by a clad 127.

The fabrication process becomes increasingly complicated although the propagation loss of the waveguide decreases progressively in FIGS. 4a to 4d in that order. Which of the examples is to be selected depends on the intervals and distance between the waveguide interconnections and the wiring length of the waveguide.

The first embodiment shows a case in which optical waveguide interconnections cross each other in lattice form. By changing the photomask pattern shown in FIG. 3c, for example, the optical signal may be caused to branch or deflected as shown in FIG. 5. The semiconductor chip 200 and the electrical wiring layer 201 are connected by bumps 202, and the optical waveguide interconnection 203 on the wiring layer 201 is formed between the bumps 202. The optical signal is caused to branch or deflected by a reflection surface inclined 45 degrees to the optical axis at points 220 and 221 respectively.

For transmission and receiving between an optical waveguide interconnec