An electronic storage circuit includes a pair of banks, each bank having corresponding shared and unshared conductors. The banks may be dynamic random access memories (DRAMs), which are provided in a single inline memory module (SIMM). Each DRAM includes an array of bit cells arranged in rows and columns. A shared conductor of one bank is connected to the unshared conductor of the other bank, and the unshared conductor of such one bank is connected to the shared conductor of such other bank. Row and column address signals are applicable to the connections between the banks, thereby allowing selectable access (or write) to the banks. Each bank includes corresponding data and output enable conductors, such that in response to output enable signals applied to such output enable conductors, data signals are generated by corresponding banks at the data conductors, depending on the state of the applied address signals.
An EDRAM device includes an EDRAM memory array on a semiconductor chip. A row enable signal generator and a column address latch signal generator are provided on the same semiconductor chip for generating row enable and column address latch signals for application to the EDRAM memory array.
A mapping unit is described for use in a computer system having a multiple bank memory. Each bank of the multiple bank memory includes a plug-in socket defining first and second memory rows. The mapping unit maps a memory control signal for the second row of a first socket adapted to mount one of a single-sided memory element or a double-sided memory element, to the first row of a second socket adapted to mount one of a single-sided memory element or a double-sided memory element, to provide a logical double-sided memory element when single-sided memory elements are plugged into the sockets. A poll routine in the computer system operates to determine the existence of single-sided memory elements in each of the first socket and the second socket, and asserts a select signal when the determination is positive. A multiplexer is provided in the multiple bank memory to receive the select signal from the poll routine and selectively couple the memory control signal for the second row of the first socket to the first row of the second socket, as a function of the select signal.
A system for storing and retrieving data utilizes a plurality of memory units having memory locations for storing data values. A checksum of a plurality of the data values in a particular checksum set is maintained in one of the memory locations. One of the plurality of data values can be recovered by combining each of the remaining plurality of data values with the checksum. After retrieving one of the plurality of data values during the data recovery process, steps are taken to ensure that any further attempts to access the location of the retrieved data value do not cause an update to the checksum. Therefore, the locations storing the data values of the checksum set may be accessed (e.g., read from or written to) during the data recovery process without causing errors to the data recovery process.
A system for moving checksums within memory utilizes a plurality of memory systems and a system manager. A first memory system has a first memory location that is correlated with a checksum indicator. The checksum indicator identifies the memory system that is storing the checksum of the value presently stored at the first location. The system manager dynamically moves the checksum to a destination memory location and updates the checksum indicator such that the checksum indicator identifies the memory system of the destination memory location. While the checksum is being moved, checksum updates may occur to the memory location from which the checksum was moved. Thus, after moving the checksum, the system manager updates the checksum with the value stored at the location from which the checksum was moved. As a result, the checksum stored in the checksum destination location should be sufficiently updated to enable data recovery.
A system for performing data error recovery includes a memory unit and a memory controller. The memory unit includes a plurality of memory locations, and the memory controller maintains a checksum in one of the memory locations. At various times, the memory controller receives requests to update the checksum with data values identified by the requests. In response, the memory controller combines the checksum with these data values and stores the foregoing data values into memory. In one embodiment, the memory controller stores the foregoing data values into a plurality of stacks based on which protection domains are associated with the data values. In response to a detection of a data error, the memory controller retrieves a plurality of the stored data values and recovers a previous state of a particular memory location by combining each of the retrieved data values to the checksum.
