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TECHNICAL FIELD OF THE INVENTION
This invention relates generally to switched mode power converter circuits, and more particularly, to a method and apparatus for improving the efficiency of a switched mode power converter over wide load ranges.
BACKGROUND OF THE INVENTION
A switched mode power converter is a multi-port network having at least two ports, at least one of which is an input and at least one of which is an output. Inputs absorb electrical power from an external source; outputs deliver electrical power
to an external load. The converter is a network of reactive elements, switching elements and, in addition, possibly one or more transformers. The reactive elements include at least one inductor, and possibly one or more capacitors. The switching
elements include at least one externally-controlled switch, such as a power transistor, and possibly one or more diode rectifiers. The externally-controlled switches are driven by a control circuit which adjusts the duty cycle of the switches and
possibly the timing relationships between various switches so as to regulate the flow of electrical power through the converter. The connection of the switches is such that at least two, and possibly more, topological configurations are assumed by the
network as various switches open and close. Each current path in every configuration of the network has no intentional dissipative (lossy) elements, so as to limit power dissipation to the unavoidable minimum caused by the existence of parasitic
dissipative losses. Each current path therefore contains inductive reactance, which can be idealized as a lumped inductor, which limits and controls the flow of electrical current. The converter will assume each of its topological configurations in
cyclical repetition, as determined by the control circuit.
A switched mode power supply can achieve greater efficiency than a linear regulated power supply because a switched mode power supply uses digital switching instead of power dissipative linear regulation. Reactive elements in a switched mode
power supply store energy during the period of time when the digital switching interrupts the power flow.
A typical converter topology is a step down or buck converter. A basic buck converter comprises a capacitor connected between ground and an output terminal, an inductor connected between the output terminal and a switching node, a diode with its
cathode connected to the switching node and its anode connected to ground, and a power transistor such as a p-type MOSFET. The drain of the MOSFET is connected to the switching node, the source connects to the input voltage being stepped down, and the
gate is connected to a control circuit that switches the power transistor on and off at a frequency typically between 50 kHz and 150 kHz. For clarity, this power transistor can be called a converter power transistor. A feedback circuit provides
feedback from the output terminal to the circuitry generating the switching signal allowing the duty cycle of the switching signal to be altered.
Switched mode power converters are classified as to their mode of operation based upon whether the inductor sees continuous or discontinuous current flow. In any given inductor, if there is no finite period of time during which the inductor
current is zero, the inductor is said to be operating in continuous conduction mode, or continuous mode. In any given inductor, if there is a finite period of time during which the inductor current stays at zero, the inductor is said to be operating in
discontinuous conduction mode, or discontinuous mode. In order for discontinuous conduction to occur, a blocking device must prevent reverse current flow from occurring during a phase of the converter's operation during which the first derivative of the
inductor current is negative. In simple canonical converters, containing one inductor, one externally-controlled switch and one diode, the diode acts to block reverse current flow and to allow discontinuous mode operation.
A buck converter can operate in continuous mode or discontinuous mode. When the load is drawing sufficient power, the converter operates in continuous mode, and some positive current is always flowing through the inductor. However, when the
power level drops below a predetermined threshold, the current through the inductor will decay to zero and will remain at zero for a finite portion of each cycle of operation. When this condition occurs, the converter is operating in discontinuous mode.
A key indication of the quality of a switched mode power converter is its power efficiency. Although an ideal converter has zero losses, real circuits exhibit numerous loss mechanisms. Power transistors contribute both static losses from the
resistance between the drain and the source when the transistor is "on" or conducting, and dynamic losses caused by switching transients. Magnetic components contribute core losses and winding losses. Capacitors contribute ohmic losses due to
equivalent series resistance. Diodes contribute both static losses due to the forward voltage drop and dynamic losses due to reverse recovery losses. In modern low voltage switched mode converters, the most objectionable loss is due to the forward
voltage drop of the diode, which currently cannot be reduced much below 0.5 volts, even with the best Schottky barrier rectifiers.
To solve the problem of losses due to the diode, switched mode power converter designers commonly substitute a synchronous rectifier for the diode. A general definition of a synchronous rectifier is as follows: A synchronous rectifier is an
externally controlled switch which is substituted for a diode rectifier in a switched mode power converter. The switch is either turned on or turned off during each phase of the converter's cycle, so that the synchronous rectifier either appears as an
open or a short in each topological configuration assumed by the converter. This implies that the switch is operated in synchrony with at least one other switching element of the converter, and thus the name `synchronous rectifier`. For example, a
synchronous rectifier can be a power transistor such as a bipolar power transistor or a MOSFET power transistor. In a buck converter, the synchronous rectifier is switched on during the period of time when the converter power transistor is "off",
allowing the synchronous rectifier to source the inductor current. While the converter power transistor is on, the synchronous rectifier is switched off.
A MOSFET is commonly used as a synchronous rectifier. MOSFET synchronous rectifiers are poorly adapted for use in converters that supply widely varying loads, because the MOSFET synchronous rectifier prevents the converter from entering the
discontinuous mode of operation.
In a discontinuous mode of operation, there is an interval of time during which a diode would normally block reverse current to prevent back conduction. A conducting MOSFET cannot block reverse current since it conducts in both quadrant one and
quadrant three. Therefore, discontinuous operation is prevented. Considerable AC currents circulate in the converter even if little or no power is delivered to the load. Therefore, a converter with MOSFET synchronous rectifiers becomes increasingly
inefficient as the output power approaches zero. Circuits which employ bipolar transistors experience similar reverse conduction losses at low power levels.
One popular application for low voltage, synchronously rectified, switched mode power converters is in portable computers. Because of limited battery capacity, portable computers shut down disk drives and displays when not in use. These power
conserving techniques result in very wide variations in load (as high as 1000:1). These wide load variations make discontinuous mode operation highly desirable. Because high efficiency is critical, synchronous rectification is often employed and back
conduction through the synchronous rectifier at low power levels is unacceptable. Accordingly, an efficient power converter should employ a synchronous rectifier at high power levels and an ordinary rectifier, such as a diode, at low power levels. The
efficiency loss due to the forward drop of the diode rectifier is more than compensated by the elimination of reverse conduction losses.
Two existing solutions are known to allow synchronous rectification in wide load power converters. First, some switched mode power converters have a mechanism to manually enable or disable the synchronous rectifier using an externally generated
signal. While the synchronous rectifier is disabled, a parallel-connected diode takes over. This approach, however, requires an external circuit to detect the onset of low power operation and manually disable the synchronous rectifier. This solution
thus requires additional circuit design and the additional circuitry consumes additional board space. This solution may increase the size and cost of an electronic device employing such a switched mode power converter.
A second existing solution requires one or more external current sense resistors and the onset of low power operation is detected by monitoring the voltage across these resistors to detect current variations. Although this scheme eliminates the
need for an external control signal, it has two serious disadvantages. First, the current sense resistors represent unwanted dissipative elements in the power circuit, thus creating an efficiency loss that is significant at high power levels. Second,
the current sense resistors are sensitive to noise that may interfere with the proper operation of the circuit. Therefore, using current sense resistors complicates board layout and may represent an unpredictable source of transient instabilities due to
unexpected mode transitions. Current sense transformers can be used in place of current sense resistors, but they are relatively expensive and require one or more additional magnetic components to be added to the circuit.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for sustaining efficiency over wide load ranges in a switched mode power converter. An apparatus utilizing the method is also disclosed. The method will work with any switched mode
power converter having at least one synchronous rectifier capable of being enabled or disabled that is coupled to an inductor by direct connection or otherwise. The switched mode converter will also normally have a control circuit to generate a cyclical
switching signal having an on-period and an off-period during each cycle, and a diode rectifier to provide a current path for the inductor current when the synchronous rectifier is disabled and also capable of blocking reverse current flow in the
inductor. The power converter is initialized by enabling the synchronous rectifier. For example periodically, the synchronous rectifier is disabled. While the synchronous rectifier is disabled, the energy stored in the inductor is detected by sensing
a voltage representing the energy stored in the inductor. A power level signal is generated by comparing the detected energy to a known energy level. The resulting signal has at least two predetermined values. The first predetermined value of the
power level signal indicates that the power converter is operating at a power level above a threshold, and the second value selected indicates that the power converter is operating at a power level below the threshold. The power converter is then
configured in response to the power level signal by enabling the synchronous rectifier if the power level signal is equal to the first predetermined value, and by disabling the synchronous rectifier if the power level signal is equal to the second
predetermined value. The disabling step, detecting step, generating step, and configuring step are then repeated.
One important technical advantage of the present invention is that the disclosed method and apparatus allow a switched mode power converter equipped with a synchronous rectifier to sustain high efficiencies over wide load ranges. The invention
disables the synchronous rectifier when the power level drops below a selected threshold so as to prevent inductor current backflow and the corresponding efficiency losses. The invention has a significant advantage over existing techniques as the
disclosed method and apparatus are fully automatic and require no external control signals. The invention does not require additional current sense components and thus improves efficiency of the power supply. The use of the present voltage sensing
technique makes the method and apparatus of the present invention significantly less sensitive to noise than existing current sensing techniques, thus providing another significant advantage of the invention over existing techniques. Other technical
advantages of the disclosed invention will be apparent to those skilled in the art of designing power converter circuits.
BRIEF DESCRIPTION OF THE DRAWINGS
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
FIG. 1 illustrates a synchronous rectifier disabler circuit made in accordance with the teachings of the present invention and capable of performing the method of the present invention;
FIG. 2 illustrates a type of test pulse generator that can be used in the synchronous rectifier disabler circuit of FIG. 1;
FIG. 3 illustrates an implementation of a synchronous rectifier disabler circuit made in accordance with the teachings of the present invention and used with a buck converter;
FIG. 4 illustrates an example of a test pulse generator which can be used with the synchronous rectifier disabler circuit of FIG. 1;
FIG. 5 illustrates a voltage wave form produced at a node of the circuit of FIG. 7, FIG. 9, or FIG. 10;
FIG. 6 illustrates an example of a current wave form that could occur in the inductor of FIG. 7, FIG. 9, or FIG. 10;
FIG. 7 illustrates another implementation of the synchronous rectifier disabler circuit of FIG. 1 used in a buck converter;
FIG. 8 illustrates an embodiment of a test pulse generator that could be used in the synchronous rectifier disabler circuit of FIG. 1;
FIG. 9 illustrates another embodiment of a synchronous rectifier disabler circuit made in accordance with the teachings of the present invention and applied to a buck converter.
FIG. 10 illustrates another embodiment of a synchronous rectifier disabler circuit made in accordance with the teachings of the present invention and applied to a buck converter.
DETAILED DESCRIPTION OF THE INVENTION
The present invention and its advantages are best understood by referring to FIGS. 1-10 of the drawings, like numerals being used for like and corresponding parts of the various drawings. For the purpose of understanding the present invention,
the terms coupled, couples, etc. will refer to coupling between two elements by direct connection, magnetic coupling, or any other form of coupling. An element can be coupled to another element through other elements.
FIG. 1 illustrates a synchronous rectifier disabler circuit made in accordance with the teachings of the present invention. Disabler circuit 10 comprises test pulse generator 12, rectifier controller 14, mode memory 16, and mode sensor 18.
Disabler circuit 10 may be; for example, an integrated circuit or a portion of an integrated circuit. Disabler circuit 10 is designed to be used with a switched mode power converter including at least one synchronous rectifier capable of being enabled
or disabled, and coupled to an inductor. In some converters, multiple synchronous rectifiers may be associated with an inductor. The switched mode power converter normally has a control circuit to generate one or more cyclical switching signals to
drive the externally controlled switches in the converter. When the synchronous rectifier is enabled, the control circuit turns the rectifier on and off in synchrony with another switch or switches. When the synchronous rectifier is disabled, it
remains off regardless of the control circuit. A converter used with the present invention will also have at least one diode rectifier providing an alternate current path for the inductor current when the synchronous rectifier is disabled and also
capable of blocking reverse current flow through the inductor.
The control circuit of the switched mode power converter is coupled to test pulse generator 12 and rectifier controller 14. Rectifier controller 14 is coupled to the synchronous rectifier and is capable of enabling or disabling the synchronous
rectifier. Mode sensor 18 is coupled to the switched mode power converter so as to directly or indirectly measure the voltage across the inductor.
Test pulse generator 12 is coupled, by connection or otherwise, to mode memory 16 and rectifier controller 14. Rectifier controller 14 is coupled to mode memory 16. Mode memory 16 is coupled to mode sensor 18. Before describing in detail the
operation of disabler circuit 10, the following discussion provides a brief description of its theory of operation.
As described in the Background of the Invention, switched mode power converters with diode rectifiers typically have two modes of operation, a continuous mode and a discontinuous mode. A switched mode power converter operates in continuous mode
when power flowing through the inductor in question exceeds a critical threshold value, and operates in discontinuous mode when the power is lower than this threshold. When the power is exactly equal to this threshold, the converter is said to operate
in nearly continuous mode.
Existing techniques for sensing power flow through the converter normally involve sensing current through a current sense resistor or transformer. The present invention uses a voltage sensing technique to determine when the converter is
supplying low levels of power.
Because most synchronous rectifiers cannot block reverse current, a synchronous rectifier normally prevents the converter from entering discontinuous mode. If a diode rectifier is used instead of a synchronous rectifier, the onset of
discontinuous mode can be detected by monitoring the voltage across the inductor during the portion of the switching cycle in which the first derivative of inductor current is negative (the off-time interval). If the power converter is operating in
continuous mode, the inductor current will never fall to zero, and the diode rectifier will continue to conduct. The first derivative of inductor current accordingly remains negative and the inductor supports a voltage drop V=L di/dt where L is the
inductance of the lumped inductor and di/dt is the first derivative of the inductor current with respect to time. If, on the other hand, the power converter is operating in discontinuous mode, then the inductor current will ramp down to zero, at which
point the diode rectifier will act so as to block reverse conduction, and the value of di/dt will go to zero. The inductor will then be unable to support a voltage differential, leading to a sudden change in the voltage across the inductor. This
voltage change can be sensed by measuring the differential voltage across the inductor, or any associated voltage. For example, one can measure the voltage across a winding magnetically coupled to the inductor, or any voltage or set of voltages from
which the inductor differential voltage can be obtained by application of Kirchoff's Voltage Law. Accordingly, sensing this voltage at the end of an off-time interval can indicate whether the converter is operating in the discontinuous or continuous
conduction mode.
Unfortunately, as noted above, a synchronous rectifier normally cannot block reverse current. When the synchronous rectifier is operating, the current through the inductor can decrease to zero and actually go negative at low power levels. The
inductor di/dt will remain negative and the differential voltage across the inductor will not drop to zero. Therefore, this sensing technique will not work while the synchronous rectifier is operating.
It is thus impractical to employ the present invention while the synchronous rectifier is operating. However, the synchronous rectifier can be disabled occasionally at infrequent intervals. The rectifier could be disabled at random times or
periodically after a specific plurality of cycles of the switching signal. The synchronous rectifier can be disabled, for example, for an entire cycle of the switching signal or less than an entire cycle of the switching signal. When the synchronous
rectifier is disabled, a diode rectifier in the power converter provides an alternate current path for the inductor current. This rectifier should be capable of sustaining sufficient reverse bias voltage to allow it to block reverse current flow in the
inductor. While the synchronous rectifier is disabled, the technique discussed directly above allows sensing the voltage across the inductor, thus allowing a determination of whether the converter is operating at a power level indicative of a continuous
or discontinuous mode. If a low power level is detected, the synchronous rectifier can be disabled until another time interval has passed, which will prevent reverse conduction through the synchronous rectifier and the associated efficiency losses.
Because the synchronous rectifier is only occasionally disabled, the efficiency benefits of synchronous rectification are largely retained for high power operation and the benefits of ordinary rectification can be obtained at low power levels.
The power flowing through an inductor in discontinuous mode can be determined by monitoring the voltage developed across the inductor. Consider an inductance L(I), which is a possibly nonlinear function of the current I through the inductor. If
at time t=0, defined as the time when the inductor current is at a maximum, the inductor carries a current I.sub.o, then the energy, E.sub.0 stored in this inductor at time t=0 is: ##EQU1## If this inductor has an externally imposed voltage differential
V(t) applied across it, V(t) possibly being a nonlinear function of time, then the following differential equation holds:
If the inductor is operating in discontinuous mode, and assuming that the inductor is discharged only once during each cycle of the converter's operation, then the time-averaged power flow associated with the inductor during one cycle of
operation, P.sub.avg, is:
where T is the period of the converter, and it is understood that P.sub.avg, E.sub.o and T are all possibly time-varying quantities. If there are multiple discontinuous mode discharge intervals in a single cycle of operation, the average power
is then the summation of all such discharges divided by the period of the converter, or
The above equations can be used to determine the power flow associated with the inductor, P.sub.avg, in terms of a time, t.sub.d, where t.sub.d is defined as the time required for the inductor current to discharge from I.sub.0 to 0. Consider as
an example the simplified case where L and V are invariant over the interval 0<t<t.sub.d and there is only one discharge per period. Equation (2) can be integrated over the interval 0<t<t.sub.d to form:
Substituting for I.sub.o in equation (1) gives: ##EQU2## And substituting equation (6) into equation (3) gives: ##EQU3## This equation shows that there is a relationship between the discharge time t.sub.d and the average power P.sub.avg. In the
most general case, a multidimensional nonlinear equation of the form P.sub.avg =f(t.sub.d1, t.sub.d2, t.sub.d3 . . . ) can be derived, which shows the dependence of P.sub.avg on each discharge interval in one cycle of converter operation. So long as
the inductor discharges fully in each discharge interval, this equation applies.
The voltage across the inductor, V(t), will drop to zero at time t=t.sub.d because inductor current drops to zero and remains there, and di/dt thus goes to zero. Thus, by measuring V(t) at t=t.sub.m, t.sub.m being an arbitrary measurement point
relative to t=0, it is possible to determine if t.sub.d <t.sub.m, or t.sub.d >t.sub.m. Specifically, if V(t).apprxeq.0, then t.sub.d <t.sub.m ; otherwise t.sub.d >t.sub.m. Because P.sub.avg is proportional to t.sub.d by equation 7, this
amounts to a method by which it is possible to determine if P.sub.avg exceeds a threshold value, P.sub.m corresponding to t.sub.m. Because E.sub.0 is proportional to P.sub.avg by equation 3, this provides a method of determining if E.sub.0 exceeds a
threshold value, E.sub.m corresponding to P.sub.m. Thus, by measuring the voltage across the inductor, it is possible to determine the average power flowing through the inductor, or equivalently, the energy stored in the inductor.
In order to disable the synchronous rectifiers to prevent efficiency losses in discontinuous mode, a threshold of power just below that required to sustain continuous conduction can be set. By infrequently disabling the synchronous rectifier and
monitoring the inductor voltage, it is possible to determine whether the converter is operating at a power level above or below this threshold. If the converter is operating above this power threshold, the synchronous rectifier can be enabled. If the
converter is operating below this power threshold, the synchronous rectifier can be disabled until the next time that the monitoring circuit examines the inductor voltage.
More generally, two thresholds Ph and Pl can be established, where Ph is somewhat larger than Pl, and the difference Ph-Pl represents a hysteresis margin. If the converter's synchronous rectifier(s) are disabled, then the power level detected by
the monitor circuit must exceed Ph before they will be enabled. If the converter's synchronous rectifier(s) are enabled, then the power level detected by the monitor circuit must drop below Pl before they will be disabled.
The method and apparatus of the present invention allow the switched mode power converter to sustain efficiency over wide load ranges. In operation, the method involves initializing the power converter by enabling or disabling the synchronous
rectifier. Occasionally, the synchronous rectifier is disabled. During the interval in which the synchronous rectifier is disabled, the energy stored in the inductor is detected by sensing a voltage representing the energy stored in the inductor.
After the detecting step, a power level signal is generated having at least two possible values. The power level signal is generated by comparing the detected energy to a known energy level. A first value of the power level signal indicates that the
power converter is operating at a power level above a certain threshold, while a second value of the power level signal indicates that the power converter is operating at a power level below the threshold. This threshold value can, for example, be a
power level near the boundary between continuous and discontinuous operation of the power converter. In practice, as described below, the threshold will normally be slightly above the boundary between continuous and discontinuous operation.
After the power level signal has been generated, the power converter is configured in response to the power level signal by enabling the synchronous rectifier if the power level signal is equal to the first value, and disabling the synchronous
rectifier if the power level signal is equal to the second value. For example, the power converter can be configured to enable the synchronous rectifier if the power level exceeds the aforementioned threshold, and disable the synchronous rectifier if
the power level is lower than that threshold.
The steps of disabling the rectifier, detecting the energy stored in the inductor, generating a power level signal based on the energy stored in the inductor and configuring the power converter in response to the power level signal are then
repeated.
This method can be implemented using disabler circuit 10 of FIG. 1, the structure which was described above. In operation, test pulse generator 12 receives the switching signal from the control circuit of the switched mode power converter and
occasionally generates a test pulse in response to the switching signal. Various examples of circuits that can be used for test pulse generator 12 are described below.
Mode sensor 18 is coupled to-the inductor and is operable to generate a power level signal having at least two possible values wherein the first value of the power signal indicates that the power converter is operating at a power level above a
threshold and the second value of the power level signal indicates that the power converter is operating at a power level below the threshold. The power level signal is generated by sensing a voltage representative of the energy stored in the inductor
and by comparing the detected energy represented by the voltage to a threshold energy value.
For example, in a buck converter, the mode sensor could sense the voltage at the cathode of the rectifier that provides the alternate path for inductor current when the synchronous rectifier is disabled. Alternatively, a voltage can be sensed in
other ways such as by using a secondary winding on the inductor. Mode memory 16 is operable to sample and store the value of the power level signal in response to the test pulse. Mode memory 16 can also produce a memory output equivalent to the stored
value. Although the power level signal could be sampled at any time during an off-period of a cycle of the switching signal, the power level signal will normally be sampled at a transition edge of the test pulse. Specifically, mode memory 16 will
normally be constructed to sample the power level signal from mode sensor 18 at a transition edge of the test pulse that occurs at the end of an off-period of the switching signal or, as described below, a delayed transformation of the switching signal.
Rectifier controller 14 is operable to disable the synchronous rectifier in response to the test pulse and can be designed to disable the synchronous rectifier for the entire duration of the test pulse. Rectifier controller 14 is also operable
to disable the synchronous rectifier in response to the switching signal in accordance with the normal operation of a power converter. A synchronous rectifier is normally switched off during the on-period of a switching cycle and switched on during the
off-period of a switching cycle. Rectifier controller 14 is further operable to disable the synchronous rectifier when the memory output equals the second value of the power level signal. In other words, rectifier controller 14 disables the synchronous
rectifier when the memory output indicates that the power converter is operating at a power level below a certain threshold.
The discussion below illustrates three embodiments of the present invention and their use with a buck type switched mode power converter. Although three embodiments are disclosed, other embodiments could be constructed in accordance with the
teachings of the present invention. In addition, the method and apparatus of the present invention are useful with many types of power converter topologies other than the buck type switched mode power converter.
FIG. 2 illustrates an embodiment of a test pulse generator 12 that can be used in disabler circuit 10 in accordance with the teachings of the present invention. This embodiment of test pulse generator 12 comprises a counter that counts N cycles
of the switching signal as provided by the control circuit. On the Nth cycle, the counter generates a test pulse. The test pulse can, for example, have a duration equivalent to the duration of one cycle of the switching signal. The value of N could be
hard wired into test pulse generator 12 or test pulse generator 12 could be programmable such that the user of disabler circuit 10 could provide the value of N for a specific application. Ordinarily, the value of N will be a large integer such that
generator 12 only occasionally generates a test pulse.
FIG. 3 illustrates an embodiment of a synchronous rectifier disabler circuit 10 structured (or arranged) in accordance with the teachings of the present invention. Test pulse generator 12 has the implementation of test pulse generator 12
illustrated in FIG. 2. Test pulse generator 12 counts N cycles of the switching signal, TON, and once in every N cycles, produces a test pulse that will normally have a duration equal to one cycle of the switching signal. This pulse is used to disable
the synchronous rectifier, Q.sub.2, for one cycle of operation via AND gate 20. In this embodiment, AND gate 20 serves as rectifier controller 14. Here, synchronous rectifier Q.sub.2 may be an n- type MOSFET.
A portion of a representative buck converter is illustrated in FIG. 3. The input voltage is applied to the source lead of p-type MOSFET Q.sub.1. The drain of Q.sub.1 is connected to the drain of n-type MOSFET Q.sub.2. The source of MOSFET
Q.sub.2 is grounded. A rectifier, D.sub.1, is connected in parallel with synchronous rectifier Q.sub.2 and serves as an alternate current path for inductor L.sub.1 when synchronous rectifier Q.sub.2 is disabled. The switching of transistor Q.sub.1 and
synchronous rectifier Q.sub.2 are controlled by a control circuit (not explicitly shown) that produces a switching signal, TON. TON has an on-period and an off-period during each cycle of the switching signal. For the embodiment illustrated in FIG. 3,
TON can represent a signal that is "high" when transistor Q.sub.1 is turned on and "low" when transistor Q.sub.1 is turned off. A feedback network (not explicitly shown) is normally connected to the buck converter and included in the control circuit,
which allows the duty cycle of TON to be adjusted in response to the power level at which the converter is operating.
When synchronous rectifier Q.sub.2 is disabled, fast comparator 22 monitors the cathode voltage at the cathode of rectifier D.sub.1. Fast comparator 22 serves as mode sensor 18 depicted in FIG. 1. The output of the comparator is latched into
flip-flop 24, which serves as mode memory 16 depicted in FIG. 1, on the transition edge of the test pulse provided by test pulse generator 12. In this embodiment, the output of comparator 22 serves as the power level signal that indicates whether the
power converter is operating at a power level above or below a selected threshold. The power level is detected at the transition edge of the test pulse occurring approximately at the conclusion of an off-period of the switching signal.
The output of flip-flop 24 is coupled to AND gate 20 and disables the synchronous rectifier when the flip-flop output indicates that the power level has dropped below the selected threshold level.
The occasional disabling of the synchronous rectifier and insertion of the diode into the converter topology for one cycle of the switching signal disturbs the steady state continuous mode operation of the circuit. The losses induced by the
insertion of the parallel diode disturb the average current level through the converter due to introduction of a volt-second imbalance. This effect will be gradually damped out over a period of several cycles of operation, | | |
