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Digital signal decoding apparatus    
United States Patent5461378   
Link to this pagehttp://www.wikipatents.com/5461378.html
Inventor(s)Shimoyoshi; Osamu (Kanagawa, JP); Akagiri; Kenzo (Kanagawa, JP); Abe; Miki (Kanagawa, JP); Watanabe; Takahiro (Tokyo, JP)
AbstractThere is provided a decoding apparatus adapted for decoding a coded signal from a coding apparatus adapted to divide an input, digital signal into signals in frequency bands by using at least one filter to divide respective filter outputs into blocks every plural words to carry out a first block floating processing every respective blocks to further implement an orthogonal transform processing to the signal which has been subjected to the first block floating processing to thereby conduct frequency analysis thereafter to divide the orthogonally transformed output into blocks every plural words to carry out a second block floating processing every respective blocks, wherein after the second block floating is released by using a predetermined number of inverse floating circuits, the coded signal is restored to a signal on the time base by inverse orthogonal transform processing at a predetermined number of IMDCT circuits, and the first block floating is released in the process of the inverse orthogonal transform operation.
   














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Inventor     Shimoyoshi; Osamu (Kanagawa, JP); Akagiri; Kenzo (Kanagawa, JP); Abe; Miki (Kanagawa, JP); Watanabe; Takahiro (Tokyo, JP)
Owner/Assignee     Sony Corporation (Tokyo, JP)
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Publication Date     October 24, 1995
Application Number     08/118,456
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     September 8, 1993
US Classification     341/51 704/204
Int'l Classification     H03M 007/30
Examiner     Williams; Howard L.
Assistant Examiner    
Attorney/Law Firm     Limbach, Sammut; Charles P. Limbach &
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Priority Data     Sep 11, 1992[JP]4-243574
USPTO Field of Search     341/50 341/51 395/2.13 395/2.37
Patent Tags     digital signal decoding
   
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Tsutsui
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What is claimed is:

1. A method of decoding a coded digital signal, the coded digital signal generated by spectrally separating an input signal, plural word blocking the spectrally separated input signal, orthogonally transforming the blocked spectrally separated input signal and adaptive bit allocation coding the transformed blocked spectrally separated input signal, comprising the steps of:

adaptively decoding the coded digital signal into plural signals;

calculating a first block floating quantity from a floating quantity derived from the input signal;

calculating a second block floating quantity from the first block floating quantity;

releasing a second block floating of each of the plural signals based upon the second block floating quantity;

determining a number of scale down times based upon the first block floating quantity;

inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

bit shifting each of the inverse orthogonally transformed plural signals.

2. The method of claim 1, further comprising the step of:

combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

3. The method of claim 2, wherein the step of combining is performed by at least one filter, further comprising the steps of:

broadening a frequency bandwidth in response to a shift of the input signal to a lower frequency band.

4. The method of claim 3, wherein the filters for combining are cascade-connected.

5. The method of claim 1, wherein the step of inverse orthogonally transforming further comprises the step of:

releasing the first block floating based upon repeated scale downs.

6. The method of claim 5, wherein the repeated scale downs are reversible.

7. The method of claim 6, wherein a number of scale down times is determined on the basis of the first block floating quantity.

8. The method of claim 5, wherein scale down is implemented in the step of inverse orthogonal transforming to thereby prevent overflow.

9. The method of claim 1, wherein said step of inverse orthogonal transforming is performed at a variable block size.

10. The method of claim 1, 2, 5, 6, 7 or 8, wherein the inverse orthogonal transforming is an inverse modified cosine transforming.

11. A method of decoding a coded digital signal, the coded digital signal generated by dividing into blocks every several words of an input signal, orthogonally transforming the blocks and adaptive bit allocation coding the orthogonally transformed blocks, comprising the steps of:

adaptively decoding the coded digital signal into plural signals;

calculating a first block floating quantity from a floating quantity derived from the input signal;

calculating a second block floating quantity from the first block floating quantity;

releasing a second block floating of each of the plural signals based upon the second block floating quantity;

determining a number of scale down times based upon the first block floating quantity;

inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

bit shifting each of the inverse orthogonally transformed plural signals.

12. The method of claim 11, further comprising the step of:

combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

13. The method of claim 11, wherein the step of inverse orthogonally transforming further comprises the step of:

releasing the first block floating based upon repeated scale downs.

14. The method of claim 13, wherein the repeated scale downs are reversible.

15. The method of claim 14, wherein a number of scale down times is determined on the basis of the first block floating quantity.

16. The method of claim 13, wherein scale down is implemented in the step of inverse orthogonal transforming to thereby prevent overflow.

17. The method of claim 11, 12, 13, 14, 15 or 16, wherein the inverse orthogonal transforming is an inverse modified cosine transforming.

18. The method of claim 11, wherein said inverse orthogonal transforming is performed at a variable block size.

19. An apparatus for decoding a coded digital signal, the coded digital signal generated by spectrally separating an input signal, plural word blocking the spectrally separated input signal, orthogonally transforming the blocked spectrally separated input signal and adaptive bit allocation coding the orthogonally transformed blocked spectrally separated input signal, comprising:

means for adaptively decoding the coded digital signal into plural signals;

means for calculating a first block floating quantity from a floating quantity derived from the input signal;

means for calculating a second block floating quantity from the first block floating quantity;

means for releasing a second block floating of each of the plural signals based upon the second block floating quantity;

means for determining a number of scale down times based upon the first block floating quantity;

means for inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

means for bit shifting each of the inverse orthogonally transformed plural signals.

20. The apparatus of claim 19, further comprising:

means for combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

21. The apparatus of claim 20, wherein the means for combining further comprises:

cascade-connected band synthesis filters.

22. The apparatus of claim 19, wherein the means for inverse orthogonally transforming further comprises:

means for releasing the first block floating based upon repeated scale downs.

23. The apparatus of claim 22, wherein the repeated scale downs are reversible.

24. The apparatus of claim 23, wherein the means for releasing further comprises:

means for determining a number of scale down times on the basis of the first block floating quantity.

25. The apparatus of claim 22, wherein scale down is implemented to thereby prevent overflow.

26. The apparatus of claim 19, wherein said means for inverse orthogonal transforming transforms at a variable block size.

27. The apparatus of claim 19, 20, 21, 22, 23, 24, or 25, wherein the means for inverse orthogonal transforming comprises:

an inverse modified cosine transformer.

28. An apparatus for decoding a coded digital signal, the coded digital signal generated by dividing into blocks every several words of an input signal, orthogonally transforming the blocks and adaptive bit allocation coding the orthogonally transformed blocks, comprising:

means for adaptively decoding the coded digital signal into plural signals;

means for calculating a first block floating quantity from a floating quantity derived from the input signal;

means for calculating a second block floating quantity from the first block floating quantity;

means for releasing a second block floating of each of the plural signals based upon the second block floating quantity;

means for determining a number of scale down times based upon the first block floating quantity;

means for inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

means for bit shifting each of the inverse orthogonally transformed plural signals.

29. The apparatus of claim 28, further comprising:

means for combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

30. The apparatus of claim 29, wherein the means for combining further comprises:

cascade-connected band synthesis filters.

31. The apparatus of claim 28, wherein the means for inverse orthogonally transforming further comprises:

means for releasing the first block floating based upon repeated scale downs.

32. The apparatus of claim 31, wherein the repeated scale downs are reversible.

33. The apparatus of claim 32, wherein the means for releasing further comprises:

means for determining a number of scale down times on the basis of the first block floating quantity.

34. The apparatus of claim 31, wherein scale down is implemented to thereby prevent overflow.

35. The apparatus of claim 28, wherein said means for inverse orthogonal transforming transforms at a variable block size.

36. The apparatus of claim 28, 29, 30, 31, 32, 33 or 34, wherein the means for inverse orthogonal transforming comprises:

an inverse modified cosine transformer.
 Description Submit all comments and votes
 


BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a digital signal decoding apparatus adapted for decoding a transmitted or reproduced signal (data) obtained after a signal coded by an efficient coding apparatus for efficiently coding input digital data by the so-called block floating processing is transmitted or recorded.

2. Description of the Prior Art

There has been conventionally known an efficient coding technology to orthogonally transform an audio signal, etc. to divide its orthogonally transformed output into blocks every plural words to carry out floating processing every respective blocks to implement quantization thereto to record on a medium, or transmit thereto, floating information and quantization information along with a quantized output. Here, the above-mentioned block floating technique is basically directed to a technique to multiply respective words within the block by a value common thereto so that they have larger values, thus to improve the accuracy at the time of quantization. For an actual example, there is a block floating technique to search for the maximum one of absolute values (i.e., maximum absolute value) of respective words within the block to implement floating processing to all words within the block by using a floating coefficient common thereto, so that the maximum absolute value is not saturated. For a simpler block floating technique, there is also a block floating technique with 6 dB being as a unit utilizing bit shift.

However, in conventional orthogonal transform processing, without use of the block floating technique, a sufficient accuracy is ensured even at the time of any input, and an operation word length is made long to such a sufficient degree that the word length accuracy of a signal inputted to an orthogonal transform circuit is not damaged by the orthogonal transform processing. Further, an approach is employed to allow the block size for the orthogonal transform processing to be variable depending upon the property in point of time of a signal, thus to improve the analysis accuracy. There are instances where, as an index for judgment therefor, root mean square values of differences between adjacent samples of a signal are used.

Meanwhile, in such orthogonal transform processing, in order to perform an operation while maintaining the accuracy of an input, the operation word length becomes longer. For this reason, the scale of the hardware becomes large, resulting in great difficulty from an economical point of view. Further, in the case where the block size for the orthogonal transform processing is caused to be variable, newly determining a judgment index therefor only for the purpose results in an increase in the number of operation steps.

Further, in order to search for the above-described maximum absolute value in the above-mentioned block floating processing, such a procedure is required to judge whether or not the absolute value of the present (current) word is larger than the maximum absolute value of past words with respect to all words within one block. As a result, the number of steps in the processing program becomes large and it, takes much time therefor.

In view of the above, the applicant of this invention has already proposed, in the specification of the Japanese Patent Application No. 235613/1991 and the drawings attached therewith, an efficient coding technique to orthogonally transform an audio signal, etc. to divide the orthogonally transformed output, into blocks every plural words to carry out floating processing every respective blocks to implement quantization thereto to record floating information and quantization information along with a quantized output onto a medium, or transmit such information thereto wherein an approach is employed to carry out a first block floating processing before the orthhogonal transform processing, and to carry out a second block floating processing after the orthogonal transform processing to thereby prevent degradation in the operation accuracy during the execution of the orthogonal transform operation. This technique which has been already proposed in the specification and the drawings mentioned above is directed to the technique to multiply respective words within a unit to carry out the orthogonal transform processing (orthogonal transform block) by a coefficient common thereto, thus to improve the accuracy at the time of the orthogonal transform processing. As a simpler method, a block floating with 6 dB being as a unit utilizing bit shift is frequently used.

Meanwhile, in the inverse orthogonal transform processing for decoding corresponding to the orthogonal transform processing in the above-mentioned efficient coding, when an attempt is made to implement inverse orthogonal transform processing to words which have been subjected to floating before inputting to the orthogonal transform circuit while maintaining its floating state, there results a high possibility that an overflow may take place in the process of the operation.

In order to prevent such overflow, however, when small floating coefficients are used to carry out floating, there results degrated operation accuracy.

OBJECT AND SUMMARY OF THE INVENTION

This invention has been proposed in view of actual circumstances as described above, and its object is to provide a digital signal decoding apparatus capable of carrying out, with a small scale of the hardware and a lesser operation quantity, inverse orthogonal transform operation processing used in decoding corresponding to the orthogonal transform processing in the efficient coding processing.

To achieve the above-mentioned object, in accordance with this invention, there is provided a digital signal decoding apparatus adapted to decode a coded signal from a digital signal coding apparatus, adapted to divide an input digital signal into signals in frequency bands by using at least one filter to divide respective filter outputs into blocks every plural words to carry out a first block floating processing every respective blocks to further implement an orthogonal transform processing to the signal which has been subjected to the first block floating processing to thereby conduct frequency analysis to divide the orthogonally transformed output into blocks every plural words to carry out a second block floating processing and a quantization processing every respective blocks, wherein after the second block floating is released, an inverse orthogonal transform processing is implemented to the coded signal to thereby conduct frequency synthesis to restore it to a signal on the time base, and the first block floating is released in the process of the inverse orthogonal transform operation.

In the digital signal decoding apparatus thus featured, scale down is repeatedly carried out in the process of the inverse orthogonal transform operation to thereby release the first block floating. At this time, scale down in the process of the inverse orthogonal transform operation is reversibly carried out. Further, the number of scale down times (operations) in the process of the inverse orthogonal transform operation is determined on the basis of the first block floating quantity. In this way, scale down is implemented in the process of the inverse orthogonal transform operation to thereby prevent overflow in the process of the operation.

In a coding apparatus corresponding to the digital signal decoding apparatus featured above, the above-mentioned band division by filter is such that as the frequency shifts to a lower frequency band, the frequency band width is caused to be broad. This band division by filter may be realized by cascade-connecting filters for dividing the frequency band into two frequency bands.

Further, in the digital signal decoding apparatus thus featured, the above-mentioned inverse orthogonal transform processing is an Inverse Modified Discrete Cosine Transform processing, and the above-mentioned inverse orthogonal transform processing is carried out at a variable block size.

Namely, the digital signal decoding apparatus of this invention is adapted to implement inverse orthogonal transform processing to words in which the second block floating is released to release the first block floating to be released at the inverse orthogonally transformed output by scale down in the process of the inverse orthogonal transform operation, and to reasonably repeatedly implement that scale down at the releasing operation of the first block floating to prevent an overflow in the process of the inverse orthogonal transform operation, thereby to contemplate solving the above-mentioned problems.

While the above-mentioned digital signal decoding apparatus is directed to an apparatus in which the band division coding and the orthogonal transform coding are taken into consideration, this invention may be applied, in the same manner as above, to an apparatus such as a Digital Compact Cassette (DCC) in which only the orthogonal transform coding is taken into consideration.

In accordance with this invention, the number of scale down times (operations) is determined on the basis of a first block floating quantity to repeatedly carry out scale down operations of the determined number of times in the process of the inverse orthogonal transform operation, thus making it possible to reduce the inverse orthogonal transform operation accuracy to a reasonable degree from a viewpoint of the entirety of efficient decoding, and to prevent an overflow at the time of the operation processing for the inverse orthogonal transform processing.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram showing, in a block form a digital signal coding apparatus corresponding to a digital signal decoding apparatus of this invention.

FIG. 2 is a circuit diagram showing, in a block form, an actual circuit configuration for carrying out the block floating operation in the apparatus shown in FIG. 1.

FIG. 3 is a flowchart for realizing, by software, the block floating operation of the circuit configuration shown in FIG. 2.

FIG. 4 is a view showing an actual example of division into blocks every respective divided frequency bands which extend in a frequency base direction and in a time base direction in the apparatus shown in FIG. 1.

FIG. 5 is a circuit diagram showing, in a block form, an actual example of allowed noise calculation circuit 127 of the apparatus shown in FIG. 1.

FIG. 6 is a view showing a bark spectrum.

FIG. 7 is a view showing a masking spectrum.

FIG. 8 is a view obtained by synthesizing a minimum audible curve and a masking spectrum.

FIG. 9 is a circuit diagram showing, in a block form, a digital signal decoding apparatus which is an embodiment of this invention.

FIG. 10 is a circuit diagram showing, in a block form, the internal configuration of the IMDCT circuit shown in FIG. 9 in more detail.

DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment of this invention will now be described with reference to the attached drawings.

By taking into consideration the flow of the following description, prior to the description of a digital signal decoding apparatus of the embodiment of this invention, a digital signal coding apparatus (efficient coding apparatus) corresponding to the digital signal decoding apparatus of this embodiment will be first described. The digital signal decoding apparatus of this embodiment will be described following the description of the above-mentioned efficient coding apparatus.

The technology for implementing efficient coding to a digital signal by using the technique of the adaptive transform coding (ATC), the technique in which the sideband coding (SBC) and the adaptive transform coding (ATC) are combined, and the technique of the adaptive bit allocation (APC-AB) will now be described with reference to FIG. 1 and figures subsequent thereto.

In an actual efficient coding apparatus shown in FIG. 1, such an approach is employed to divide an input digital signal into signals (signal components) in a plurality of frequency bands by using filters, etc., and to make a selection such that according as the frequency shifts to a higher frequency band, the band width is caused to be broad to carry out orthogonal transform processing every respective frequency bands to adaptively bit-allocate spectrum data on the frequency base thus obtained every so called critical bands in which the hearing sense characteristic of the human being is taken into consideration (which will be described later), or every plural bands obtained by further dividing the critical band in a higher frequency band to encode them. It is of course that the widths of frequency bands divided by using filters may be equal to each other. In the embodiment of this invention, an approach is employed to adaptively vary the orthogonal transform block size (block length) in dependency upon an input signal before the orthogonal transform processing, and to carry out the floating processing every block.

Namely, in FIG. 1, an input terminal 100 is supplied with, e.g., an audio PCM signal of 0.about.20 kHz. This input signal is divided into signals (signal components) in the frequency band of 0.about.10 kHz and the frequency band of 10.about.20 kHz by using a band division filter 101, e.g., so called a QMF filter, etc., and the signal in the frequency band of 0.about.10 kHz is further divided into a signal in the frequency band of 0.about.5 kHz and a signal in t