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Laminated solid-state image pickup device    
United States Patent5481124   
Link to this pagehttp://www.wikipatents.com/5481124.html
Inventor(s)Kozuka; Hiraku (Hiratsuka, JP); Sugawa; Shigetoshi (Atsugi, JP); Shimizu; Hisae (Atsugi, JP)
AbstractCompatibility of high sensitivity with low remaining images, and low crosstalk can be achieved by a laminated solid-state image pickup device, which includes accumulating portions for accumulating electric signals, reading units for reading the electric signals, connecting members formed in contact with the accumulating portions, and a photoconductive film, and by a method for manufacturing the device. The photoconductive film is made of a non-crystalline semiconductor, and is configured by laminating a carrier multiplication layer, a light absorbing layer, a charge injection inhibiting layer of a second conduction type. Each of the connecting members is made of a semiconductor layer of a first conduction type, intrinsic or having a low impurity density, surrounded by a semiconductor layer of the second conduction type or a conductive material.
   














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Drawing from US Patent 5481124
Laminated solid-state image pickup device - US Patent 5481124 Drawing
Laminated solid-state image pickup device
Inventor     Kozuka; Hiraku (Hiratsuka, JP); Sugawa; Shigetoshi (Atsugi, JP); Shimizu; Hisae (Atsugi, JP)
Owner/Assignee     Canon Kabushiki Kaisha (Tokyo, JP)
Patent assignment
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Publication Date     January 2, 1996
Application Number     08/288,546
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     August 10, 1994
US Classification     257/185 257/16 257/21 257/22 257/72 257/186 257/191 257/232 257/233 257/292 257/438 257/444 257/446 257/448 257/577 257/E27.149
Int'l Classification     H01L 027/14 H01L 031/00
Examiner     Ngo; Ngan V.
Assistant Examiner    
Attorney/Law Firm     Fitzpatrick, Cella, Harper & Scinto
Address
Parent Case    
Priority Data     Aug 24, 1993[JP]5-229605 Jul 26, 1994[JP]6-174292
USPTO Field of Search     257/16 257/17 257/21 257/22 257/55 257/72 257/185 257/186 257/191 257/232 257/233 257/291 257/292 257/438 257/444 257/446 257/448 257/577
Patent Tags     laminated solid-state image pickup
   
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ReferenceRelevancyCommentsReferenceRelevancyComments
5401952
Sugawa
250/208.1
Mar,1995

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5338947
Watanabe
257/186
Aug,1994

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5324959
Nakamura
257/17
Jun,1994

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5281844
Funaba
257/438
Jan,1994

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5260560
Yamanobe
250/214R
Nov,1993

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5204539
Tsuji
257/21
Apr,1993

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5187553
Makita
257/187
Feb,1993

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What is claimed is:

1. A laminated solid-state image pickup device comprising:

a semiconductor circuit substrate, comprising accumulating portions for accumulating electric signals, and reading means for reading the electric signals;

an insulating layer formed on said semiconductor circuit substrate except at at least parts of said accumulating portions;

connecting members formed in contact with said accumulating portions; and

a photoconductive film laminated on said insulating layer and said connecting members,

wherein said photoconductive film comprises a non-crystalline semiconductor configured by laminating a carrier multiplication layer, a light absorbing layer, a charge injection inhibiting layer of a second conduction type, and

wherein each of said connecting members comprises a first semiconductor region of a first conduction type, instrinsic or having a low impurity density, surrounded by a second semiconductor region of the second conduction type.

2. A device according to claim 1, wherein each of said reading means comprises a device selected from a CCD (charge-coupled device), an MOS (metal oxide semiconductor) transistor, a static induction transistor, and a bipolar transistor.

3. A device according to claim 1, wherein said accumulating portions have a first conductive type.

4. A device according to claim 1, further comprising a transparent conductive layer on said photoconductive film.

5. A device according to claim 1, wherein said non-crystalline semiconductor includes silicon atoms.

6. A device according to claim 1, wherein said connecting members include silicon atoms.

7. A device according to claim 1, wherein said first semiconductor region of the first conduction type comprises a single crystal.

8. A device according to claim 7, wherein the single crystal comprises silicon.

9. A device according to claim 1, wherein said second semiconductor region of the second conduction type is connected to a channel stopper formed in said semiconductor circuit substrate.

10. A device according to claim 1, wherein said second semiconductor region of the second conduction type is connected to another semiconductor region of the same conduction type formed in said semiconductor circuit substrate.

11. A device according to claim 1, wherein said carrier multiplication layer multiplies carriers by an avalanche effect.

12. A device according to claim 1, wherein said carrier multiplication layer has at least one step-back structure.

13. A device according to claim 1, wherein said carrier multiplication layer comprises at least one layer having a mininum band gap of Eg2 and a maximum band gap of Eg3.

14. A device according to claim 13, wherein the band gap of the layer continuously changes from Eg2 to Eg3.

15. A device according to claim 13, wherein the energy difference between Eg3 and Eg2 is equal to or greater than the ionization energy.

16. A device according to claim 1, wherein said carrier multiplication layer comprises a plurality of layers, each having the minimum band gap Eg2 and the maximum band gap Eg3, and wherein the side of the minimum band gap Eg2 of at least one of the plurality of layers contacts the maximum band gap Eg3 of the adjacent layer.

17. A device according to claim 1, wherein said non-crystalline semiconductor comprises one of an amorphous semiconductor, a microcrystalline semiconductor and a polycrystalline semiconductor.

18. A device according to claim 12, wherein the thickness of a layer for forming the step-back structure is at least 50 .ANG. and equal to or less than 1 .mu.m.

19. A device according to claim 1, wherein said light absorbing layer is provided at a side closer to incident light than said carrier multiplication layer.

20. A device according to claim 1, wherein said connecting member is provided on the entire surfaces of said accumulating portions.

21. A laminated solid-state image pickup device comprising:

a semiconductor circuit substrate, comprising accumulating portions for accumulating electric signals, and reading means for reading the electric signals;

an insulating layer formed on said semiconductor circuit substrate except at at least parts of said accumulating portions;

connecting members formed in contact with said accumulating portions; and

a photoconductive film laminated on said insulating layer and said connecting members,

wherein said photoconductive film comprises a non-crystalline semiconductor configured by laminating a carrier multiplication layer, a light absorbing layer, a charge injection inhibiting layer of a second conduction type, and

wherein each of said connecting members comprises a first semiconductor region of a first conduction type, instrinsic or having a low impurity density, surrounded by a conductive material.

22. A device according to claim 21, wherein each of said reading means comprises a device selected from a CCD, an MOS transistor, a static induction transistor, and a bipolar transistor.

23. A device according to claim 21, wherein said accumulating portions have a first conductive type.

24. A device according to claim 21, further comprising a transparent conductive layer on said photoconductive film.

25. A device according to claim 21, wherein said non-crystalline semiconductor includes silicon atoms.

26. A device according to claim 21, wherein said connecting members include silicon atoms.

27. A device according to claim 21, wherein said first semiconductor region of the first conduction type comprises a single crystal.

28. A device according to claim 27, wherein the single crystal comprises silicon.

29. A device according to claim 21, wherein said conductive material is connected to a channel stopper formed in said semiconductor circuit substrate.

30. A device according to claim 21, wherein said conductive material is provided on said first semiconductor region via an insulating layer.

31. A device according to claim 21, wherein said carrier multiplication layer multiplies carriers by an avalanche effect.

32. A device according to claim 21, wherein said carrier multiplication layer has at least one step-back structure.

33. A device according to claim 21, wherein said carrier multiplication layer comprises at least one layer having a mininum band gap of Eg2 and a maximum band gap of Eg3.

34. A device according to claim 23, wherein the band gap of the layer continuously changes from Eg2 to Eg3.

35. A device according to claim 23, wherein the energy difference between Eg3 and Eg2 is equal to or greater than the ionization energy.

36. A device according to claim 21, wherein said carrier multiplication layer comprises a plurality of layers, each having the minimum band gap Eg2 and the maximum band gap Eg3, and wherein the side of the minimum band gap Eg2 of at least one of the plurality of layers contacts the maximum band gap Eg3 of the adjacent layer.

37. A device according to claim 21, wherein said non-crystalline semiconductor comprises one of an amorphous semiconductor, a microcrystalline semiconductor and a polycrystalline semiconductor.

38. A device according to claim 22, wherein the thickness of a layer for forming the step-back structure is at least 50 .ANG. and equal to or less than 1 .mu.m.

39. A device according to claim 21, wherein said light absorbing layer is provided at a side closer to incident light than said carrier multiplication layer.

40. A device according to claim 21, wherein said connecting member is provided on the entire surfaces of said accumulating portions.
 Description Submit all comments and votes
 


BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a laminated solid-state image pickup device, and a method for manufacturing the device, and more particularly, to a laminated solid-state image pickup device having a photoconductive film on a substrate, and a method for manufacturing the device.

2. Description of the Related Art

Recently, solid-state image pickup devices utilizing semiconductors have been increasingly used. In accordance with this tendency, solid-state image pickup devices with higher performance and lower prices have been requested.

For example, CCD's (charge-coupled devices) and MOS (metal oxide semiconductor) solid-state image pickup devices are known as solid-state image pickup devices. In many of such solid-state image pickup devices, a photosensing unit, a signal charge storage unit, and peripheral circuits, such as a signal reading circuit, a main scanning circuit, a signal processing circuit and the like, are formed in the same semiconductor substrate.

In such solid-state image pickup devices, considerably excellent characteristics are obtained in the performance of residual images, and crosstalk between pixels. However, as the device has higher definition, the photosensing area for each pixel is reduced. That is, the photosensing area per unit area, i.e., the effective numerical aperture, is reduced. As a result, the problem that it is difficult to obtain a sufficient sensitivity, in some cases, arises.

In order to provide higher sensitivity, there have been proposals of substantially increasing the numerical aperture by forming a photoconductive film on a semiconductor substrate, in which the above-described (semiconductor) circuits are formed, as a photosensing device (for example, Japanese Patent Laid-open Application (Kokai) Nos. 49-91116 (1974) and 51-10715 (1976)). A solid-state image pickup device having such a configuration is termed a laminated solid-state image pickup device.

FIG. 1 is a schematic cross-sectional view of a laminated solid-state image pickup device.

In FIG. 1, there are shown a p-type silicon substrate 1, a vertical CCD 2, an n-type cathode layer 3, trasfer gate electrodes 4, interlayer insulating films 5, a first pixel electrode 6, a second pixel electrode 7, a photoconductive film 8, and a transparent conductive film 9.

In the case of FIG. 1, a interline-transfer-type CCD image pickup device is formed on the p-type silicon substrate 1. The n-type cathode layer 3 constitutes an accumulating diode for accumulating signal charges. The vertical CCD 2, comprising an n-type buried-channel CCD, is formed close to the n-type cathode layer 3 of the accumulating diode. The first pixel electrode 6 is connected to the n-type cathode layer 3 of the accumulating diode, and the second pixel electrode 7 is connected to the first pixel electrode 6.

The transparent conductive film 9 is formed on the second pixel electrode 7 via the photoconductive film 8. The photoconductive film 8 sandwiched between the transparent conductive film 9 and the second pixel electrode 7 functions as a photoelectric conversion unit. The transfer gate electrodes 4 are made of polysilicon or the like, and transfer electric charges from the accumulating diode to the CCD channel. In order to prevent unnecessary short circuit between the electrodes and the like, interlayer insulating films 5 are provided.

As shown in FIG. 1, in a typical laminated solid-state image pickup device, the n-type cathode layer (an accumulating portion) 3, formed in the substrate 1, and the photoconductive layer 8 are connected by the pixel electrodes 6 and 7.

In the laminated solid-state image pickup device having the configuration shown in FIG. 1, the numerical aperture can be substantially 100%. Hence, the device of this configuration is advantageous over a non-laminated solid-state image pickup device from the viewpoint of an increase in the sensitivity. However, in order to realize an untrahigh-definition solid-state image pickup device having more than two-million pixels, the sensitivity must be further increased.

Furthermore, the problems that crosstalk between pixels increases because the distance between adjacent pixel electrodes is reduced, and that capacitive residual images caused by the capacitance of the photoconductive film are produced, may arise. Such problems are obstacles for providing the performance required for obtaining an image having higher picture quality.

Laminated solid-state image pickup devices which solve the above-described problems have been proposed.

For example, in order to reduce crosstalk between pixels, a proposal of providing a control electrode for preventing crosstalk between pixel electrodes is described in Japanese Patent Laid-open Application (Kokai) No. 4-30577 (1992).

In order to reduce capacitive residual images, a proposal of configuring a connecting conductor for connecting pixel electrodes to a first-conduction-type layer (for example, an n-type-semiconductor layer) of a signal charge storage diode by a first-conduction-type semiconductor, and providing a second-conduction-type layer from a side of the connecting conductor to a second-conduction-type channel stopper layer (for example, a p-type-semiconductor layer) via the surface of a first-conduction-type impurity layer of the accumulating diode is described in Japanese Patent Laid-open Application (Kokai) No. 63-66965 (1988).

A high-sensitivity and high-response-speed photoelectric transducer including a photoconductive region having a carrier multiplication function is described in European Patent Laid-open Application No. EP437633.

A laminated solid-state image pickup device, in which a photoconductive region having a carrier multiplication function is connected to an accumulating capacitive portion using a semiconductive or metallic connecting member, is described in European Patent Laid-open Application No. EP542152.

However, the above-described solid-state iamge pickup devices still have room for improvement with respect to reduction in residual-image characteristics and crosstalk between pixels.

In order to improve residial-image characteristics, it is effective to reduce capacitive residual images. In order to reduce capacitive residual images, it is desirable to completely deplete a region between the photoconductive film and the accumulating capacitive portion.

However, in the laminated solid-state image pickup devices described in Japanese Patent Laid-open Application (Kokai) No. 4-30577 (1992), and European Patent Laid-open Application Nos. EP437633 and EP542152, a photoconductive layer is electrically connected to an accumulating capacitive portion via a metallic electrode or a semiconductive layer including a high-density impurity, and there is no idea of providing a completely depleted region. Hence, there is room for solving the problem of capacitive residual images.

The laminated solid-state image pickup device described in Japanese Patent Laid-open Application (Kokai) No. 63-66965 (1988) has a schematic cross-sectional view shown in FIG. 2.

In FIG. 2, components having the same reference numerals as in FIG. 1 are the same components as those shown in FIG. 1. In FIG. 2, there are shown a p-type a-Si (amorphous silicon) layer 10, an n-type single-crystal Si whisker (a connecting member) 11, an n-type a-Si electrode (a pixel electrode) 12, an undoped a-Si layer (a photoconductive film) 13, a p-type a-SiC film 14, and a p.sup.+ -type channel-stopper layer 15.

As described above, a connecting conductor for connecting the n-type a-Si electrode 12 to the n-type cathode layer 3, serving as the first-conduction-type layer of the signal charge accumulating diode, is formed by the n-type single-crystal Si whisker 11, and the p-type a-Si layer 10 is provided at the circumferential side of the n-type single-crystal Si whisker 11. The p-type a-Si layer 10 is connected to the p.sup.+ -type channel stopper layer 15.

In the photoelectric transducer shown in FIG. 2, in order to substantially increase the numerical aperture, the n-type a-Si electrode 12 is used as the pixel electrode. The area of the n-type a-Si electrode 12 is greater than the area of the connecting portion of the connecting conductor connected to the accumulating diode. Accordingly, when the distribution of the elctric field obtained when a bias voltage is applied to the transparent conductive layer on the photoconductive layer is considered, it is very difficult to deplete the photoconductive film over the entire area of the pixel electrode, and to transport photocarriers, which have reached the pixel electrode, in the lateral direction of the pixel electrode to the accumulating capacitive portion of the accumulating diode. Hence, although residual images can be reduced, there is still room for improvement.

In the device described in Japanese Patent Laid-open Application (Kokai) No. 63-66965 (1988), the single-crystal Si whisker connecting conductor is formed after forming a CCD, using a vapor/liquid/solid-phase growth method (VLS method). In this production method, restrictions are present for the process temperature for circuitry in the substrate, and a high-temperature process for forming a connecting conductor having a low defect density cannot be used. Accordingly, in the production method described in Japanese Patent Laid-open Application (Kokai) No. 63-66965 (1988), it is difficult to sufficiently reduce defects in the connecting conductor, and there is room for improvement in residual-image characteristics.

In the laminated solid-state image pickup devices shown in FIGS. 1 and 2 and described in the foregoing patent applications, as the number of pixels per unit area increases, i.e., as the density of pixels increases, the distance between adjacent pixels is reduced, thereby causing, in some cases, the problem of crosstalk between adjacent pixels.

Also in laminated solid-state image pickup devices in which the area of the pixel electrode is substantially the same as the area of the accumulating capacitive portion of the circuitry in the substrate, sufficient characteristics cannot, in some cases, be obtained due to leakage between pixels via defects present in the interface between the photoconductive film and the insulating film.

As described above, it is difficult to simultaneously reduce capacitive residual images and crosstalk between pixels in laminated solid-state image pickup devices, and there is still room for improvement in laminated solid-state image pickup devices.

SUMMARY OF THE INVENTION

The present invention has been made in consideration of the above-described problems.

It is an object of the present invention to provide a laminated solid-state image pickup device in which residual images and crosstalk between pixels are reduced, and a method for manufacturing the device.

It is another object of the present invention to provide a laminated solid-state image pickup device which can obtain a high-quality image with high sensitivity, and a method for manufacturing the device.

It is still another object of the present invention to provide a laminated solid-state image pickup device in which an electric field is uniformly applied from a photoconductive film to an accumulating capacitive portion, and a depleted state can be realized, and a method for manufacturing the device.

It is yet another object of the present invention to provide a laminated solid-state image pickup device in which a connecting member for transporting carriers can be manufactured with a low defect density, and a method for manufacturing the device.

According to one aspect, the present invention, which achieves these objectives, relates to a laminated solid-state image pickup device comprising a semiconductor circuit substrate, comprising accumulating portions for accumulating electric signals, and reading means for reading the electric signals, an insulating layer formed on the semiconductor circuit substrate except at at least a part of the accumulating portions, connecting members formed in contact with the accumulating portions, and a photoconductive film laminated on the insulating layer and the connecting members. The photoconductive film comprises a non-crystalline semiconductor configured by laminating a carrier multiplication layer, a light absorbing layer, a charge injection inhibiting layer of a second conduction type. Each of the connecting members comprises a first semiconductor region of a first conduction type, instrinsic or having a low impurity density, surrounded by a second semiconductor region of the second conduction type.

According to another aspect, the present invention relates to a laminated solid-state image pickup device comprising a semiconductor circuit substrate, comprising accumulating portions for accumulating electric signals, and reading means for reading the electric signals, an insulating layer formed on the semiconductor circuit substrate except at at least a part of the accumulating portions, connecting members formed in contact with the accumulating portions, and a photoconductive film laminated on the insulating layer and the connecting members. The photoconductive film comprises a non-crystalline semiconductor configured by laminating a carrier multiplication layer, a light absorbing layer, a charge injection inhibiting layer of a second conduction type. Each of the connecting members comprises a first semiconductor region of a first conduction type, instrinsic or having a low impurity density, surrounded by a conductive material.

According to still another aspect, the present invention relates to a method for manufacturing a laminated solid-state image pickup device, comprising the steps of forming a first semiconductor region of a first conduction type, instrinsic or having a low impurity density, on accumulating portions, for accumulating electric signals, in a semiconductor circuit substrate, comprising the accumulating portions and at least a part of reading means for reading the electric signals, forming a second semiconductor region of a second conduction type around the first semiconductor region, and forming a photoconductive film, comprising a carrier multiplication layer, a light absorbing layer and a charge injection inhibiting layer, on the first semiconductor region and the second semiconductor region.

According to yet another aspect, the present invention relates to a method for manufacturing a laminated solid-state image pickup device, comprising the steps of forming a first semiconductor region of a first conduction type, instrinsic or having a low impurity density, on accumulating portions, for accumulating electric signals, in a semiconductor circuit substrate, comprising the accumulating portions, for accumulating electric signals, on a semiconductor circuit substrate, comprising the accumulating portions and at least a part of reading means for reading the electric signals, forming a conductive material around the first semiconductor region, and forming a photoconductive film, comprising a carrier multiplication layer, a light absorbing layer and a charge injection inhibiting layer, on the first semiconductor region and the conductive material.

The foregoing and other objects, advantages and features of the present invention will become more apparent from the following detailed description of the preferred embodiments taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic cross-sectional view illustrating a conventional laminated solid-state image pickup device;

FIG. 2 is a schematic cross-secional view illustrating a conventional laminated solid-state image pickup device in which capacitive residual images are improved;

FIG. 3 is a schematic cross-sectional view illustrating the structure of a laminated solid-state image pickup device according to a preferred embodiment of the present invention;

FIG. 4(a) is a schematic diagram illustrating the energy band of a photoconductive film of the laminated solid-state image pickup device shown in FIG. 3 when no bias voltage is applied;

FIG. 4(b) is a schematic diagram illustrating the energy band of the photoconductive film shown in FIG. 4(a) when a reverse bias voltage is applied;

FIGS. 5(a) through 5(g) are diagrams illustrating the processes of a method for manufacturing the laminated solid-state image pickup device shown in FIG. 3 according to another embodiment of the present invention;

FIG. 6 is a schematic cross-sectional view illustrating the structure of a laminated solid-state image pickup device according to still another embodiment of the present invention;

FIGS. 7(a) through 7(h) are diagrams illustrating the processes of a method for manufacturing the laminated solid-state image pickup device shown in FIG. 6 according to yet another embodiment of the present invention;

FIGS. 8 through 10 are schematic cross-sectional views illustrating laminated solid-state image pickup devices according to still another embodiments of the present invention;

FIG. 11 is a diagram illustrating an equivalent circuit for one pixel of the laminated solid-state image pickup device shown in FIG. 10;

FIG. 12 is a diagram illustrating equivalent circuitry of the laminated solid-state image pickup device shown in FIG. 10; and

FIGS. 13 through 15 are schematic cross-sectional views illustrating laminated solid-state image pickup devices according to still another embodiments of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A description will now be provided of laminated solid-state image pickup devices and methods for manufactuing the devices according to preferred embodiments of the present invention.

In the present invention, a connecting member for connecting a semiconductor substrate to a photoconductive film comprises a first semiconductor region, intrinsic or having an impurity for providing a first conduction type, surrounded by a second semiconductor region, having an impurity for providing a second conduction type, or a conductive material.

The connecting member is provided by forming the second semiconductor region or the conductive material after forming the first semiconductor region. It is desirable to fix the second semiconductor region or the conductive material of the connecting member to a desired potential.

It is not always necessary to provide the second semiconductor region or the conductive material around the first semiconductor region without being interrupted. A part of the second semiconductor region or the conductive material may be interrupted, provided that the functions and effects which will be described later are obtained.

A laminated solid-state image pickup device according to a preferred embodiment of the present invention will now be described together with the functions thereof.

FIG. 3 is a schematic cross-sectional view illustrating the structure of the laminated solid-state image pickup device of the embodiment.

In FIG. 3, there are shown a semiconductor substrate 601, a signal charge accumulating portion (accumulating capacitance) 602, and a circuit formation region portion, comprising a signal reading circuit and the like. Although a CCD is illustrated in FIG. 3, an MOS transistor, an SIT (static induction transistor), a bipolar transistor, or the like may be used. There are also shown an insulating film 604, and a connecting member 605. A photoconductive layer 600 comprises a multiplication layer 607, a light absorbing layer 608 and a charge injection inhibiting layer 609 laminated in this sequence.

That is, FIG. 3 illustrates the laminated solid-state image pickup device obtained by laminating the photoconductive layer, having the multiplication layer, on the semiconductor circuit substrate.

One end of the connecting member 605 is connected to the signal charge accumulating portion 602, and the other end is connected to the multiplication layer 607. The connecting member 605 comprises a carrier transport layer (a first semiconductor region) 605-1, comprising a semiconductor region that includes a very small amount of impurity capable of controlling the conduction type of the semiconductor to intrinsic or a first conduction type, or that includes an impurity capable of controlling the conduction type of the semiconductor to the first conduction type more than an impurity capable of controlling the conduction type of the semiconductor to a second conduction type (which is a conduction type inverse to the first conduction type), and a barrier layer 605-2, comprising a second semiconductor region that includes an impurity capable of controlling the conduction type of the semiconductor to the second conduction type, or that includes an impurity capable of controlling the conduction type of the semiconductor to the second conduction type more than an impurity capable of controlling the conduction type of the semiconductor to the first conduction type, around the circumferential side of the carrier transport layer 605-1. The density of the impurity included in the first semiconductor region is preferably equal to or less than 10.sup.17 (cm.sup.-3), and more preferably, equal to or less than 10.sup.16 (cm.sup.-3).

From the viewpoint of being completely depleted, the carrier transport layer 605-1 preferably comprises an intrinsic semiconductor or a semiconductor having a low impurity density close to an intrinsic semiconductor. The impurity density in the carrier transport layer 605-1 may be constant or continuously change.

Although in FIG. 3 the barrier layer 605-2 is connected to a channel stopper 606, the barrier layer 605-2 is not necessarily connected to the channel stopper 606. However, it is preferred that the potential of the barrier layer 605-2 is fixed.

The multiplication layer 807 connected to the connecting member 605 multiplies photocarriers generated in the light absorbing layer 608, and includes at least one step-back structure (a stepwise transition portion of the energy band formed when semiconductor layers, whose band gap is continuously changed from a narrow side to a wide side, are superposed). Ionization of electrons is accelerated utilizing this structure. The charge injection prohibiting layer 609 is provided in contact with a surface of the light absorbing layer 608 opposite to a surface contacting the multiplication layer 607. The charge injection inhibiting layer (blocking layer) 609 does not function as a barrier in the running direction of carriers, which provide a signal, taken from the light absorbing layer 608 or the multiplication layer 607, and is in ohmic contact with a transparent conductive layer 610, but functions as a barrier for the running of dark-current carriers in a direction reverse to the running direction of the above-described carriers.

Next, the schematic energy band of the photoconductive film 600 will be described with reference to FIGS. 4(a) and 4(b).

FIG. 4(a) is a diagram illustrating the schematic energy band of the photoconductive film 600 when no bias voltage is applied, and FIG. 4(b) is a diagram illustrating the schematic energy band of the photoconductive film 600 when a reverse bias voltage is applied.

As shown in FIG. 4(a), when no bias voltage is applied, the energy band of the photoconductive film 600 has a narrow band gap of Eg2 at the side of the light absorbing layer 608 having a band gap of Eg1. A plurality of (five in the case of FIG. 4(a)) laminated step-back-structure layers 611, in each of which the band gap increases from Eg2 to Eg3, are laminated, so that, as described above, a barrier for inhibiting the movement of carriers in a direction opposite to the side of the multiplication layer 607 contacting the light absorbing layer 608 is provided.

The thickness of the step-back-structure layer 611 is determined so as to cause carriers to run without being recombined. The thickness is preferably at least 50 .ANG. and equal to or less than 1 .mu.m, and more preferably, at least 200 .ANG. and equal to or less than 1000 .ANG..

FIG. 4(b) illustrates the schematic energy band of the photoconductive film 600 when a reverse bias voltage is applied to the photoconductive film 600 having the energy-band structure shown in FIG. 4(a).

That is, the light absorbing layer 608 and the multiplication layer 607 are inclined by the function of the electric field. Since adjacent layers of the step-back-structure layers 611 of the multiplication layer 607 are connected at portions having different band gaps (i.e., Eg2 and Eg3), a step (.DELTA.Ec) corresponding to the difference between the band gaps is formed. If the value .DELTA.Ec is greater than the ionization energy, electrons are ionized to generate electron-hole pairs, whereby a multiplication function is provided.

The light absorbing layer 608 is provided closer to incident light than the multiplication layer 607. A non-single-crystalline semiconductor material, for example, an amorphous semiconductor material, such as a-Si (H, X), a-SiGe (H, X), a-SiC (H, X), a-SiGeC (H, X) or the like, a microcrystalline semiconductor material, such as .mu.c (microcrystalline)-Si (H, X), .mu.c-SiGe (H, X), .mu.c-SiC (H, X) or the like, or a polycrystalline semiconductor material, such as poly-Si, poly-SiGe, poly-SiC or the like, can be used for the light-absorbing layer 608.

In order to provide sufficient sensitivity for visible light, the band gap Eg1 of the light absorbing layer 608 is preferably at least 1.1 eV and equal to or less than 1.8 eV, and more preferably, at least 1.2 eV and equal to or less than 1.8 eV.

In order to provide sensitivity also for infrared light, the band gap Eg1 is preferably at least 0.6 eV and equal to or less than 1.8 eV, and more preferably, at least 0.8 eV and equal to or less than 1.2 eV.

In order to provide sensitivity also for ultraviolet light, the band bap Eg1 is preferably at least 1.1 eV and equal to or less than 3.2 eV, and more preferably, at least 1.2 eV and equal to or less than 3.0 eV.

In order to provide high sensitivity for light having a desired wavelength and to efficiently operate within a wider range, the band gap Eg1 may not be uniform over the entire layer, but may be nonuniformly changed.

It is desirable that the thickness of the light absorbing layer 608 is enough for absorbing the wavelength of light to be subjected to photoelectric conversion.

In the present invention, a microcrystalline material indicates a material in which fine crystals having diameters of at least 30 .ANG. and equal to or less than 500 .ANG. are dispersed in an amorphous material.

The multiplication layer 607 is provided behind the light absorbing layer 608 as seen from the light incident side. When photocarriers generated in the light absorbing layer 608 are transported, the number of carriers are multiplied due to an avalanche effect.

The multiplication layer 607 has regions where carriers are drifted and regions where carriers are inonized. The multiplication layer 607 may comprise a material having a large dielectric constant and a material having a small dielectric constant which are alternately arranged. For example, layers having a large dielectric constant and layers having a small dielectric constant may be formed by changing the composition ratio of elements constituting the material. Alternatively, a region having a large dielectric constant and a region having a small dielectric constant may be formed within a single layer.

More specifically, as in the case of the above-described light absorbing layer 608, a non-single-crystalline material, for example, an amorphous material, such as a-Si (H, X), a-SiGe (H, X), a-SiC (H, X), a-SiGeC (H, X) or the like, a microcrystalline material, such as .mu.c-Si (H, X), .mu.c-SiGe (H, X), .mu.c-SiC (H, X) or the like, or a polycrystalline material, such as poly-Si, poly-SiGe, poly-SiC or the like, can be used for the multiplication layer 607.

The charge injection inhibiting layer 609 is provided in front of the light absorbing layer 608 as seen from the light incident side. The charge injection inhibiting layer 609 may comprise the same material as the light absorbing layer 608 or the multiplication layer 607, to which an impurity capable of controlling the conductivity is added. The thickness of the charge injection inhibiting layer 609 is preferably at least 50 .ANG. and equal to or less than 2000 .ANG., and more preferably, at least 100 .ANG. and equal to or less than 300 .ANG..

The amount of the impurity added to the charge injection inhibiting layer 609 is determined so as to provide the charge injection inhibiting layer 609 with ohmic contact with the transparent conductive layer 610 and the above-described capability to block carrier injection. The conductivity of the charge injection inhibiting laye 609 is preferably at least 10.sup.-4 S/cm, and more preferably, at least 10.sup.-3 S/cm.

As for the material capable of controlling the conductivity, in the case of an amorphous-silicon-system material, an element which belongs to the group III of the periodic table is selected when obtaining a p-type material, and an element which belongs to the group V of the periodic table is selected when obtaining an n-type material.

More specifically, while B (boron), Al (alminum), Ga (gallium), In (indium), Tl (thallium) and the like can be cited as elements that belong to the group III of the periodic table, B and Ga are preferred. Similarly, while P (phosphor), As (arsenic), Sb (antimony), Bi (bismuth) and the like can be cited as elements that belong to the group V of the periodic table, P and Sb are preferred.

Oxigen (O) and nitrogen (N) may be added to each layer constituting the photoconductive layer 600 whenever necessary.

The charge injection inhibiting layer 609 may be made of a metal which is in Schottky contact with the adjacent semiconductor layer. Although in the present embodiment a case in which the multiplication layer 607 comprises five step-back-structure layers is illustrated, the present invention is not limited to such a case, but the multiplication layer 607 may comprises a single layer or at least two layers.

As described above, by forming the photoconductive film 600 by a non-single-crystalline semiconductor material, the film can be formed at a low temperature (for example, 200.degree.-300.degree. C.) using plasma CVD or the like, and the band gap can be easily controlled by changing the composition ratio