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Description  |
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FIELD OF THE INVENTION
The present invention relates to a semiconductor device having thin-film
transistors (TFTs) formed on an insulating substrate made of glass or the
like and also to a method of fabricating such a semiconductor device.
BACKGROUND OF THE INVENTION
Known semiconductor devices having TFTs on an insulating substrate made of
glass or the like include active-matrix liquid-crystal displays and image
sensors which use such TFTs to activate pixels.
Generally, TFTs used in these devices are made of a silicon semiconductor
in the form of a thin film. Silicon semi-conductors in the form of a thin
film are roughly classified into amorphous silicon semiconductors (a-Si)
and crystalline silicon semiconductors. Amorphous silicon semiconductors
are fabricated at low temperatures. In addition, they are relatively easy
to manufacture by chemical vapor deposition. Furthermore, they can be
easily mass-produced. Therefore, amorphous silicon semiconductors have
enjoyed the widest acceptance. However, their physical properties such as
conductivity are inferior to those of crystalline silicon semiconductors.
In order to obtain higher-speed characteristics from amorphous silicon
semiconductors, a method of fabricating TFTs consisting of a crystalline
silicon semiconductor must be established and has been keenly sought for.
It is known that crystalline silicon semiconductors include polysilicon,
silicon crystallites, amorphous silicon containing crystalline components,
and semi-amorphous silicon that is midway in nature between crystalline
state and amorphous state.
Known methods of obtaining these crystalline thin-film silicon
semiconductors include:
(1) During fabrication, a crystalline film is directly created.
(2) An amorphous semiconductor film is once formed. Then, the film is
irradiated with laser light so that the energy of the laser light imparts
crystallinity to the film.
(3) An amorphous semiconductor film is once formed. Thermal energy is
applied to the film to crystallize it.
Where the method (1) above is utilized, it is technically difficult to form
a semiconductor film having good physical properties over the whole
surface uniformly. Also, the film is formed at a high temperature of over
600.degree. C. and so cheap glass substrates cannot be used. Hence, this
method presents problems regarding costs.
In the method (2), an excimer laser is used most commonly today. If this
excimer laser is employed, the laser light illuminates only a small area
and hence the throughput is low. Furthermore, the stability of the laser
is not stable enough to uniformly process the whole surface of a
large-area substrate. Therefore, we feel that this method is a technique
of the next generation.
The method (3) above can process substrates of larger areas compared with
the methods (1) and (2). However, a high temperature exceeding 600.degree.
C. is also necessary. It is necessary to lower the heating temperature
where cheap glass substrates are used. Especially, liquid crystal displays
having larger areas have tended to be manufactured today. With this trend,
larger glass substrates have to be employed. Where larger glass substrates
are used in this way, shrinkage and stress produced during a heating step
that is essential for semiconductor fabrication deteriorate the accuracies
of mask alignment and other steps. This presents serious problems.
Especially, in the case of Corning 7059 which is most commonly used today,
the strain point is 593.degree. C. Therefore, if the prior art
heating-and-crystallization step is effected, a large distortion is
induced. Besides the problem of temperature, the heating time, i.e., the
time required for crystallization, poses problems. In particular, the
heating time necessary for crystallization is as long as tens of hours or
longer in the present process. Therefore, it is necessary to shorten the
heating time.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide means for solving the
foregoing problems.
It is a more specific object of the invention to provide a method of
fabricating a thin film of crystalline silicon semiconductor by forming a
thin film of amorphous silicon and heating this film at a lower
temperature and in a shorter time than heretofore to crystallize it.
Of course, a crystalline silicon semiconductor fabricated by the
manufacturing process according to the invention has physical properties
comparable or superior to the physical properties of crystalline silicon
semiconductor devices fabricated by the prior art techniques and can be
used in active layer regions of TFTs.
We formed amorphous silicon semiconductor films as described above by CVD
processes and sputtering processes. These films were heated to crystallize
them. We conducted experiments on this method of heating amorphous silicon
semiconductor films and discussed the method as follows.
As an experiment, an amorphous silicon film was formed on a glass
substrate. This film was crystallized by heating. We discussed the
mechanism by which the film was heated and crystallized. Crystals began to
grow at the interface between the glass substrate and the amorphous
silicon. We observed that where a given film thickness was exceeded, the
crystals grew like columns vertical to the substrate surface.
We understand the above-described phenomenon as follows. Crystal nuclei, or
seed crystals, exist at the interface between the glass substrate and the
amorphous silicon film, and crystals grow from these nuclei. We consider
that these crystal nuclei are trace amounts of impurity metal elements
existing on the surface of the substrate and the crystalline component of
the glass surface. It is considered that crystalline component of silicon
oxide (known as crystallized glass) is present on the surface of the glass
surface.
Accordingly, we have thought that the crystallization temperature might be
lowered by introducing crystal nuclei more positively. To confirm the
effects of this temperature drop, we conducted an experiment. That is, a
trace amount of other metal was deposited on a substrate. A thin film of
amorphous silicon was formed on the metal layer. Then, the amorphous
silicon was heated and crystallized. Where some metals are deposited on
the substrate, crystallization temperature drop was confirmed. We imagined
that crystals were growing from crystal nuclei of foreign substances. We
further investigated the mechanism on plural impurity metals which
permitted temperature decreases.
A crystallization process can be classified into two phases, i.e., creation
of nuclei at the initial stage and crystal growth from the nuclei. The
speed of the creation of nuclei at the initial stage can be known by
measuring the time taken until microscopic dot-like crystals are created
at a constant temperature. Where any of the above-described impurity
metals was deposited as a thin film, the time was shortened. This
demonstrates that introduction of crystal nuclei lowers the
crystallization temperature. We discovered an unforeseen fact.
Specifically, the growth of crystal grains subsequent to nucleation was
investigated while varying the heating time. Where some metal was
deposited as a film and then a thin film of amorphous silicon formed on
the metal film was crystallized, crystals grew at an amazing rate after
the nucleation.
The mechanism of this phenomenon will be described in greater detail later.
In any case, we have discovered that if a trace amount of some metal is
deposited as a film, a thin film of amorphous silicon is formed on the
metal film, and then the amorphous silicon film is heated and
crystallized, then sufficient crystallization is caused by the
above-described two effects at a temperature lower than 580.degree. C. in
a time of about 4 hours, which would have never been conceived heretofore.
The material which showed the most conspicuous effects and we have
selected out of impurity metals exhibiting such effects is nickel.
We now give examples of structure, illustrating the effect of nickel. A
substrate made of Corning 7059 was not treated at all. That is, a thin
film consisting of a trace amount of nickel was not formed on the
substrate. A thin film of amorphous silicon was formed on the substrate by
plasma CVD. This thin film was heated in a nitrogen ambient to crystallize
the film. Where the heating temperature was 600.degree. C., the required
heating time was 10 hours or longer. Where a thin film consisting of a
trace amount of nickel was formed on the substrate, similar
crystallization was induced by heating the thin film of amorphous silicon
for about 4 hours. The crystallization was investigated by Raman
spectroscopy. This demonstrates that the nickel produces very great
effects.
As can be understood from the above description, where a thin film of
amorphous silicon is formed on a thin film consisting of a trace amount of
nickel, the crystallization temperature can be lowered. Also, the
crystallization time can be shortened. It is assumed that this process is
applied to fabrication of TFTs. We now describe the process in further
detail.
Methods of implementing the addition of traces of nickel are first
described. In a first method, a thin film is formed out of a trace amount
of nickel on a substrate and then a film of an amorphous silicon is
formed. In a second method, a film of amorphous silicon is first formed
and then a thin film is formed out of a trace amount of nickel on the
amorphous silicon film. Both methods can lower the temperature similarly.
We have found that films can be formed by either sputtering or
evaporation. That is, the process does not depend on the method of forming
the films. Where a trace amount of nickel is deposited as a thin film on a
substrate, a method consisting of forming a thin film of silicon oxide on
a glass substrate of Corning 7059 and forming a thin nickel film out of a
trace amount of nickel on the silicon oxide film produces greater effects
than does a method of directly depositing a trace amount of nickel as a
thin film on the substrate. We consider that the fact that silicon and
nickel are in direct contact with each other is important for the
temperature decrease, and that in the case of Corning 7059, components
other than silicon may impede contact between silicon and nickel or
reaction between them.
One method of adding a trace amount of nickel is to form a thin film in
contact with the top or bottom surface of an amorphous silicon layer. We
have confirmed that similar effects are produced where nickel is added by
ion implantation, and that where the dopant concentration of nickel was in
excess of 1.times.10.sup.15 atoms/cm.sup.3, the temperature was lowered.
Where the dopant concentration was greater than 1.times.10.sup.21
atoms/cm.sup.3, the shape of the peak of the obtained Raman spectrum was
distinctly different from the shape of the peak of the Raman spectrum
obtained from a single substance of silicon. Therefore, we consider that
the usable dopant concentration range is between 1.times.10.sup.15 and
5.times.10.sup.19 atoms/cm.sup.3. Where the thin film is used as the
active layers of TFTs, taking account of the physical properties of the
semiconductor, it is necessary to restrict the dopant concentration to the
range from 1.times.10.sup.15 to 1.times.10.sup.19 atoms/cm.sup.3. The
growth of crystals to which a trace amount of nickel is added and the
features of the crystal morphology are described next. Also, the
crystallizing mechanism estimated from these features is described.
Where nickel is not added, nuclei are created at random from crystal nuclei
existing at the interface with the substrate. Also, crystals grow at
random from the nuclei. It has been reported that crystals relatively well
oriented in a (110) or (111) direction are obtained, depending on the
method of fabrication. Of course, a substantially uniform crystal growth
is observed over the whole thin film.
In order to confirm this mechanism, we made an analysis, using a
differential scanning calorimeter (DSC). A thin film of amorphous silicon
was formed on a substrate by plasma-assisted chemical vapor deposition
(PCVD). The thin film was loaded into a container together with the
substrate. The temperature was elevated at a constant rate. A clear
heat-generating peak was observed in the neighborhood of 700.degree. C. Of
course, this temperature was shifted with the temperature elevation rate.
Where the rate was 10.degree. C./min, crystallization started at
700.9.degree. C. Then, measurements were made with three different
temperature elevation rates. The activation energy for crystal growth
after initial nucleation was found by the Ozawa's method. The energy was
about 3.04 eV. The reaction rate formula was compared with the theoretical
curve to determine whether the formula fitted the curve. We have found
that random creation of nuclei and its growth model can account for the
activation energy best. This proves the validity of the theory that seed
crystals are created at random from crystal nuclei existing at the
interface with the substrate and then crystals grow from the nuclei.
Similar measurements were made except that a trace amount of nickel was
added. Where the temperature was elevated at a rate of 10.degree. C./min,
crystallization was started at 619.9.degree. C. The activation energy for
crystal growth found from a series of measurements was approximately 1.87
eV. This numerical value demonstrates that crystal growth is promoted. The
reaction rate formula found by the comparison with the theoretical curve
approximated the one-dimensional interface reaction rate rule model. This
suggests that crystals are grown in a certain direction. The data obtained
from the above-described thermal analysis is listed in Table 1 below. The
activation energy given in this Table 1 was found by measuring the
quantity of heat released from each sample during heating of the sample
and calculating the energy from the quantity of heat by analyzing means
called the Ozawa's method.
TABLE 1
______________________________________
crystallization
activation energy (eV)
percentage
nickel is added nickel is not added
______________________________________
10% 2.04 2.69
30% 1.87 2.90
50% 1.82 3.06
70% 1.81 3.21
90% 1.83 3.34
average 1.87 3.04
______________________________________
The activation energy given in Table 1 above is a parameter indicating the
degree of easiness of crystallization. As the value of the activation
energy is increased, it is more difficult to induce crystallization.
Conversely, as the value is reduced, it is easier to induce
crystallization. It can be seen from Table 1 that the activation energy of
each sample containing nickel drops as crystallization progresses. That
is, as crystallization progresses, crystallization is caused more easily.
In the case of a crystalline silicon film formed by the prior art method
without adding nickel, as crystallization progresses, the activation
energy is increased. This indicates that as crystallization proceeds, it
is more difficult to induce crystallization. Comparison of the average
values of activation energy reveals that the value of the silicon film
crystallized with addition of nickel is about 62% of the value of the
silicon film crystallized without adding nickel. This indicates that an
amorphous silicon film doped with nickel can be easily crystallized.
The morphologies of crystals to which nickel was added were observed with a
transmission electron microscope. The results of the observation show that
a region doped with nickel differs in crystal growth from adjacent
regions. Specifically, a cross section of the nickel-doped region was
observed. Moire fringes or other fringes which seemed to be a lattice
image were substantially vertical to the substrate. We consider that the
added nickel or its compound with silicon forms crystal nuclei which
induced growth of columnar crystals substantially vertical to the
substrate, in the same way as in the case where no nickel is added. In
regions surrounding the nickel-doped region, crystals were observed to
have grown like styli or columns parallel to the substrate.
The morphologies of crystals close to the nickel-doped regions were
observed. First of all it was not expected that regions to which the trace
amount of nickel was not directly added were crystallized. The
concentrations of nickel in the region to which the trace amount of nickel
was added, in lateral crystal growth regions close to the nickel-doped
region, and in remoter amorphous regions were measured by secondary ion
mass spectrometry (SIMS).
At locations considerably remote from the nickel-doped region,
low-temperature crystallization did not take place, and an amorphous
region remained. As shown in FIG. 4, the nickel concentration in the
lateral crystal growth regions was lower than the concentration in the
nickel-doped region. The concentration in the amorphous regions was still
lower by about 1 order of magnitude. That is, nickel atoms were diffused
over a considerably broad region. In particular, the nickel concentration
is high in the region in which nickel has been directly added. The lateral
growth portion (the portion in which the crystal has grown parallel to the
substrate) has a lower nickel concentration than the region in which
nickel has been directly added.
It was observed from the TEM image of a surface close to the nickel-doped
region that the greatest lateral crystals parallel to the substrate grew
as long as hundreds of micrometers from the nickel-doped region, and that
the amount of growth increases with the lapse of time and with elevating
the temperature. As an example, growth of about 20 .mu.m was observed in a
process conducted at 550.degree. C. for 4 hours. It was confirmed that
this crystal growth proceeded in the form of stylus or column, and that
the terminal portion (the front end) of the crystal growth contains nickel
concentratedly. Spacial distribution of Ni was measured by EDX concerning
columnar crystal which is characteristic of lateral growth, and examined
correlation between the distribution and the columnar crystal. EDX
measurement of the front end of Si was carried out. The result is shown in
FIG. 10(A). FIG. 10(B) shows a measurement of a film containing no Ni for
reference, and it can be considered that FIG. 10(B) indicates the lower
limit of detection. Comparison of these two indicates that the front end
contains a large amount of Ni.
The results of the experiments obtained as described above has led us to
consider that crystallization progresses by the mechanism described now.
First, crystal nuclei are created. The activation energy is reduced by the
addition of a trace amount of nickel because the addition of nickel
enables crystallization at lower temperatures. We consider that one reason
is that nickel acts as a foreign substance. Another reason might arise
from the fact that one of nickel-silicon intermetallic compounds has a
lattice constant close to that of crystalline silicon. Every nucleation
occurs almost simultaneously over the whole surface of the nickel-doped
region. As a result, crystals grow while maintaining planes. In this case,
the reaction rate formula is given by a one-dimensional interface reaction
rate rule process. Thus, columnar crystals substantially vertical to the
substrate are obtained. However, completely aligned crystallographic axes
cannot be derived because of the restriction imposed by the film thickness
and because of the effects of stress or the like.
The crystal components parallel to the substrate are more uniform than
components vertical to the substrate. Therefore, column- or stylus-like
crystals grow uniformly laterally around crystal nuclei created in the
nickel-doped region. Of course, it is expected that the reaction rate
formula is given by a one-dimensional interface reaction rate rule
process. Since the activation energy for crystal growth is reduced by the
addition of nickel as described previously, it is expected that the
lateral growth rate is very high and in fact this is true.
The electrical characteristics of the nickel-doped region and of the nearby
lateral growth regions are described next. Of the electrical
characteristics of the nickel-doped region, the conductivity is
approximate to that of a film to which almost no nickel is added. This
film was crystallized at about 600.degree. C. for tens of hours. The
activation energy was found from the temperature-dependence of the
conductivity. Where the nickel concentration was 10.sup.17 to 10.sup.18
atoms/cm.sup.3, any behavior which seems to be contributable to the energy
levels of nickel was not observed. That is, these experimental results
have led us to consider that the nickel-doped region can be used as the
active layers of TFTs if this region has above-described concentration.
The experimental results are shown in FIG. 9. The sample used in the
experiment is prepared as follows. Corning 7059 glass is used for
substrate. SiO.sub.2 base 2000 .ANG., film is formed by sputtering on the
glass. Then an amorphous silicon film is formed with SiH.sub.4 /H.sub.2
mixed gas by CVD, and thereafter a small quantity of Ni is added by plasma
treatment utilizing Ni electrode. The treatment conditions are as follows.
Reaction gas: Ar/H.sub.2 =25/50 sccm
Reaction pressure: 10 Pa
Substrate temperature: 300.degree. C.
RF-power: 20 W
treatment time: 5 min.
Thermal crystallization was carried out at between 450.degree. C. and
700.degree. C. after 1 hour hydrogen extraction at 430.degree. C. The
atmosphere in which crystallization was carried out was nitrogen
atmosphere. Nitrogen flowed in and out. We examined electric
characteristics (conductivity) of crystalline silicon semiconductor by
measuring temperature dependency which was measured on electric current
and voltage by coplanar-type AI electrode which was formed on the silicon
film. Activation energy of FIG. 9 is obtained from the conductivity. It
can be said that the value of activation energy is appropriate as
crystalline silicon semiconductor as far as our experiments are concerned,
and effects on electric characteristics (conductivity) by the energy
levels of Ni are very small at least when measured at around normal
temperature.
On the other hand, the conductivity of the lateral growth portions is
higher than that of the nickel-doped region by at least one order of
magnitude and is comparatively high for a crystalline silicon
semiconductor. Since the direction of flow of electrical current agrees
with the direction of lateral crystal growth, we consider that grain
boundaries to hinder the movement of electrons do not or hardly exist
between the electrodes. This agrees well with the results of the TEM
images. That is, carriers are moved along the grain boundaries of crystals
grown like styli or columns and so the carriers easily move.
We have confirmed that the front ends of crystals grown like styli or
columns have a high nickel concentration similarly to the nickel-doped
region. We estimate from this that where devices such as TFTs are
fabricated, using these heavily doped regions, the operation of the
devices is affected by the nickel. Therefore, neither the starting points
of crystals of the crystalline silicon film grown parallel to the
substrate nor the end points of the crystal growth are used. It is
advantageous to use only the intermediate regions.
Accordingly, in the present invention, as shown in FIG. 1, (A)-(D), an
amorphous silicon film 13 to be crystallized and an overlying silicon
oxide film 14 are patterned into islands. A film 15 containing a trace
amount of an element such as nickel silicide is formed on the islands.
Nickel silicide is formed on the side surfaces 16 of the amorphous silicon
film 13. Crystals are caused to grow from these side surfaces as indicated
by the arrows 17. Devices such as TFTs are fabricated without using
regions 10 and 18 heavily doped with nickel.
That is, neither the starting points of crystals of the crystalline silicon
film grown parallel to the substrate nor the end points, or the front end
portions, of the crystal growth are used. The intermediate portions are
employed, and a crystalline silicon film in which carriers move easily is
used. At the same time, regions lightly doped with nickel are used. More
specifically, regions lightly doped with nickel can be used by removing
(e.g., etching) the regions doped with the metal element for promoting
crystallization and the finally grown portions parallel to the substrate
after the crystallization.
It is important that the novel crystalline silicon film on a substrate be
not a single crystal of silicon. The invention is characterized in that
the film is a crystalline silicon film crystallized in the form of a thin
film and that the direction of the crystal growth is parallel to the
substrate. This film is essentially different from a single crystal of
silicon. Therefore, the novel crystalline silicon film can be referred to
as a non-single crystal crystalline silicon film.
Elements for promoting crystallization in accordance with the present
invention can be selected from the elements belonging to group VIII of the
periodic table, i.e., Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, and Pt. Also,
transition elements Sc, Ti, V, Cr, Mn, Cu, and Zn can be used. Experiments
show that Au and Ag promote crystallization. Ni produces especially
conspicuous effects among the elements described above. We have confirmed
that a silicon film crystallized by the action of Ni is used to fabricate
TFTs and that these TFTs operate successfully.
Metal atoms for promoting crystallization are concentrated at the front
ends of crystals grown parallel to the substrate. Devices are fabricated
in regions located between these front ends and the starting point of
growth to which the metal element has been added. Thus, the carriers can
be moved at a high speed. At the same time, the concentration of metal
elements which are considered to adversely affect movement of the carriers
is reduced. Hence, devices having excellent characteristics are obtained.
In another feature of the invention, a non-single crystal semiconductor
film (e.g. a silicon film) formed on a substrate is crystallized by
heating the film below 600.degree. C. and irradiating the film with
intense light to enhance the crystallinity. At the same time, the film is
made denser.
In a further feature of the invention, a silicon film (e.g. a non-single
crystal silicon film) doped with a metal element such as nickel for
promoting crystallization is heated to crystallize the film. Then, the
film is irradiated with intense light such as infrared light or laser
light (e.g., infrared light having a peak at wavelength 1.3 .mu.m) to heat
and anneal the film. In this way, the crystallinity is improved.
Elements for promoting crystallization in accordance with the present
invention can be selected from the elements belonging to group VIII of the
periodic table, i.e., Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, and Pt. Also,
transition elements Sc, Ti, V, Cr, Mn, Cu, and Zn can be used. Experiments
show that Au and Ag promote crystallization. Ni produces especially
conspicuous effects among the elements described above. We have confirmed
that a silicon film crystallized by the action of Ni is used to fabricate
TFTs and that these TFTs operate successfully.
A thin-film silicon semiconductor crystallized by heating below 600.degree.
C. is irradiated with infrared light or laser light to selectively heat
the silicon film. Also, the crystallinity can be enhanced. At this time,
the infrared light is not readily absorbed by the glass substrate and so
the annealing can be carried out without heating the glass substrate to a
large extent.
Other objects and features of the invention will appear in the course of
the description thereof, which follows.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1(A) to 1(D) are cross-sectional views of TFTs illustrating
successive steps for fabricating the TFTs according to an embodiment of
the invention;
FIGS. 2(A) and 2(B) are cross-sectional views of TFTs illustrating
successive steps for fabricating the TFTs according to another embodiment
of the invention;
FIGS. 3(A) and 3(B) are cross-sectional views of TFTs illustrating
successive steps for fabricating the TFTs according to a further
embodiment of the invention;
FIG. 4 is a graph showing the nickel concentration in a silicon film;
FIGS. 5(A) to 5(D) are cross-sectional views of TFTs illustrating
successive steps for fabricating the TFTs according to a still other
embodiment of the invention; and
FIG. 6 is a schematic diagram of TFTs according to the invention;
FIGS. 7(A) to 7(D) are cross-sectional views of TFTs illustrating
successive steps for fabricating the TFTs according to a yet other
embodiment of the invention;
FIGS. 8(A) to 8(E) are cross-sectional views of TFTs illustrating
'successive steps for fabricating the TFTs according to a yet further
embodiment of the invention;
FIG. 9 shows a relation between the activation energy and the annealing
temperature; and
FIGS. 10(A) and 10(B) show EDX results.
DETAILED DESCRIPTION OF THE INVENTION
EXAMPLE 1
In the present example, a P-channel TFT (PTFT) and an N-channel TFT (NTFT)
both using a crystalline silicon film formed on a glass substrate are
combined complementarily to build a circuit. The structure of the present
example can be applied to switching devices for pixel electrodes of an
active-matrix liquid-crystal display, to a peripheral driver circuit
thereof, to an image sensor, and to an integrated circuit. Furthermore,
devices to which the present example is applied are not restricted to
insulated-gate field-effect transistors. They can be other transistors and
diodes. The invention is applicable to an integrated circuit comprising
these semiconductor devices, resistors, and capacitors.
FIGS. 1, (A)-(D), and 2, (A)-(B), are cross sections of TFTs fabricated
according to the present example, illustrating the process sequence.
First, silicon oxide was sputtered as a 2000 .ANG.-thick bottom film 12 on
a substrate 11 made of Corning 7059. Then, a well-known amorphous silicon
film 13 having a thickness of 500-1500 .ANG. (e.g., 500 .ANG.) was formed
by plasma-assisted CVD (PCVD). Thereafter, a silicon oxide film 14 having
a thickness of 200-2000 .ANG. (e.g., 1000 .ANG.) was formed by sputtering.
The lamination of the amorphous silicon film 13 and the silicon oxide film
14 was photolithographically patterned into islands.
After the step described above, a nickel silicide film 15 having a
thickness of 5-200 .ANG.,, e.g., 100 .ANG.,, was formed by sputtering
techniques. The composition of this nickel silicide film 15 is given by a
chemical formula NiSi.sub.x, where 0.4.ltoreq.x.ltoreq.2.5 (e.g., x=2.0).
It is important that this nickel silicide film be formed on the side
surfaces of the amorphous silicon film. This film may also be formed by
evaporation, CVD, or plasma processing. In this way, the shape shown in
FIG. 1(A)is obtained. Where the metal for promoting crystallization is
other than nickel, the thin film 15 may be formed by sputtering,
evaporation, plasma processing, or CVD using the metal other than nickel.
Then, the laminate was heated at 300.degree.-600.degree. C. (e.g.,
450.degree. C.) for 1 hour to form a nickel silicide region 16, followed
by removal of the nickel silicide film 15. The amorphous silicon film 13
was annealed at 550.degree. C. for 4 hours in a reducing hydrogen ambient
(preferably, the partial pressure of the hydrogen is 0.1 to 1 atm) or in
an inert ambient (at atmospheric pressure). At this time, crystals were
grown parallel to the substrate 11 as indicated by the arrows 17.
The above-described step may be modified as follows. Thermal annealing is
conducted at 550.degree. C. for 4 hours without forming the nickel
silicide. Crystals are grown directly from the side surfaces 16 of the
amorphous silicon film 13. Then, the nickel silicide film 15 is removed.
Where this modified step is adopted, the crystallization is effected
simultaneously with the formation of the nickel silicide 16. In this case,
however, there is the possibility that nickel atoms are diffused during
the thermal annealing.
As a result of the above-described step, the amorphous silicon film was
crystallized. Thus, the crystalline silicon film 13 (FIG. 1(C)) could be
derived. Thereafter, isotropic etching was carried out to etch the side
surfaces 18 of the crystallized silicon film 13 because these portions
were made of nickel silicide and contained nickel at a high concentration
of over 1021 atoms/cm.sup.3. Removing the nickel silicide regions in this
way is very important where devices such as TFTs are fabricated. For
example, after this step, an ion implantation step for forming
source/drain regions, an activation step for activating the source/drain
regions, and other steps are performed. In the above-described step, it is
inevitable that heat is applied to the silicon film 13 and so nickel atoms
might be diffused out of the nickel-rich region in the silicon film.
Especially, where nickel silicide is formed, it is expected that a
considerable amount of nickel is diffused out of this nickel silicide
region. This will affect the operation of the TFTs. Consequently, removing
the nickel silicide region as described above after the crystallization is
useful.
Then, the silicon oxide film 14 was removed, thus obtaining the shape shown
in FIG. 1(C). Crystals were grown from both sides and their front ends
overlapped each other in the center of the crystallized silicon film 13.
Since this central portion is heavily doped with nickel, it is not desired
to use this heavily doped region for the channel formation region of a
TFT.
Then, as shown in FIG. 2(A), a silicon oxide film 201 having a thickness of
1000 .ANG., was formed as a gate-insulating film by sputtering. During
this sputtering step, a target consisting of silicon oxide was used. The
substrate temperature was 200.degree. to 400.degree. C., e.g., 350.degree.
C. The sputtering ambient consisted of oxygen and argon. The ratio of the
amount of the argon to the amount of the oxygen was 0 to 0.5, e.g., less
than 0.1.
Subsequently, an aluminum film having a thickness of 6000 to 8000 .ANG.,
e.g., 6000 .ANG., was formed by sputtering. The film contained 0.1 to 2%
silicon. The aluminum film was patterned to form gate electrodes 19 and
21. The surfaces of the aluminum electrodes were anodized to form oxide
layers 20 and 22 on the surfaces. This anodization was carried out in an
ethylene glycol solution containing 1 to 5% tartaric acid. The thickness
of the obtained oxide layers 20 and 22 was 2000 .ANG.. The thickness of
these oxide layers 20 and 22 determines an offset gate region in a later
ion-doping step. Therefore, the length of the offset gate region can be
determined in the above-described anodization step.
Then, impurity ions were implanted to impart one conductivity type to an
active layer region forming source/drains and a channel. In this ion
implantation step, impurities, i.e., phosphorus and boron, were implanted,
using the gate ,electrode 19, its surrounding oxide layer 20, the gate
electrode 21, and its surrounding oxide layer 22 as a mask. Phosphine
(PH.sub.3) and diborane (B.sub.2 H.sub.6) were used as dopant gases. The
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