This invention has as its object to achieve high-speed data transfer using an asynchronous transfer interface. An encoding program encodes source data not to include byte data of a predetermined value. An arithmetic operation program EX-ORs the predetermined value, encoded data of interest, and immediately preceding output data so that neighboring data do not have identical values in units of bytes, and outputs the result as output data. A communication program sends the output data to a printer (7). In the printer (7), a clock is generated based on a change in received data, and received data is latched and decoded in synchronism with the clock.

A data transfer apparatus includes a computer-side input and output unit for transmitting a data signal which is periodically updated, and a printer-side input and output unit for receiving the data signal transmitted from the computer-side input and output unit and detecting the logic level of the data signal. Particularly, this data transfer apparatus further includes a state transition time measuring circuit, a computer-side CPU, and a printer-side CPU cooperated to transmit a transition test data signal from the computer-side input and output unit in a tuning mode, measure the transition time of the transition test data signal received by the printer-side input and output unit, and adjust transfer parameters which define the transmission rate of the data signal to be transmitted from the computer-side input and output unit and a timing for detecting the logic level of the data signal, on the basis of a result of measurement.

A transmitting device and a receiving device are interconnected through two transmission paths, i.e. a data signal line for transmitting serial data, and a delimiting signal line for transmitting a delimiting signal. The delimiting signal causes the receiving device to recognize breaks between bits when the consecutive bits of the transmitted serial data have the same value. The level of the delimiting signal remains unchanged in the event of a change in the logical value of consecutive bits of the transmit data. The level of the delimiting signal is changed when consecutive bits of the transmit data have the same value. The receiving end, receiving the data signal and delimiting signal, reads as digital data the logical value of each bit in the data signal by regarding a point of time of a level change in either one of the data signal and delimiting signal as a break between bits.

Disclosed are a print control method and a print control apparatus capable of recognizing status information pertaining to a printer, and selecting a time interval at which the transmission of updated status information is to be requested of the printer from among a plurality of preset time intervals, in accordance with the current status information of the printer. This reduces the time lag between a change of status of the printer and the status information of the printer displayed by the print control apparatus, and avoids deterioration of the performance of the print control apparatus and the printer.

An interface apparatus includes a USB interface portion which makes communication with an external first device via a USB cable, a parallel interface portion which makes communication with an external second device via a parallel cable, and a control portion which, after a processing command signal has been received from the first device via the USB interface, when a signal state of the parallel interface portion is detected, and then, it is determined that the second device connected to the parallel interface portion enters a power saving mode, generates a switch signal for switching the current power saving mode to a normal mode to supply the switch signal to the second device via the parallel interface portion, and after it has been detected that the second device has been switched into the normal mode, controls the processing command signal so as to be supplied to the second device via the parallel interface portion.