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Description  |
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BACKGROUND OF THE INVENTION
This invention relates to a predistortion linearizer circuit suitable for
applying a signal to a power amplifier for linearizing a signal outputted
by the amplifier and, more particularly, to a linearizing circuit having a
reduced number of components and reduced physical size advantageous for
satellite communication systems.
High power amplifiers are employed in numerous situations including
satellite communication systems wherein a high power amplifier, such as a
solid state power amplifier or a traveling wave tube amplifier, is
employed to amplify a signal to a sufficient power level for transmission
from the satellite to a ground station. A disadvantageous characteristic
of the high power amplifiers is a changing gain as a function of input
signal level and a changing phase shift as a function of input signal
level. As a result, the requisite high power is obtained at the price of
introduction of amplitude and phase nonlinearities to the signals
transmitted via a satellite communication link. Thus, there is distortion
in the information carrying RF (radio frequency) signal.
To counteract the distortion introduced by the power amplifier, it has been
the practice to employ a predistortion linearizer circuit in the signal
path before the amplifier to introduce a distortion to the signal, in the
form of both an amplitude and a phase nonlinearity, which is the inverse
of the amplifier distortion, thereby to cancel the amplifier distortion
and provide a linear output signal. Most predistortion linearizer circuits
described in the microwave circuit literature make use of power combing
hybrids in conjunction with nonlinear circuits to realize either a
reflective or transmission predistortion linearizer. These circuits are
typically rather large due to their complexity. Some circuits are more
compact and employ an .active elements such as a gallium-arsenide
field-effect transistor (GaAs FET) in a common-gate or common-source
configuration. Examples of such a circuit are provided in U.S. Pat. Nos.
5,038,113 (General Electric) and 5,138,275 (Siemens).
A problem arises in that the foregoing predistortion linearizer circuits
are more complex and costly than is desired, and may not allow for
independent control of amplitude and phase nonlinearities. The complexity
is due in part to the need for a bias circuit to supply the requisite
operating bias current and voltage to the transistor, and to the use of
relatively complex additional circuitry to develop the desired
nonlinearities.
SUMMARY OF THE INVENTION
The aforementioned problem is overcome and other advantages are provided by
a predistortion linearizer circuit for linearizing simultaneously the
amplitude and the phase characteristics of a power amplifier by
introducing a selectable amplitude and a selectable phase characteristic
which are complementary to the amplitude and the phase characteristics of
the power amplifier, thereby to cancel the nonlinearities in signal
amplification by the power amplifier. In accordance with the invention,
the predistortion linearizer has a forward diode branch and a reverse
diode branch and a third branch, wherein the three branches are connected
in parallel, and individual ones of the branches may be provided with
respective impedance components, all of the components being passive
electrical elements. The invention provides that, by adjustment of the
input and output signal values of the linearizer, and by adjustment of the
impedance components, the linearizer provides the requisite complementary
set of amplitude and phase characteristics for linearizing the power
amplifier.
BRIEF DESCRIPTION OF THE DRAWING
The aforementioned aspects and other features of the invention are
explained in the following description, taken in connection with the
accompanying drawing wherein:
FIG. 1 is a schematic diagram of an electrical circuit of a predistortion
linearizer in accordance with the invention;
FIG. 2 show a generalized diagram of the predistortion linearizer of FIG.
1;
FIG. 3 is a stylized perspective view of a microstrip embodiment of the
predistortion linearizer of the invention viewed from the top, the
embodiment being in the form of a microwave integrated circuit; and
FIG. 4 is a graph showing amplitude and phase characteristics of the
predistortion linearizer which are varied by selection of component
values.
Identically labeled elements appearing in different ones of the figures
refer to the same element in the different figures.
DETAILED DESCRIPTION
With reference to FIG. 1, a predistortion linearizer 10 is constructed in
accordance with the invention and includes a nonlinear section 12 which is
connected by an attenuator 14 to an input terminal 16 of the linearizer
10, and which is connected by an adjustable gain amplifier 18 to an output
terminal 20 of the linearizer 10. The linearizer 10 is connected between a
source 22 of a microwave signal, or other AC (alternating current) signal,
and a power amplifier 24 which may be a traveling wave tube (TWT) or solid
state power amplifier (SSPA). The source 22 applies an input signal,
typically in a range 2-18 GHz (gigahertz) to the input terminal 16 to be
processed by the linearizer 10, and the processed signal is applied by the
linearizer 10, via the output terminal 20, to the power amplifier 24.
In accordance with a feature of the invention, the nonlinear section 12 is
composed solely of passive electronic components, and includes a pair of
antiparallel diodes 26 and 28 serving as a switching unit 30 connected
between circuit nodes 32 and 34. Also included in the nonlinear section 12
is a main branch 36 having an impedance which, in a preferred embodiment
of the invention, includes a resistor 38 and an inductor 40 connected in
parallel between the nodes 32 and 34. As is well known with respect to the
electrical characteristics of either of the diodes 26 and 28, relatively
little current flows in the forward direction with increasing forward
voltage across the diode until the magnitude of the forward voltage
reaches the breakpoint, whereupon the forward impedance drops
precipitously and a relatively large current is able to flow. The
magnitude of the breakpoint voltage varies in accordance with the type of
construction of the diode and, in the case of a gallium arsenide diode by
way of example, is typically 0.7 volts. Therefore, for relatively low
amplitude of the input signal of the source 22, the input signal being
indicated graphically at 42, the switching unit 30 is essentially an open
circuit. However, for larger values of the input signal 42, the breakpoint
voltage is exceeded, and the switching unit 30 allows current to bypass
the main branch 36.
In the preferred embodiment of the invention, the source 22, the attenuator
14 and the adjustable gain amplifier 18 are operative for conducting
signals along a transmission line having a characteristic impedance of
preferably 50 ohms. In the linearizer 10, the 50 ohm characteristic
impedance is indicated at the node 32 by a resistor 44, and at the node 34
by a resistor 46.
FIG. 2 shows a generalized schematic of the linearizer 10 wherein the
diodes 26 and 28 are shown as separate branches of the circuit, and
wherein each branch has some form of impedance. The impedances of the
three branches are indicated by Z.sub.1, Z.sub.2, and Z.sub.3, wherein the
diode 26 is in series with the impedance Z.sub.1, the main branch 36 has
the impedance Z.sub.3, and the diode 28 is in series with the impedance
Z.sub.2. In the case of the circuit of FIG. 1, Z.sub.1 and Z.sub.2 are
simply short circuits, and Z.sub.3 is the parallel combination of the
resistor 38 and the inductor 40. However, in the general case, one or more
of the impedances Z.sub.1, Z.sub.2, and Z.sub.3 may have nonzero values,
and any one of the impedances may comprised a resistor, of a resistor in
parallel with a capacitor or inductor, or a resistor in series with a
capacitor or an inductor, or even a more complex circuit arrangement such
as an inductor in series with the parallel combination a resistor and
capacitor, by way of example.
FIG. 3 shows a construction of the nonlinear section 12 of FIG. 2 in
microwave microstrip form wherein Z.sub.1 and Z.sub.2 are zero (short
circuit), and wherein Z.sub.3 is a series combination of resistance and
capacitance. The circuit is formed by a substrate 48 of electrically
insulating dielectric material such as a ten mil thick layer of alumina, a
metallic sheet serving as a ground plane 50 on a bottom side of the
substrate 48, and an array of microstrip conductors on a top face 52 of
the substrate 48. The array of microstrip conductors .includes a first leg
54 and a second leg 56 connecting respectively with the nodes 32 and 34.
The microstrip conductors and the ground plane may be formed of a metal
such as copper or aluminum, by way of example. At the node 32, the leg 54
branches out into three branches 58A, 58B and 58C. At the node 34, the leg
56 branches out into three branches 60A, 60B and 60C. The diode 26
connects between spaced-apart ends of the branches 58A and 60A, the diode
28 connects between spaced-apart ends of the branches 58C and 60C, and a
gap 62 between the facing ends of the branches 58B and 60B provides for a
capacitor 64. Also included in the branches 58B and 60B are film resistors
66 and 68 connected in series with the capacitor 64. The film resistors 66
and 68 may be fabricated of tantalum nitride, and may each have a value of
100 ohms. The capacitor 64 may have a value of a few picofarads. Actual
values of the resistive and the reactive elements may be found in
accordance with the inventive procedure, as will be described hereinafter.
It is noted that diodes, such as the diodes 26 and 28 have capacitance
which provides for coupling of high frequency signals, such as the signal
42 of the source 22, between the nodes 32 and 34. Such capacitance tends
to reduce the bandwidth of the linearizer 10, and may have to be tuned out
by addition of a series inductor (not shown) within each of the impedances
Z.sub.1 and Z.sub.2. For maximum bandwidth of the linearizer 10 it is
preferred to use diodes such as Schottky diodes having relatively little
capacitance, GaAs Schottky barrier diodes type HP 9101 produced by Hewlett
Packard being employed in a preferred embodiment of the invention.
With respect to the use of the invention, it is noted that high power
amplifiers, such as the amplifier 24, have output power versus input power
transfer characteristics which have linear gain when operated at low power
levels. This is referred to as linear or small signal operation. As the
input power to the amplifier increases, the output power behaves
nonlinearly and does not increase at the same rate as the input power. As
the input power increases, the output power eventually limits at the
amplifier's saturated output power. This decrease in gain as the input
power is increased is referred to as gain compression. As the input power
to the amplifier is increased, not only does the gain experience
nonlinearities, but also the phase shift through the amplifier undergoes
nonlinearities. Depending on the design of the amplifier, the phase shift
can either increase or decrease as the amplifier is driven into gain
compression.
In the operation of the invention, the diodes 26 an 28 act as a dynamic
switch changing from a high impedance to a low impedance as the drive
level is increased. The linearizer 10 provides for a gain expansion which
complements the gain compression of the power amplifier 24 to result in a
linear amplification of the input signal of the source 22. The linearizer
10 also provides for a phase shift which complements the phase shift
introduced by the power amplifier 24 so as to null out the phase shift
introduce by the power amplifier 24. By way of a simple example, the power
amplifier 24 and the adjustable amplifier 18 may have a combined voltage
gain of 10. Maximum desired output voltage is 9 volts. Linear
amplification is obtained up to 7 volts which is ten times the breakpoint
voltage of 0.7 volts. If the power amplifier 24 were linear, it would be
necessary to output only 0.9 volts from the nonlinear section 12 to obtain
the desired 9 volts from the power amplifier 24. However, due to
saturation of the power amplifier 24, it is necessary to output 1.0 volts
from the nonlinear section 12 to obtain the desired 9 volt output from the
power amplifier. The impedance values of Z.sub.1, Z.sub.2 and Z.sub.3 are
set to provide a gain expansion above the breakpoint voltage of 0.1 volt
to raise the output voltage from 0.9 volts to 1.0 volts from the nonlinear
section 12. In a similar fashion, values of capacitance and/or inductance
are chosen to introduce a change in phase shift which occurs for input
signal voltages, at the input node 32, which exceed the breakpoint
voltage, thereby to introduce an increment or a decrement in phase shift
which nulls such phase shift introduced by the power amplifier 24 upon
approach to saturation.
FIGS. 1 and 4 provide an example in the selection of the requisite
impedance. In the case where the resistor 38 has a resistance of 250-
ohms, the graph of FIG. 4 shows the power gain in decibels (vertical scale
at the top portion of the graph) and the phase shift in degrees (vertical
scale at the bottom portion of the graph) outputted by the nonlinear
section 12 of the linearizer 10 as a function of input power in decibels
relative to a milliwatt (horizontal scale of the graph) inputted to the
node 32. The power gain and the phase shift presented by the graph is
portrayed as a function of the inductance of the inductor 40 in
nanohenries (nh). The results for three values of inductance are shown,
namely, 5 nh, 35 nh, and 15 nh. The graphs show that for input power below
-10 dBm, the output power and the output phase shift are constant and
independent of input power, however, the power gain and the phase shift
vary with inductance. For higher values of input power, the gain rises and
tends to level off at approximately -1 dB at an input power of +20 dBm for
all three values of inductance. With respect to the phase shift, both
positive and negative values of phase shift are obtained, however, for
increasing values of input power above -10 dBm, the phase shift decreases
and tends to level off at approximately zero degrees for all three values
of the inductance.
The graph shows the situation for the case wherein Z.sub.1 and Z.sub.2 are
zero. However, by way of example in altering the shape of the gain traces
of the graph, the gain expansion can be reduced by constructing Z.sub.1 as
a resistor in series with the diode 26, and by constructing Z.sub.2 as a
resistor in series with the diode 28. Further adjustment is accomplished
by use of the attenuator 14 to establish the amplitude level of the input
signal 42 which is to correspond to the breakpoint voltage of the diodes
26 and 28. The adjustable amplifier 18 may have an adjustment range of,
for example, -6 dB to +6 dB, and serves to scale the voltage outputted by
the nonlinear section 12 to match the input voltage range of the power
amplifier 24. In order to demonstrate the use of the linearizer 10, the
input voltage 42 is portrayed with an amplitude envelope that rises
linearly with time, then is constant with time, and falls off linearly
with time. This may be characterized as a rising ramp, a constant region,
and falling ramp. The same shape of amplitude envelope with linear ramps,
free of gain compression, is a shown at 70 for the output signal of the
power amplifier 24. Also, the phase shift is constant in the output signal
70 and is free of deviation due to nonlinearities in the power amplifier
24.
It is to be understood that the above described embodiments of the
invention are illustrative only, and that modifications thereof may occur
to those skilled in the art. Accordingly, this invention is not to be
regarded as limited to the embodiments disclosed herein, but is to be
limited only as defined by the appended claims.
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