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System for activating and configuring an input/output board in a computer    
United States Patent5524269   
Link to this pagehttp://www.wikipatents.com/5524269.html
Inventor(s)Hamilton; Bradley W. (Fort Collins, CO); Slattery; John W. (Fort Collins, CO); Monroe; Kerry J. (Fort Collins, CO)
AbstractAn automatically configurable I/O board and associated software avoids any need for jumpers, switches, or other configuration changes upon installation of the board. Utilization of the main computer capability to select addresses and values likely to be available involves an installation or other routine which arrives at a unique parameter through common commands and repetitive execution. Uniqueness of the parameter or address is accomplished by checking for use elsewhere in the system prior to operation of the board. Steps are taken to avoid any inappropriate changes in conflicting I/O boards by activating and disabling components such as the control register on the board through use of a state machine, by using non-destructive commands for initial checks, by tristating unnecessary lines, and by re-initializing registers whenever a conflict is encountered. Additionally no address space is used to activate the board.



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Drawing from US Patent 5524269
System for activating and configuring an input/output board in a computer - US Patent 5524269 Drawing
System for activating and configuring an input/output board in a computer
Inventor     Hamilton; Bradley W. (Fort Collins, CO); Slattery; John W. (Fort Collins, CO); Monroe; Kerry J. (Fort Collins, CO)
Owner/Assignee     Hewlett-Packard Company (Palo Alto, CA)
Patent assignment
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Publication Date     * June 4, 1996
Application Number     08/302,142
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     September 7, 1994
US Classification     710/9 710/8
Int'l Classification     G06F 013/10 G06F 009/00
Examiner     Ray; Gopal C.
Assistant Examiner    
Attorney/Law Firm    
Address
Parent Case     CROSS REFERENCE TO RELATED APPLICATION(s) This is a continuation of application Ser. No. 08/096,196 filed on Jul. 22, 1993, now U.S. Pat. No. 5,367,640 which was a continuation of application Ser. No. 07/932,919 filed on Aug. 20, 1992, now abandoned which in turn was a continuation of application Ser. No. 07/693,358 filed on Apr. 30, 1991, now abandoned.
Priority Data    
USPTO Field of Search     395/275 395/325 395/800 395/425 395/829 395/828 395/830 395/823 370/17 370/93 340/825.07 340/825.52 340/825.06 364/488 364/514 371/11.1 361/397 361/400
Patent Tags     activating configuring input/output board computer
   
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5357621
Cox
711/172
Oct,1994

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Cuenod
710/9
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Babb
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Dixon
710/9
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Kopec, Jr.
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Heath
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 Technical Review Submit all comments and votes
 Claims Submit all comments and votes
 


We claim:

1. A method of automatically configuring an input/output (I/O) board in a computer and having a plurality of components thereon, including a first component, comprising the steps of:

a. connecting an input/output board and a computer;

b. initiating operation of said computer;

c. selecting an initial address for said I/O board;

d. individually activating said first component on said I/O board such that other components are electrically disconnected from said computer and without utilizing address space on said I/O board;

e. assessing if said initial address is unique to said I/O board by checking if said initial address is in use elsewhere;

f. assigning said address to said I/O board upon deciding that said address is unique to said I/O board; and

g. storing said unique address.

2. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 1 wherein said step of connecting said I/O board and said computer comprises the step of establishing a plurality of specific connections and further comprising the step of automatically establishing said plurality of specific connections in an electrically disconnected state after accomplishing said step of connecting said I/O board and said computer.

3. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 2 wherein said I/O board has a state machine and a control register capable of configuring said specific connections and wherein said step of automatically establishing said plurality of specific connections in an electrically disconnected state comprises the step of configuring said state machine to allow said control register to accept a condition so as to tristate said specific connections.

4. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 3 wherein I/O board has data lines and wherein said step of automatically establishing said plurality of specific connections in an electrically disconnected state further comprises the step of tristating said data lines.

5. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 3 wherein I/O board has interrupt lines and wherein said step of automatically establishing said plurality of specific connections in an electrically disconnected state comprises the step of tristating said interrupt lines.

6. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 3 wherein I/O board has DMA lines and wherein said step of automatically establishing said plurality of specific connections in an electrically disconnected state comprises the step of tristating said DMA lines.

7. A method of automatically configuring an input/output (I/O) board in a computer and having a plurality of components thereon, including a first component, comprising the steps of:

a. connecting an input/output board and a computer;

b. initiating operation of said computer;

c. selecting an initial address for said I/O board;

d. individually activating said first component on said I/O board by utilizing a non-destructive communication from said computer to said I/O board;

e. assessing if said initial address is unique to said I/O board by checking if said initial address is in use elsewhere;

f. assigning said address to said I/O board upon deciding that said address is unique to said I/O board; and

g. storing said unique address.

8. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 7 wherein said I/O board has address space and wherein said non-destructive communication uses none of said address space.

9. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 8 wherein said I/O board has address space and wherein said non-destructive communication does not write to said address space.

10. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 7 wherein said step of individually activating comprises the step of issuing a sequence of common commands from said computer.

11. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 10 wherein said step of issuing a sequence of common commands comprises the step of issuing a first I/O read sequence from said computer.

12. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 11 wherein said step of issuing a first I/O read sequence comprises the step of conducting a series of at least four reads.

13. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 11 wherein said step of issuing a first I/O read sequence comprises the step of conducting a series of sixteen reads.

14. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 11 wherein said step of individually activating further comprises the step of utilizing a state machine on said I/O board and wherein said state machine has been configured to react to said sequence.

15. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 14 wherein said step of configuring a state machine on said I/O board comprises the step of establishing interruptible wiring to said state machine.

16. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 14 and further comprising the step of deactivating said I/O board after accomplishing said step of assessing if said initial address is unique to said I/O board.

17. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 16 wherein said step of deactivating said I/O board comprises the step of individually deactivating said I/O board.

18. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 16 wherein said step of deactivating said I/O board comprises the step of globally deactivating said I/O board.

19. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 18 wherein said step of globally deactivating said I/O board comprises the step of issuing a second I/O read sequence from said computer and wherein said first I/O read sequence and said second I/O read sequence have specific orders and wherein said specific orders are one different.

20. A method of automatically configuring an input/output (I/O) board in a computer and having a plurality of components thereon, including a first component comprising the steps of:

a. connecting an input/output board and a computer;

b. individually activating said first component on said I/O board by issuing a first I/O read sequence from said computer;

c. selecting an initial address for said I/O board comprising the steps of:

i) organizing a priority list of number of addresses based upon the probability of each address being available;

ii) choosing an address likely to be available;

d. assessing if said initial address is unique to said I/O board comprising the steps of:

i) issuing a read sequence from said computer;

ii) establishing a first value on a register;

iii) reading said register;

iv) establishing a second value on said register;

v) re-reading said register;

e. assigning said address to said I/O board upon assessing that said address is unique to said I/O board;

f. storing said unique address;

g. confirming that said address is unique; and

h. operating said computer.

21. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 20 wherein said step of confirming that said address is unique to said I/O board comprises the step of selecting an initial confirming address and wherein said initial confirming address is the address that has been stored.

22. A method of automatically configuring an input/output board in a computer and having a plurality of components thereon as described in claim 21 wherein said I/O board has DMA and interrupt channels, and further comprising the step of assigning unique DMA and interrupt channels to said I/O board.

23. An apparatus for configuring an input/output (I/O) board in a computer and having a plurality of components thereon comprising:

a. a computer having a means for assigning an address to said I/O board and other portions;

b. an input/output board having components responsive to signals from said computer;

c. a means for communicating between said I/O board and said other portions of said computer wherein said means for communicating between said I/O board and said computer transmits commands;

d. a means for assessing if said address is unique to said I/O board through operation of said computer to check if said address is in use elsewhere; and

e. a means for avoiding inappropriate responses to said commands.

24. An apparatus for configuring an input/output board in a computer as described in claim 23 wherein said means for avoiding inappropriate responses to said commands comprises said I/O board.

25. An apparatus for configuring an input/output board in a computer as described in claim 23 wherein said means for communicating said computer and said I/O board comprises a plurality of specific connections and wherein said I/O board comprises a means for tristating some of said specific connections.

26. An apparatus for configuring an input/output board in a computer as described in claim 25 wherein said means for communicating comprises data lines and wherein said specific connections which are tristated comprises said data lines.

27. An apparatus for configuring an input/output board in a computer as described in claim 26 wherein said means for communicating comprises DMA lines and wherein said specific connections which are tristated further comprises said DMA lines.

28. An apparatus for configuring an input/output board in a computer as described in claim 27 wherein said means for communicating comprises interrupt lines and wherein said specific connections which are tristated further comprises said interrupt lines.

29. An apparatus for configuring an input/output board in a computer as described in claim 26 wherein said means for communicating comprises interrupt lines and wherein said specific connections which are tristated are said interrupt lines.
 Description Submit all comments and votes
 


BACKGROUND OF THE INVENTION

Generally, this invention relates to the field of controlling input/output boards which are connected to an I/O bus. Specifically, the invention focuses on techniques to configure aspects, such as address space, of input/output boards without needing to physically connect or change jumpers on the card either at physical installation or after a system change.

Assembling computer systems to suit individual needs or desires by adding peripheral devices is often done. When such devices are connected, frequently they connect to the computer through an I/O card. These I/O boards are installed at initial computer manufacture as well as whenever a user adds new capabilities to the computer by plugging them into available slots on the input/output bus of the computer. Unfortunately, the process of adding capability involves more than just "plugging in" the I/O board and running the computer. The user or installer must configure the I/O board so that the computer can recognize it to communicate with it. This can be an involved process. When a standard I/O bus--the type of I/O bus traditionally installed in most computers--is involved, this process can be quite involved.

For a computer to be able to communicate with the I/O board, the computer must not only know what type of board it is, it must be able to selectively locate the I/O board and direct communications only to it. This is referred to as addressing the I/O board. As an example of the difficulties potentially encountered when assembling or changing such computer systems, the address must be assigned so that no other I/O boards have that same address. This problem of address allocation has been known for many years; several different solutions have been proposed, all with limitations overcome by the present invention. Several of these solutions, are discussed herein.

Perhaps the most common solution, and that referred to above is to provide physically changeable circuitry on the I/O board itself. The address or other characteristic is thus personalized by switches or jumpers which the installer must know how to set. The main drawback is that manual intervention is required at installation time which may lead to configuration errors. This can also require more detailed customer documentation and, as a practical matter, often leads the user to enlist professional help.

A second solution in the prior art is to replace the I/O bus. Recently, I/O busses have been developed which can specifically select one of the slots available through a slot select line or other technique. Naturally this has the undesirable consequence of increasing cost and possibly even making slot location an important installation criteria. As an example of such a solution, U.S. Pat. No. 4,755,934 to Inoue discloses a system which selects a board location by a slot select signal generated through the I/O bus and then assigns the board in that slot a specific address. While such a solution can overcome the need for installation decisions, it does not meet the criteria of the present invention of accommodating existing designs.

Another solution is that proposed in U.S. Pat. No. 4,964,038 to Louis. This proposes a system in which all I/O boards connected to the I/O bus utilize specific circuitry capable of generating a random address. If there are as many addresses generated as there are boards connected, it can then be assumed that each board has a unique address; if not, the random generation process is repeated. While this solution does specifically address the ability to be compatible with standard I/O busses, it has drawbacks overcome by the present invention. Among these are both the requirement that all boards to be of that type (again not allowing accommodation of existing systems) and the inherent difficulties of using randomly generated addresses in configurations which usually place some constraints on address possibilities.

One other solution is that proposed by U.S. Pat. No. 4,675,813 to Locke in which the I/O board includes circuitry which specifically recognizes a hardwire-set address and a configurable address register. While this solution can work with a standard I/O bus and with other, traditional I/O boards, it has other limitations. It does require the hardwire-set address to be unique. This can be unacceptable in the present environment in which a manufacturer simply cannot know how each system might be configured. In addition, it also is limited in that only one such I/O board can be placed in any system. Again the present invention overcomes such limits.

While each of the above limitations have been recognized, a solution to such problems, among others, has not been available prior to the present invention. Certainly the long felt need existed and as the present invention shows, the implementing arts and elements had been long available. Those skilled in the art appear to have been led to believe that hardware and other such solutions were the only practical possibility by some of the prior efforts. In addition, the degree to which the common usage preconditions approaches from device, command, and connection perspectives has taught those skilled in the art in a direction away from that taken by the present inventors. Each appear to have taught away from the combination of commercial sensitivity and technical expertise necessary to achieve the present invention. All may have combined to cause the simple fact that those skilled in the art failed to see that the problem could be solved in a relatively simple manner.

II. SUMMARY OF THE INVENTION

The present invention discloses a method and apparatus which can accomplish automatic I/O board configuration even when connected to a standard I/O bus. The technique involves software routines executed by the computer which first acts to activate the I/O board, then to install the. I/O board properly, and then automatically acts to confirm such installation as part of the operation of that I/O board. In use, the routine initially activates some aspects of a specific I/O board. This activation is accomplished in a manner which avoids any use of address space during activation and requires a minimum in terms of specific I/O board circuitry. Once partially activated, the technique selects an initial address or other parameter in a fashion which is likely to result in a unique address. The routine then assesses if this initial address is unique, if not, another address is selected. If the address is unique, the routine assigns the address to that I/O board. The technique can act to disable electrical connections so as to avoid any inappropriate responses. After installation, the technique can also act automatically to confirm proper installation each time the I/O board is operated. Thus it will even overcome address or other conflicts created unwittingly even after the particular board has been installed correctly.

An object of the invention is to provide a device which simplifies installation needs. Naturally it is an object to avoid any need for the installer to have any specialized knowledge or training in order to accomplish installation. Additionally, it is an object to minimize the need for involved installation documentation. It is thus an object to achieve assignment of address or other parameters automatically through operation of the computer. In assigning such parameters, it is an object to accomplish the task efficiently in a manner which prioritizes likely assignments and thus achieves the assignment as quickly as possible.

An important object of the present invention is to minimize any hardware required on the I/O board itself in order to achieve the objects herein stated. Accordingly, the present invention has the object of utilizing computer capabilities with minimal added board capabilities in order to accomplish its functions. An object is thus to avoid use of address space