An electrically operated, directly overwritable, multibit, single-cell memory element. The memory element includes a volume of memory material which defines the single cell memory element. The memory material is characterized by: (1) a large dynamic range of electrical resistance values; and (2) the ability to be set at one of a plurality of resistance values within the dynamic range in response to selected electrical input signals so as to provide the single cell with multibit storage capabilities, and (3) the ability of at least a filamentary portion to be set, by the selected electrical singal to any resistance value in the dynamic range, regardless of the previous resistance value of the material. The memory element also includes a pair of spacedly disposed contacts for supplying the electrical input signal to set the memory material to a selected resistance value within the dynamic range. Each contact includes (1) a thin-film layer, preferably titanium cabonitride or titanium siliconitride, disposed adjacent to the memory material, used as a diffusion barrier to inhibit foreign material from entering the memory material, and (2) a thin-film layer, preferably a Ti--W alloy, disposed remote to the memory material, used to provide a barrier to aluminum electromigration, diffusion and providing an ohmic contact at the aluminum interface.
RELATED APPLICATION INFORMATION
This application is a continuation-in-part of U.S. application Ser. No. 08/423,484 filed Mar. 19, 1995, which is a continuation-in-part of U.S. Application Ser. No. 07/789,234 filed Nov. 7, 1991, now U.S. Pat. No. 5,414,271 which is a continuation-in-part of U.S. Application Ser. No. 07/768,139, filed Sep. 30, 1991, now U.S. Pat. No. 5,335,219, and a continuation-in-part of U.S. Application Ser. No. 07/747,053 filed Aug. 19, 1991, now U.S. Pat. No. 5,296,716, each of which in turn is a continuation-in-part of U.S. Application Ser. No. 07/642,984 filed Jan. 18, 1991, now U.S. Pat. No. 5,166,758.
An electrically operated, directly overwritable, multibit, single-cell chalcogenide memory element with multibit storage capabilities and having at least one contact for supplying electrical input signals to set the memory element to a selected resistance value, the second contact tapering to a peak adjacent to the memory element. In this manner the tapered contact helps define the size and position of a conduction path through the memory element.
A phase-change memory cell may be formed by selectively depositing the lower electrode in the phase-change memory pore. Thereafter, an adhesion-promoting material may be selectively deposited on the selectively deposited lower electrode and the upper surface surrounding the pore. Through the use of selective deposition techniques, the adhesion-promoting material can be positioned where needed and the lower electrode may be defined in a fashion that may reduce shunting current, reduce device current requirements, and increase dynamic range in some embodiments.
A phase changing memory device, and method of making the same, that includes programmable memory material disposed between a pair of electrodes. The programmable memory material includes discrete layers of phase change material, separated by conductive interface layers, that exhibits relatively stable resistivity values over discrete ranges of crystallizing and amorphousizing thermal pulses applied thereto, for multi-bit storage. The memory material and one of the electrodes can be disposed along spacer material surfaces to form an electrical current path that narrows in width as the current path approaches the other electrode, such that electrical current passing through the current path generates heat for heating the memory material disposed between the electrodes.
A multibit phase change memory device structured such that a plurality of individual phase change memory devices are aligned in a plan area or vertically, and a method of driving the same are provided. The multibit phase change memory device includes a phase change material layer having a plurality of contact portions being in contact with a heating electrode, and having a plurality of active regions, each active region forming a unit phase change memory device. The phase change material layer may be composed of one material layer in which the plurality of active regions are aligned in plural arrays. Alternatively, the phase change material layer may be composed of a plurality of phase change material layers in which one or plural active regions are respectively aligned in one array. The plurality of phase change material layers may be disposed in a same level of a plan area, or the plurality of phase change material layers may be respectively disposed on different plan areas in a same vertical line.
A non-volatile memory element includes a first interlayer insulation layer 11 having a first through-hole 11a, a second interlayer insulation layer 12 having a second through-hole 12a formed on the first interlayer insulation layer 11, a bottom electrode 13 provided in the first through-hole 11, recording layer 15 containing phase change material provided in the second through-hole 12, a top electrode 16 provided on the second interlayer insulation layer 12, and a thin-film insulation layer 14 formed between the bottom electrode 13 and the recording layer 15. In accordance with this invention, the diameter D1 of a bottom electrode 13 buried in a first through-hole 11a is smaller than the diameter D2 of a second through-hole 12a, thereby decreasing the thermal capacity of the bottom electrode 13. Therefore, when a pore 14a is formed by dielectric breakdown in a thin-film insulation layer 14 and the vicinity is used as a heating region, the amount of heat escaping to the bottom electrode 13 is decreased, resulting in higher heating efficiency.
