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BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus for coding a video signal in
video communication, video transmission, video storing, and broadcasting
and, more particularly, to a video coding apparatus using motion
compensation predictive coding.
2. Description of the Related Art
A TV telephone, a TV meeting system, an optical disk apparatus, a VTR, a
CATV, and the like require a technique for coding a video signal. As such
a video coding scheme, so-called motion compensation prediction coding is
known. In this scheme, a pixel value of a picture to be coded (to be
referred to as a to-be-coded picture hereinafter) is predicted by using a
pixel value of a coded picture designated by a motion vector, and a
corresponding predictive error and the motion vector are coded.
Assume that such a motion compensation predictive coding scheme is applied
to an interlaced video (field picture) signal. In this case, the scheme is
not suitable for a motion precision higher than an intra-field 1/2 line,
e.g., a higher precision than an intra-frame one line, because there is no
corresponding pixel value in a reference picture.
For this reason, a method of performing motion compensation by
interpolating a pixel value of a corresponding pixel which does not exist
on a reference picture using the pictures of the two adjacent fields has
been proposed (e.g., "Adaptive Line Interpolated Inter-field Motion
Compensation Method", Image Coding Symposium, 1990, (PCSJ90), 8-1). In
this motion compensation method, a to-be-coded picture is coded by using a
reference picture and an optimum motion vector. The reference video signal
is formed by interpolation using a signal, of coded video signals of past
two fields, which is located at a position designated by a motion vector
obtained by a motion vector searching circuit. More specifically, three
field memories are prepared, and a signal obtained by performing
intrafield interpolation using an output from the first field memory is
mixed with an output from the second field memory at a mixing ratio of
km:1-km. The value km varies depending on the motion magnitude detected by
a motion magnitude detection circuit on the basis of out-puts from the
first and third field memories.
According to this conventional technique, an interpolation value is formed
by using the video signals of two adjacent fields in accordance with the
motion magnitude so that an appropriate reference video signal
corresponding to a motion precision higher than an intra-field 1/2 line (a
motion precision higher than an intra-frame 1 line) can be generated for a
field picture, thereby allowing high-precision motion compensation
predictive coding.
In this scheme, however, the motion between two reference pictures must be
detected, as described above, and hence a motion magnitude detection
circuit is required. In addition, in order to perform motion magnitude
detection, the pictures of three adjacent fields must be coded before the
detection. If the pictures of three adjacent fields are not coded before
motion magnitude detection, the detection cannot be performed.
In a conventional video coding apparatus using the above-described motion
compensation predictive coding scheme, when a search for a motion vector
for motion compensation is performed in a forward or backward direction, a
reference picture for searching for the motion vector is limited to one
coded picture in a case that a to-be-coded picture is a non-interlaced
video. For reasons of this, accurate motion compensation cannot be
performed with respect to a video which moves between adjacent pictures in
units of 1/2 pixels.
Of the above-described video coding schemes, a video coding scheme having a
transmission rate of about 1 to 2 Mbps has been developed to be a
standard, which is termed "MPEG1", for a picture storage such as VCRs and
optical disks. This scheme is based on motion compensation inter-frame
prediction and DCT (Discrete Cosine Transform).
A scheme for coding a video having high quality equal to or higher than
quality for TV broadcasting at about 2 to 10 Mbps has been studied for the
same purpose as described above. A coding scheme of MPEG1 is designed to
be amplied to a non-interlaced video as input signals. However, since the
standard TV signal is interlaced video, where the coding scheme MPEG1 is
applied to the interlaced video, a new means suitable for interlaced video
is required. An inter-field/inter-frame adaptive prediction scheme is
known as a coding method of interlaced video. In this scheme, a field
having the same scan phase as that of a coding (to-be-coded) field (an odd
field when an odd field is coded and vice versa), and a field having a
scan phase different from that of the coding (to-be-coded) field and close
in time thereto (e.g., an even field when an odd field is coded and vice
versa) are switched as a prediction signal. In addition, interpolation
prediction has recently been studied, which forms prediction signals by
averaging signals extracted from current and previous fields (e.g., F.
Wang et al., "High-quality coding of the even fields based on the odd
fields of interlaced video sequences", IEEE trans. CS).
When an interlaced video is subjected to a predictive coding using current
and previous fields as in the coding scheme MPEG1, the even and odd fields
suitable for the interlaced video is applied to a prediction. In this
case, since the amount of motion vector information is increased when
motion vectors are sent for the respective fields, means for decreasing
the amount of motion vector information without a decrease in efficiency
is required. That is, it is required to improve the prediction precision
with respect to an interlaced video and decrease the information amount of
predictive error coded outputs. In addition, it is required to minimize an
increase in motion vector information. However, no effective techniques
capable of satisfying such requirements have been proposed yet.
As described above, in the conventional technique, in order to interpolate
between the pixels on a reference picture using two field pictures
adjacent to the reference picture, motion magnitude detection is required
for the reference picture. Therefore, a motion magnitude detection circuit
is required, and the hardware inevitably becomes complicated. In addition,
if three adjacent fields are not coded before motion magnitude detection,
the detection cannot be performed.
Furthermore, according to the conventional technique, since reference
picture is limited to one coded picture in a search for a motion vector,
accurate motion compensation cannot be performed with respect to a video
which moves between pictures in units of 1/2 pixels. Further, if a
prediction signal is formed referring to plural frames, since a large
amount of arithmetic operation is required to search for a motion vector,
the motion vector search time is prolonged or the circuit size of the
hardware is increased.
Moreover, in the conventional technique, the prediction precision with
respect to an interlaced video cannot be effectively improved, and the
amount of motion vector information sent for the respective fields is
undesirably increased.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a video coding
apparatus which predicts one field from the other field within one frame.
It is another object of the present invention to provide a video coding
apparatus which searches for a region adjacent to the partial pictures
which are to be coded from among a plurality of coded frames, and obtains
prediction signals by performing spatial-temporal filtering of the
pictures.
It is another object of the present invention to provide a video coding
apparatus which obtains a prediction signal by limiting the searching
range of motion vectors.
It is another object of the present invention to provide a video coding
apparatus which forms different prediction values in accordance with the
values of motion vectors.
According to the present invention, there is provided a video coding
apparatus comprising:
a memory for storing a coded video signal used for prediction as a
reference video signal;
a motion vector detecting circuit for detecting, using from one field
picture signal read out from the memory, a motion vector regarding the
other field picture signal to be coded, a pair of the one field picture
signal and the other field picture signal forming a frame video signal;
a prediction signal producing circuit for producing a prediction signal
based on a reference video signal designated by the motion vector detected
by the motion vector detecting circuit; and
a coding circuit for coding a difference between the prediction signal and
a video signal corresponding to the other field picture signal to be
coded.
According to the present invention, there is provided a video coding
apparatus comprising:
a memory for storing a coded video signal used as a reference video signal;
a vector detecting circuit for detecting, from plural field picture signals
or plural frame picture signals which are read out from the memory and the
reference picture signals, an optimum motion regarding a picture signal to
be coded;
a prediction signal producing circuit for subjecting a spatial-temporal
filtering to a reference picture signal designated by the optimum motion
vector to produce a prediction signal; and
a coding circuit for coding the picture signal to be coded on the basis of
the prediction signal.
According to the present invention, there is provided a video coding
apparatus comprising:
a memory for storing a coded video signal used as a reference video signal;
a motion vector detecting circuit for detecting, from a picture read out
from the memory, a motion vector regarding the to-be-coded picture signal;
a searching range limiting circuit for limiting a range of the reference
picture which the motion vector detecting means searches for in a motion
vector detection;
a prediction signal producing circuit for producing a prediction signal
based on the reference video signal designated by the motion vector
detected by the motion vector detecting circuit; and
a coding circuit for coding the video signal on the basis of the motion
vector and the prediction signal.
According to the invention there is provided a video coding apparatus
comprising:
a memory for storing a coded video signal used as a reference picture
signal;
a motion vector candidate generating circuit for generating plural motion
vector candidates for designating plural partial pictures of a plurality
of reference pictures read out from the memory;
a prediction signal candidate producing circuit for subjecting a filtering
processing corresponding to a type of each of the motion vector candidates
output from the motion vector candidate generating circuit to each of the
partial pictures to produce a plurality of prediction signal candidates;
a motion vector detecting circuit for selecting an optimum prediction
signal among the prediction signal candidates which is most optimum to the
to-be-coded picture, and outputting the optimum prediction signal and an
optimum motion vector corresponding thereto; and
a coding circuit for coding the to-be-coded picture signal on the basis of
a difference between the to-be-coded picture signal and the optimum
prediction signal and the optimum motion vector.
Additional objects and advantages of the invention will be set forth in the
description which follows, and in part will be obvious from the
description, or may be learned by practice of the invention. The objects
and advantages of the invention may be realized and obtained by means of
the instrumentalities and combinations particularly pointed out in the
appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
The accompanying drawings, which are incorporated in and constitute a part
of the specification, illustrate presently preferred embodiments of the
invention, and together with the general description given above and the
detailed description of the preferred embodiments given below, serve to
explain the principles of the invention.
FIG. 1 is a block diagram of a video coding apparatus in accordance with
the first embodiment of the present invention;
FIGS. 2 to 4 are views each showing the relationship between video signals
of the respective frames according to the first embodiment;
FIG. 5 is a block diagram of a video coding apparatus in accordance with
the second embodiment of the present invention;
FIGS. 6A and 6B are views each showing the relationship between the video
signals of the respective frames according to the second embodiment;
FIG. 7 is a block diagram of a video coding apparatus in accordance with
the third embodiment of the present invention;
FIG. 8 is a block diagram of a video coding apparatus in accordance with
the fourth embodiment of the present invention;
FIG. 9 is a block diagram of a video coding apparatus in accordance with
the fifth embodiment of the present invention;
FIG. 10 is a block diagram of a video decoder;
FIG. 11 is a view showing a motion vector searching operation according to
the present invention;
FIG. 12 is a view showing a motion vector searching operation according to
the present invention;
FIG. 13 is a view showing a motion vector searching operation according to
the present invention;
FIG. 14 is a view showing a motion vector searching operation according to
the present invention;
FIG. 15 is a view showing a motion vector searching operation according to
the present invention;
FIG. 16 is a view showing a motion vector searching operation according to
the present invention;
FIG. 17 is a block diagram showing a video coding apparatus according to
the sixth embodiment of the present invention;
FIG. 18 is a view showing an input picture format in the sixth embodiment;
FIG. 19 is a view showing the hierarchical structure of coding units in the
sixth embodiment;
FIGS. 20A and 20B illustrate the arrangement of a group of pictures and a
coding sequence in the sixth embodiment, respectively;
FIGS. 21A and 21B are views for explaining prediction methods for the
respective pictures in the sixth embodiment;
FIG. 22 is a block diagram showing a video decoding apparatus corresponding
to the video coding apparatus in FIG. 17;
FIG. 23 is a block diagram showing an inter-field/inter-frame adaptive
prediction circuit in FIG. 17;
FIG. 24 is a view showing a telescopic search sequence in the sixth
embodiment;
FIGS. 25A and 25B are views for explaining inter-field/inter-frame adaptive
prediction processing in the sixth embodiment;
FIG. 26 is a view showing a manner of transmitting motion vectors in the
sixth embodiment;
FIGS. 27A and 27B are a detailed example in which the moving vector of a
color signal is obtained from a motion vector in the sixth embodiment;
FIG. 28 is a flow chart showing part of the process of coding and rate
control in the sixth embodiment;
FIG. 29 is a flow chart showing the remaining part of the process of coding
and rate control in the sixth embodiment;
FIG. 30 is a view showing allocation of amounts of bits to N pictures in
the sixth embodiment;
FIG. 31 is a view for explaining a method of determining the ratio between
the amounts of bits allocated to the P1 picture and the B picture in the
sixth embodiment;
FIG. 32 is a view showing a virtual buffer used for intra-picture rate
control in the sixth embodiment;
FIG. 33 is a block diagram showing the overall arrangement of a picture
decoding system according to the present invention;
FIG. 34 is a block diagram showing a variable length code decoder according
to an embodiment of the present invention;
FIG. 35 is a block diagram showing an arrangement of an input data
temporary storage circuit in FIG. 34;
FIG. 36 is a block diagram showing an arrangement of a code length
detection/decoded value transform circuit in FIG. 34;
FIG. 37 is a block diagram showing another arrangement of a code length
detection/decoded value transform circuit;
FIG. 38 is a block diagram showing a video coding apparatus according to
another embodiment of the present invention;
FIG. 39 is a view showing the relationship between to-be-coded pictures and
reference pictures to explain a video coding method according to the
present invention; and
FIG. 40 is a view showing the relationship between to-be-coded pictures and
reference pictures to explain another video coding method according to the
present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
According to an embodiment of the present invention shown in FIG. 1, a
video coding apparatus comprises a coding circuit 14 for coding a video
signal, two field memories 15 and 16 for storing the coded video signals
of past two fields, a motion vector searching circuit 17, an interpolation
circuit 19, and a local decoding circuit 25.
A to-be-coded video signal 11 is coded by the coding circuit 14 by using a
reference video signal 12 output from the interpolation circuit 19 and an
optimum motion vector 13 output from the motion vector searching circuit
17. The reference video signal 12 is formed by the interpolation circuit
19 using a video signal, of the coded video signals of past two fields
stored in the field memories 15 and 16, which is located at a position
designated by a motion vector candidate 18 output from the motion vector
searching circuit 17.
The motion vector searching circuit 17 is constituted by a correlation
arithmetic operation circuit a motion vector candidate generating circuit
21, an optimum vector decision circuit 22, and a switch circuit 23. During
a motion vector searching operation, motion vector candidates 24
sequentially generated by the motion vector candidate generating circuit
21 are input to the field memories 15 and 16 through the switch circuit
23, and a correlation arithmetic operation between the reference video
signal 12 generated by the interpolation circuit 19 and the to-be-coded
video signal 11 is performed by the correlation arithmetic operation
circuit 20 on the basis of these motion vector candidates. The optimum
vector decision circuit 22 stores a motion vector at which the correlation
between the to-be-coded video signal 11 and the reference video signal 12
is maximized, and outputs the optimum motion vector 13 to the coding
circuit 14 and the switch circuit 23 upon completion of the motion vector
searching operation. The to-be-coded video signal 11 is coded by the
coding circuit 14 in accordance with this optimum motion vector 13 and the
optimum reference video signal 12 from the interpolation circuit 19. As a
result, coded data 26 is output from the coding circuit 14.
The local decoding circuit 25 forms a local decoded video signal 27 on the
basis of the optimum reference video signal 12 output from the
interpolation circuit 19 and the coded data 26 output from the coding
circuit 14. The local decoded video signal 27 is input to either the field
memory 15 or the field memory 16 through a switch circuit 28. The output
from the field memory 15 or 16 is input to the interpolation circuit 19
through a switch circuit 29. In this case, the switch circuits 28 and 29
are switched such that two video signals for forming a predetermined
reference picture for a to-be-coded video are input to the interpolation
circuit 19.
The interpolation circuit 19 comprises an intra-field interpolation circuit
30, multipliers 31 and 32, and an adder 33. The interpolation circuit 19
forms the reference video signal 12 by mixing a signal, formed by the
intra-field interpolation circuit 30 using an output signal from the field
memory 15, with an output signal from the field memory 16 at a mixing
ratio of k:1-k.
The motion vector candidate 18 output from the motion vector searching
circuit 17 is also input to the interpolation circuit 19 to control a
parameter k for determining the mixture ratio between output signals from
the field memories 15 and 16. More specifically, if the vertical component
of the motion vector candidate 18 corresponds to intra-field n+1/2 lines
(n is an integer), control is performed to set k=1 so that a corresponding
pixel value stored in the field memory 15 (in this case, it is assumed
that a video close to a to-be-coded video is stored in the field memory
15) is directly output as the reference video signal 12.
If the vertical component of the motion vector candidate 18 corresponds to
intra-field n lines, an interpolation value (.DELTA.) for the video signal
of an adjacent field is formed by using output signals from the field
memories 15 and 16. More specifically, as shown in FIG. 2, an
interpolation value (.DELTA.) 49 serving as a reference video signal for a
pixel value 45 in a to-be-coded video signal 44 is the sum of a value,
obtained by multiplying the average value of pixel values 46 and 47 formed
by intra-field interpolation by k, and a value obtained by multiplying a
pixel value 48 by (1-k). If the absolute value of the vertical component
of the motion vector candidate 18 is larger than a certain threshold
value, it is considered that the motion of the reference picture is also
large. In this case, since it is proper that the interpolation value
(.DELTA.) is interpolated by mainly using a signal adjacent to the
interpolation value (.DELTA.) of the same field stored in the field memory
15, the parameter k is increased. In contrast to this, if the absolute
value of the vertical component of the motion vector candidate 18 is
smaller than the threshold value, it is considered that the motion of the
reference picture is also small. In this case, since it is proper that the
interpolation value (.DELTA.) is interpolated by mainly using a signal
adjacent to the interpolation value (.DELTA.) in the field memory 16, the
parameter k is decreased.
Note that if the to-be-coded picture 44 is adjacent to a reference picture
41, as shown in FIG. 2, the effective use of a signal from the field
memory 16, obtained by decreasing the parameter k to a value close to "0",
as an interpolation value for the reference picture 41 is almost limited
to the case wherein the absolute value of the vertical component of the
motion vector candidate 18 is "0". In contrast to this, when two adjacent
fields (fields 1, 2, 7, and 8 in FIG. 3) are to be coded in advance in the
coding sequence shown in FIG. 3, i.e., at intervals of a plurality fields
(six fields in FIG. 3), and the remaining four fields (fields 3 to 6 in
FIG. 3) are to be subjected to prediction coding for motion compensation
by using the two adjacent coded fields, a to-be-coded picture 53 and a
reference picture 51 may be relatively spaced apart from each other, as
shown in FIG. 4. In such a case, a signal from the field memory 16,
obtained by decreasing the parameter k to a value close to "0", can be
effectively used as an interpolation value for the reference picture 51
even if the absolute value of the vertical component of the motion vector
is not "0".
The second embodiment of the present invention will be described below with
reference to FIG. 5. Since this embodiment is the same as the one shown in
FIG. 1 except for the arrangement of an interpolation circuit 19, a
detailed description thereof will be omitted.
The interpolation circuit 19 is constituted by two interpolators 34 and 35
and a switch circuit 36 for selecting one of outputs from the
interpolators 34 and 35. Each of the interpolators 34 and 35 comprises an
inter-field interpolation circuit 30, multipliers 31 and 32, and an adder
33, similar to the interpolation circuit 19 shown in FIG. 1.
The relationship between a plurality of video signals in the embodiment
shown in FIG. 5 will be described below with reference to FIGS. 6A and 6B.
The first interpolator 34 generates an interpolation value which is
effective when the motion magnitude of a reference picture 61 is large.
That is, as shown in FIG. 6A, when the vertical component of a motion
vector candidate 18 corresponds to intra-field n+1/2 lines (n is an
integer), a corresponding pixel value .smallcircle. stored in a field
memory 15 (in this case, it is assumed that a picture close to a
to-be-coded picture 63 is stored in the field memory 15) is directly
output as a reference video signal (control is performed to set k=1).
When the vertical component of the motion vector candidate 18 corresponds
to intra-field n lines (n is an integer), the first interpolator 34 forms
an interpolation value .DELTA. on the basis of the average value of two
pixel values .smallcircle. of the video signal 61 in the field memory 15
which are adjacent to a pixel .DELTA. to be interpolated.
The second interpolator 35 generates an interpolation value which is
effective when the motion magnitude of the reference picture 61 is small.
That is, as shown in FIG. 6B, when the vertical component of the motion
vector candidate 18 corresponds to intra-field n+1/2 lines (n is an
integer), a corresponding pixel value .smallcircle. stored in the field
memory 15 (in this case, it is assumed that a picture close to the
to-be-coded picture 63 is stored in the field memory 15) is directly
output as a reference video signal (control is performed to set k=1). If,
for example, n=0, a reference video signal corresponding to a to-be-coded
video signal 64 corresponds to a pixel value 65.
In addition, when the vertical component of the motion vector candidate 18
corresponds to intra-field n lines, the second interpolator 35 sets an
adjacent signal .smallcircle. in a field memory 16 as a pixel value
.smallcircle. to be interpolated. If, for example, n=0, an interpolation
value 68 of a reference video signal for the to-be-coded video signal 64
corresponds to a pixel value 66.
If the vertical component of the motion vector candidate 18 corresponds to
intra-field n/2+1/4 lines, an interpolation value .DELTA. is formed on the
basis of the average value of pixel values .smallcircle. from the field
memories 15 and 16 which are adjacent to a pixel .DELTA. to be
interpolated. For example, if n=0, an interpolation value 67 of a
reference video signal for the to-be-coded video signal 64 corresponds to
the average value of the pixel values 65 and 66.
In this manner, the interpolator 35 can generate reference video signals in
units of intra-field 1/4 lines to realize effective motion compensation
for a high-resolution picture having a small motion magnitude.
In this case, the switch circuit 36 selects an output from the interpolator
34 when the absolute value of the vertical component of the motion vector
candidate 18 output from a motion vector searching circuit 17 is larger
than a certain threshold value. When this value is smaller than the
threshold value, the switch circuit 36 selects an output from the
interpolator 35. With this operation, proper reference video signals are
output. According to another switching method, when the absolute value of
the vertical component of the motion vector candidate 18 output from the
motion vector searching circuit 17 is large, an output from the
interpolator 34 is selected, whereas when the value is small, outputs from
both the interpolators 34 and 35 are used as reference video signals, and
a correlation arithmetic operation between the two signals is performed to
select one of the outputs. This method is also effective.
A video coding apparatus according to the third embodiment of the present
invention will be described below.
Referring to FIG. 7, picture data input to an input terminal 001 is
temporarily stored in an input buffer memory 100. The data is then read
out, as partial picture data, from the input buffer memory 100 in units of
partial regions, each constituted by a plurality of pixels, in the order
of to-be-coded pictures. Partial picture data read out from the input
buffer memory 100 is input to a motion vector detection circuit 200. The
motion vector detection circuit 200 obtains a partial picture, from
pictures coded and reproduced in the past, which can efficiently code the
input data, and outputs a motion vector (address data) indicating the
region data and position of the partial picture.
The partial picture data output from the input buffer memory 100 is also
input to a local coding circuit 300 together with the partial picture data
and the motion vector output from the motion vector detection circuit 200.
The local coding circuit 300 codes either the partial picture data output
from the input buffer memory 100 or difference data relative to the
partial picture data designated by the motion vector. In this case, the
coded data corresponding to the difference relative to the region
designated by the motion vector includes data obtained by variable length
coding of the motion vector.
The data coded by the local coding circuit 300 is input to a local decoding
circuit 400 to be decoded together with the partial picture data output
from the motion vector detection circuit 200. With this operation, a
reproduced picture is obtained. In addition, if the data is coded by using
a motion vector, the decoded data is added to the partial picture data
output from the motion vector detection circuit 200 to obtain a reproduced
picture. This reproduced picture data is input to the motion vector
detection circuit 200 and is temporarily stored to code the next input
picture data.
Operations of the motion vector detection circuit 200, the local coding
circuit 300, and the local decoding circuit 400 will be described in
detail below.
In the motion vector detection circuit 200, data input from the input
buffer memory 100 are sequentially written in picture memories (211 to
214), in which picture data unnecessary to search for motion vectors are
stored, under the control of a write control circuit 222. In this manner,
coded picture data stored in the picture memories (211 to 214) are
sequentially read out in units of regions, starting from a picture close
in time to the coded picture, by a read control circuit 221 and a data
switching circuit 231. The data are then input to a difference circuit
241. The difference circuit 241 calculates the differences between the
coded picture data and input data in units of regions.
An estimation circuit 242 sequentially compares the sums of differences in
units of regions to control the searching direction of the read control
circuit 221 in the picture memories. Every time a partial region of a
coded picture which is less different from the input partial picture than
the previously detected partial picture is detected, the estimation
circuit 242 causes a vector register 243 to store address data indicating
this region of the partial picture, thus obtaining a partial region of the
coded picture which is closest to the input partial picture. In this
manner, the address data indicating the partial region of the coded
picture which is least different from the input partial picture stored in
the vector register 243 is input to a read control circuit 223 and a
switch circuit 232. As a result, the reproduced picture of coded data
corresponding to the partial region of the coded picture is read out from
one of reproduced picture memories (215 to 218), and is input to the local
coding circuit 300 together with its address data.
According to this embodiment, in the local coding circuit 300, DCT
(discrete cosine transformation) as one of orthogonal transformation
schemes, quantization, and variable length coding are used as a coding
method for a motion compensation error. In the local coding circuit 300,
partial picture data output from the input buffer memory 100 is input to a
difference circuit 311 so that the difference between the partial picture
data and partial picture data obtained by reproducing coded data output
from the motion vector detection circuit 200 is calculated. A switch
circuit 312 sequentially switches and outputs difference picture data
input from the difference circuit 311 and partial picture data input from
the input buffer memory 100 in accordance with control signals input to a
terminal 002.
A DCT circuit 320 sequentially frequency-converts partial data and
difference picture data sequentially output from the switch circuit 312,
and outputs the resultant data. A quantizer 330 quantizes the
frequency-converted data output from the DCT circuit 320 with a preset
quantization step size, and outputs the resultant data. An entropy coder
340 codes the quantized data together with its quantization step size
information and identification data indicating whether the data is partial
picture data or difference data. In addition, in coding of difference
picture data, the entropy coder 340 performs variable length coding of the
data together with a motion vector corresponding to the partial picture
data output from the vector register 243 by using Huffman codes or the
like in accordance with the respective occurrence probabilities. If this
identification code and the motion vector code are combined to form one
Huffman code, efficient coding can be realized. Furthermore, in this
coding, with regard to picture data obtained by reproducing coded data in
a region designated by a predetermined rule, or input picture data which
differs from fixed data by a predetermined value or less, if the number of
such successive partial pictures is coded by variable length coding, the
coding efficiency is further improved.
An amount-of-bits estimation circuit 351 compares the amount of bits of
coded data, obtained by coding the difference between a partial picture to
be coded and a picture in a region designated by a motion vector, with
that of coded data obtained by directly coding input data by DCT, and
outputs coded data with higher coding efficiency to an output buffer 360
and the local decoding circuit 400.
The output buffer 360 temporarily stores this coded data for adjustment of
the output data rate, and controls a quantization step size used by the
quantizer 330 and a coding table used by the entropy coder 340.
In the local decoding circuit 400, the partial picture data output from the
motion vector detection circuit 200 is temporarily stored in a data memory
441, and the coded data output from the amount-of-bits estimation circuit
351 is input to a variable length decoder 410, so that the motion vector
including the identification code and the quantized data before coding are
decoded. This decoded quantized data is input to an inverse quantizer 420
to be converted (inversely quantized) into a typical value having a
dynamic range before quantization. The converted value is input to an
adder 450. The data inversely quantized by the inverse quantizer 420 is
input to an inverse DCT circuit 430 so that the partial picture or the
difference picture data is reproduced. A gate circuit 442 permits the
passage of the partial picture data output from the data memory 441 if it
is determined on the basis of the identification code decoded by the
variable length decoder 410 that the reproduced data output from the
inverse DCT circuit 430 is difference picture data. Otherwise, the gate
circuit 442 sets the output data to be "0". The gate circuit 442 outputs
the resultant data to the adder 450.
If the picture data subjected to inverse DCT in this manner corresponds to
a coded difference picture, the data is added to the partial picture data
output from the motion vector detection circuit 200. Otherwise, a
reproduced picture is obtained by the adder 450 without using the partial
picture data output from the motion vector detection circuit 200. This
reproduced picture data is input to the motion vector detection circuit
300 to be temporarily stored so as to be used for coding the next input
picture data.
FIG. 8 shows the fourth embodiment of the present invention. This
embodiment is different from the previous embodiment in that a data memory
460 for storing quantized data is used in place of the variable length
decoder 410 included in the decoding circuit 400 shown in FIG. 7. In this
case, data obtained by performing DCT and quantization of difference
picture data based on the difference between the partial picture data
output from an input buffer memory 100 and partia | | |
