TDMA mobile unit frequency synthesizer having power saving mode during transmit and receive slots

Claims

What is claimed is:

1. A frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a switched filter bank comprising a plurality of loop filters each of said loop filters having a unique cutoff frequency;

selector means for selecting one of the loop filters in response to a channel selection signal;

switch means for establishing a connection between the output of said phase comparator and the selected loop filter in response to a close-loop command signal to cause the selected loop filter to develop a voltage according to said phase difference signal and clearing said connection in response to an open-loop command signal, wherein the voltage developed in the selected loop filter is maintained after said connection is cleared and is maintained when another loop filter is selected;

a voltage-controlled oscillator connected to the selected loop filter for generating an output signal at a frequency corresponding to the voltage developed by the selected loop filter;

a frequency divider connected to said voltage-controlled oscillator for producing an output pulse at a submultiple of an output frequency of the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signals; and

control means for causing the mobile unit to scan a different one of the plurality of cell sites during each of a plurality of idle slots and to return to a receive or transmit frequency during the respective receive and transmit slots by providing a series of channel selection signals which alternately select between one of the plurality of loop filters during an idle slot and a loop filter which corresponds to the receive or transmit frequency during the respective receive and transmit slots so that a different one of the plurality of loop filters is selected for each of a plurality of successive idle slots by generating said open-loop command signal during said receive and transmit slots of the TDMA frame, and generating said close-loop command signal, said enable signal and said channel selection signal during the idle slot of the TDMA frame, and for deactivating said reference pulse source during said receive and transmit slots and activating said reference pulse source during said idle slot of the TDMA frame.

2. A frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a loop filter;

means for establishing a connection between the output of said phase comparator and said loop filter in response to a close-loop command signal to cause the selected loop filter to develop a voltage according to said phase difference signal and clearing said connection in response to an open-loop command signal;

a voltage-controlled oscillator connected to the loop filter for generating an output signal at a frequency corresponding to the voltage developed by the loop filter;

a frequency divider connected to said voltage-controlled oscillator for producing an output pulse at a frequency which is a submultiple of the frequency of the output from the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signals;

a phase-lock detector connected to the phase comparator for producing a phase-lock detecting signal when said phase difference indicates that said two input signals are locked in phase;

means for generating a steady-state detect signal indicating that the voltage developed in said loop filter has attained a substantially steady value;

gate means for generating a signal indicating that said phase-lock detect signal and said steady-state detect signal are simultaneously present; and

control means for causing the mobile unit to scan a different one of the plurality of cell sites during each of a plurality of idle slots and to return to a receive or transmit frequency during the respective receive and transmit slots by generating said open-loop command signal during said receive and transmit slots of the TDMA frame, and generating said close-loop command signal and said enable signal and a channel selection signal during the idle slot of the TDMA frame, and deactivating said reference pulse source during said receive and transmit slots and activating said reference pulse source during said idle slot of the TDMA frame, and applying said channel selection signal to one of said reference pulse source and said frequency divider so that the output of said voltage-controlled oscillator is varied according to the channel selection signal and responding to the signal from said gate means after said channel selection signal is generated for determining a transition from said close-loop command signal to said open-loop command signal.

3. A frequency synthesizer as claimed in claim 1 or 2, wherein said control means include means for deactivating said frequency divider and said phase comparator during said transmit/receive slot and activating said frequency divider and said phase comparator during said idle slot.

4. A frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a loop filter;

means for establishing a connection between the output of said phase comparator and said loop filter in response to a close-loop command signal to cause the selected loop filter to develop a voltage according to said phase difference signal and clearing said connection in response to an open-loop command signal;

a voltage-controlled oscillator connected to the loop filter for generating an output signal at a frequency corresponding to the voltage developed by the loop filter:

a frequency divider connected to said voltage-controlled oscillator for producing an output pulse at a frequency which is a submultiple of the frequency of the output from the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signals;

a phase-lock detector connected to the phase comparator for producing a phase-lock detecting signal when said phase difference indicates that said two input signals are locked in phase;

means for generating a steady-state detect signal indicating that the voltage developed in said loop filter has attained a substantially steady value;

gate means for generating a signal indicating that said phase-lock detect signal and said steady-state detect signal are simultaneously present;

control means for generating said open-loop command signal during said receive and transmit slots of the TDMA frame, and generating said close-loop command signal and said enable signal and a channel selection signal during the idle lot of the TDMA frame, and deactivating said reference pulse source during said receive and transmit slots and activating said reference pulse source during said idle slot of the TDMA frame, said control means applying said channel selection signal to one of said reference pulse source and said frequency divider so that the output of said voltage-controlled oscillator is varied according to the channel selection signal and responding to the signal from said gate means after said channel selection signal is generated for determining a transition from said close-loop command signal to said open-loop command signal;

first and second D flip-flops each having a data input port connected to receive said reference pulse and a clock input port, the clock input of the first D flip-flop being responsive to the output of said voltage-controlled oscillator and the clock input of the second D flip-flop being responsive to the enable signal from said control means, said second D flip-flop producing an output for enabling said frequency divider to produce an output thereof; and

first and second coincidence gates each having first and second input ports, the first input ports of said first and second coincidence gates being connected to be responsive to the enable signal from said control means, the second input port of the first coincidence gate being connected to be responsive to an output of said first D flip-flop for generating one of the input signals of said phase comparator, and the second input port of the second coincidence gate being connected to be responsive to the output of said frequency divider for generating the other input signal of said phase comparator.

5. A frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a loop filter connected to the phase comparator to develop a voltage corresponding to said phase difference signal;

a voltage-controlled oscillator connected to the loop filter for generating an output signal at a frequency corresponding to the voltage developed by the loop filter;

a frequency divider connected to said voltage-controlled oscillator for producing an output pulse at a frequency which is a submultiple of the frequency of the output from the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signals;

a delay circuit for delaying the output of said frequency divider for a predetermined interval;

a phase-lock detector connected to the phase comparator for producing a phase-lock detecting signal when said phase difference indicates that said two input signals are locked in phase;

switch means for exclusively connecting the reference pulse of said reference pulse source to said phase alignment circuit in response to a first mode signal applied thereto and exclusively connecting the output of the delay circuit to said phase alignment circuit in response to a second mode signal applied thereto; and

control means for causing the mobile unit to scan a different one of the plurality of cell sites during each of a plurality of idle slots and to return to a receive or transmit frequency during the respective receive and transmit slots by generating said first mode signal, said enable signal and a channel selection signal during the idle slot of a TDMA frame, and generating said second mode signal during said receive and transmit slots of the TDMA frame, and switching said reference pulse source into an inactive state during said receive and transmit slots and into an active state during said idle slot of the TDMA frame, and applying said channel selection signal to said reference pulse source so that the output of said voltage-controlled oscillator is varied according to the channel selection signal and responding to a first phase-lock detect signal generated by said phase-lock detector in the presence of said first mode signal for determining a transition from said finest mode signal to said second mode signal and responding to a second phase-lock detect signal generated by said phase-lock detector in the present of said second mode signal for determining a transition from the active state of the reference pulse source to the inactive stage thereof.

6. A frequency synthesizer as claimed in claim 5, wherein said frequency divider is a divide-by-N frequency divider and said delay circuit comprises means for storing at least N pulses from said divide-by-N frequency divider.

7. A frequency synthesizer of a mobile unit for a time division multiple access (TMDA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a loop filter connected to the phase comparator to develop a voltage corresponding to said phase difference signal;

a voltage-controlled oscillator connected to the loom filter for generating an output signal at a frequency corresponding to the voltage developed by the loop filter;

a frequency divider connected to said voltage-controlled oscillator for producing an output pulse at a frequency which is a submultiple of the frequency of the output from the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signal;

a delay circuit for delaying the output of said frequency divider for a predetermined interval;

a phase-lock detector connected to the phase comparator for producing a phase-lock detecting signal when said phase difference indicates that said two input signals are locked in phase;

switching means for exclusively connecting the reference pulse of said reference pulse source to said phase alignment circuit in response to a first mode signal applied thereto and exclusively connecting the output of the delay circuit to said phase alignment circuit in response to a second mode signal applied thereto;

control means for generating said first mode signal, said enable signal and a channel selection signal during the idle slot of a TDMA frame, and generating said second mode signal during said receive and transmit slots of the TDMA frame, and switching said reference pulse source into an inactive state during said receive and transmit slots and into an active state during said idle slot of the TDMA frame, said control means applying said channel selection signal to said reference pulse source so that the output of said voltage-controlled oscillator is varied according to the channel selection signal and responding to a first phase-lock detect signal generated by said phase-lock detector in the presence of said first mode signal for determining a transition from said first mode signal to said second mode signal and responding to a second phase-lock detect signal generated by said phase-lock detector in the present of said second mode signal for determining a transition from the active state of the reference pulse source to the inactive stage thereof;

first and second D flip-flops each having a data input port connected to receive said reference pulse and a clock input port, the clock input of the first D flip-flop being responsive to the output of said voltage-controlled oscillator and the clock input of the second D flip-flop being responsive to the enable signal from said control means, said second D flip-flop producing an output for enabling said frequency divider to produce an output thereof; and

first and second coincidence gates each having first and second input ports, the first input ports of said first and second coincidence gates being connected to be responsive to the enable signal from said control means, the second input port of the first coincidence gate being connected to be responsive to an output of said first D flip-flop for generating one of the input signals of said phase comparator, and the second input port of the second coincidence gate being connected to be responsive to the output of said frequency divider for generating the other input signal of said phase comparator.

8. A mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a transceiver for establishing a communication with one of said cell sites on assigned receive and transmit slots of the TDMA frame;

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a switched filter bank comprising a plurality of loop filters and means for selecting one of the loop filters in response to a channel selection signal, each of said loop filters having a unique cutoff frequency;

means for establishing a connection between the output of said phase comparator and said switched filter bank in response to a close-loop command signal to cause a voltage to be developed in the selected loop filter according to said phase difference signal and clearing said connection in response to an open-loop command signal;

a voltage-controlled oscillator connected to the selected loop filter for generating an output signal at a frequency corresponding to the voltage developed by the selected loop filter as a local carrier of said transceiver;

a frequency divider connected to said voltage-controlled oscillator for producing an output at a frequency which is a submultiple of the frequency of the output from the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signals;

control means for causing the mobile unit to scan a different one of the plurality of cell sites during each of a plurality of idle slots and to return to a receive or transmit frequency during the respective receive and transmit slots by providing a series of channel selection signals which alternately select between one of the plurality of loop filters during an idle slot and a loop filter which corresponds to the receive or transmit frequency during the respective receive and transmit slots so that a different one of the plurality of loop filters is selected for each of a plurality of successive idle slots by generating said open-loop command signal during said receive and transmit slots of the TDMA frame, and generating said close-loop command signal, said enable and said channel selection signal during the idle slot of the TDMA frame to cause a receive section of the transceiver to be momentarily tuned to the TDMA frame of an adjacent cell site, and deactivating said reference pulse source during said receive and transmit slots and activating said reference pulse source during said idle slot of the TDMA frame; and

a power saving circuit for deactivating a transmit section of the transceiver and activating the receive section of the transceiver at periodic intervals when said mobile unit is in a standby mode, and activating said transmit section during the assigned transmit slot and activating said receive section during the assigned transmit slot and said idle slot when said mobile unit is in a talking mode.

9. A frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a transceiver for establishing communication with one of said cell sites on assigned receive and transmit slots of the TDMA frame;

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a loop filter;

means for establishing a connection between the output of said phase comparator and said loop filter in response to a close-loop command signal to cause the selected loop filter to develop a voltage according to said phase difference signal and clearing said connection in response to an open-loop command signal;

a voltage-controlled oscillator connected to the loop filter for generating an output signal at a frequency corresponding to the voltage developed by the loop filter;

a frequency divider connected to said voltage-controlled oscillator for producing an output pulse at a frequency which is a submultiple of the frequency of the output from the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signals;

a phase-lock detector connected to the phase comparator for producing a phase-lock detecting signal when said phase difference indicates that said two input signals are locked in phase;

means for generating a steady-state detect signal indicating that the voltage developed in said loop filter has attained a substantially steady value;

gate means for generating a signal indicating that said phase-lock detect signal and said steady-state detect signal are simultaneously present;

control means for causing the mobile unit to scan a different one of the plurality of cell sites during each of a plurality of idle slots and to return to a receive or transmit frequency during the respective receive and transmit slots by generating said open-loop command signal during said receive and transmit slots of the TDMA frame, and generating said close-loop command signal and said enable signal and a channel selection signal during the idle slot of the TDMA frame, and deactivating said reference pulse source during said receive and transmit slots and activating said reference pulse source during said idle slot of the TDMA frame, and applying said channel selection signal to one of said reference pulse source and said frequency divider so that the output of said voltage-controlled oscillator is varied according to the channel selection signal to cause a receive station of said transceiver to by momentarily tuned to the TDMA frame of an adjacent cell site, and responding to the signal from said gate means after said channel selection signal is generated for determining a transition from said close-loop command signal to said open-loop command signal; and

a power saving circuit for deactivating a transmit section of the transceiver and activating the receive section of the transceiver at periodic intervals when said mobile unit is in a standby mode, and activating said transmit section during the assigned transmit slot and activating said receive section during the assigned transmit slot and said idle slot when said mobile unit is in a talking mode.

10. A frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having a sequence of receive and transmit slots and at least one idle slot, comprising:

a transceiver for establishing communication with one of said cell sites on assigned receive and transmit slots of the TDMA frame;

a reference pulse source for generating a train of reference pulses;

a phase comparator for generating a phase difference signal indicative of the phase difference between two input signals applied thereto;

a loop filter connected to the phase comparator to develop a voltage corresponding to said phase difference signal;

a voltage-controlled oscillator connected to the loop filter for generating an output signal at a frequency corresponding to the voltage developed by the loop filter;

a frequency divider connected to said voltage-controlled oscillator for producing an output pulse at a frequency which is a submultiple of the frequency of the output from the voltage-controlled oscillator;

a phase alignment circuit for establishing initial phase alignment between an output pulse from said frequency divider and a reference pulse from said reference pulse source in response to an enable signal applied thereto and applying the phase-aligned signals to said phase comparator as said two input signals;

a delay circuit for delaying the output of said frequency divider for a predetermined interval;

a phase-lock detector connected to the phase comparator for producing a phase-lock detecting signal when said phase difference indicates that said two input signals are locked in phase;

switch means for exclusively connecting the reference pulse of said reference pulse source to said phase alignment circuit in response to a first mode signal applied thereto and exclusively connecting the output of the delay circuit to said phase alignment circuit in response to a second mode signal applied thereto; and

control means for causing the mobile unit to scan a different one of the plurality of cell sites during each of a plurality of idle slots and to return to a receive or transmit frequency during the respective receive and transmit slots by generating said first mode signal, said enable signal and a channel selection signal during the idle slot of a TDMA frame, and generating said second mode signal during said receive and transmit slots of the TDMA frame, and switching said reference pulse source into an inactive state during said receive and transmit slots and into an active state during said idle slot of the TDMA frame, and applying said channel selection signal to said reference pulse source so that the output of said voltage-controlled oscillator is varied according to the channel selection signal and responding to a first phase-lock detect signal generated by said phase-lock detector in the presence of said first mode signal for determining a transition from said first mode signal to said second mode signal and responding to a second phase-lock detect signal generated by said phase-lock detector in the present of said second mode signal for determining a transition from the active state of the reference pulse source to the inactive stage thereof; and

a power saving circuit for deactivating a transmit section of the transceiver and activating the receive section of the transceiver at periodic intervals when said mobile unit is in a standby mode, and activating said transmit section during the assigned transmit slot and activating said receive section during the assigned transmit slot and said idle slot when said mobile unit is in a talking mode.

11. In a frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell site stations each being assigned a channel of unique frequency for carrying a TDMA frame having transmit/receive slots and idle slots, the synthesizer comprising a reference pulse source, a phase comparator, a loop filter, a voltage-controlled oscillator connected to the loop filter, switch means for establishing and clearing a connection between the phase comparator and the loop filter, and a variable frequency divider connected to the voltage-controlled oscillator for producing an output at a submultiple of an output frequency of the voltage-controlled oscillator, said phase comparator being responsive to a reference pulse from the reference pulse source and the output of the variable frequency divider for supplying a phase difference signal to the loop filter, a power saving method comprising the steps of:

a) activating said reference pulse source and operating said switch means to establish said connection;

b) operating the frequency divider at a first submultiple of the output frequency of said voltage-controlled oscillator so that a channel is established between the mobile unit and a first cell site station;

c) operating said switch means to clear said connection and deactivating said reference pulse source, and allowing signal to be exchanged between the mobile unit and said first cell site station on a transmit/receive slot of said channel;

d) activating said reference pulse source, operating said switch means to establish said connection and operating the frequency divider at a second submultiple of the output frequency of the voltage-controlled oscillator so that the mobile unit can receive a signal from a second cell site station;

e) receiving a signal from said second cell site station during an idle slot of the channel and detecting power level of the received signal; and

f) repeating the steps (b) to (e).

12. In a frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having transmit/receive slots and idle slots, the frequency synthesizer comprising:

a reference pulse source for generating a reference pulse;

a phase comparator having a first input terminal responsive to said reference pulse, a second input terminal and an output terminal;

a loop filter;

switch means for establishing a connection between the output terminal of said phase comparator and said loop filter;

a voltage-controlled oscillator connected to the loop filter for generating an output signal at a frequency corresponding to a voltage developed by the loop filter;

a frequency divider connected to said voltage-controlled oscillator for supplying an output pulse at a submultiple of an output frequency of the voltage-controlled oscillator to the second input terminal of the phase comparator;

a phase-lock detector connected to the phase comparator for producing a phase-lock detect signal when said phase difference indicates that signals at the first and second input terminals of the phase comparator are locked in phase;

means for generating a steady-state detect signal indicating that a voltage developed in said loop filter has attained a substantially steady value; and

gate means for generating an output indicating that said phase-lock detect signal and said steady-state detect signal are simultaneously present, a power saving method comprising the steps of:

a) activating said reference pulse source and operating said switch means to establish said connection,

b) operating the frequency divider at a first submultiple of the output frequency of said voltage-controlled oscillator so that a channel is established between the mobile unit and a first cell site station;

c) operating said switch means to clear said connection in response to, the output of said gate means, and deactivating said reference source, and allowing signals to be exchanged between the mobile unit and said first cell site station on a transmit/receive slot of said channel;

d) activating said reference pulse source, operating said switch means to establish said connection and operating the frequency divider at a second submultiple of the output frequency of the voltage-controlled oscillator so that the mobile unit can receive a signal from a second cell site station;

e) receiving a signal from said cell site station during an idle slot of the channel and detecting power level of the received signal; and

f) repeating the steps (b) to (e).

13. In a frequency synthesizer of a mobile unit for a time division multiple access (TDMA) cellular communication system, said system having a plurality of cell sites each being assigned a channel of unique frequency for carrying a TDMA frame having transmit/receive slots and idle slots, the frequency synthesizer comprising:

a reference pulse source for generating a reference pulse;

a phase comparator having first and second input terminals and an output terminal;

a loop filter connected to the output terminal of the phase comparator;

a voltage-controlled oscillator connected to the loop filter;

a frequency divider connected to said voltage-controlled oscillator for supplying an output pulse at a submultiple of an output frequency of the voltage-controlled oscillator to the first input terminal of the phase comparator;

a delay circuit for delaying the output of said frequency divider for a predetermined interval; and

a phase-lock detector connected to the phase comparator for producing a phase-lock detect signal when said phase difference indicates that signals at the first and second input terminals of the phase comparator are locked in phase; and switch means for applying the reference pulse from said reference pulse source or an output signal of the delay means to the second input terminal of the phase comparator, a power saving method comprising the steps of:

a) activating said reference pulse source,

b) operating said switch means to apply the reference pulse to the second input terminal of the phase comparator, and operating the frequency divider at a first submultiple of the output frequency of said voltage-controlled oscillator so that a channel is established between the mobile unit and a first cell site station;

c) operating said switch means to apply the output signal of the delay means to the second input terminal of the phase comparator in response to said phase-lock detect signal, deactivating said reference pulse source, and allowing signals to be exchanged between the mobile unit and said first cell site station on a transmit/receive slot of the channel;

d) activating said reference pulse source, operating said switch means to apply the reference pulse to the second input terminal of the phase comparator, and operating the frequency divider at a second submultiple of the output frequency of said voltage-controlled oscillator so that the mobile unit can receive a signal from a second cell site station;

e) receiving a signal from said second cell site station during an idle slot of the channel and detecting poser level of the received signal; and

f) repeating the steps (b) to (e).

14. A frequency synthesizer as claimed in claim 1, wherein said phase alignment comprises:

first and second D flip-flops each having a data input port connected to receive said reference pulse and a clock input port, the clock input of the first D flip-flop being responsive to the output of said voltage-controlled oscillator and the clock input of the second D flip-flop being responsive to the enable signal from said control means, said second D flip-flop producing an output for enabling said frequency divider to produce an output thereof; and

first and second coincidence