An information processing unit that can switch between a simultaneous display state of the same screen by a CRT display and a liquid crystal display and a display state by only the liquid crystal display, by using a display frequency suitable for each of the display state without the necessity for re-activation of a system. The kind of usable displays is displayed on a setup screen of the liquid crystal display and a user selects a desired display. A display controller generates display signals having display frequencies suitable for the selected displays, and effects screen display of the CRT display and the liquid crystal display. Further, commands for setting the specification of the display controller are stored in advance into a BIOS ROM and a HD. When the command is executed through an input device during the use of the system, the command is executed for the display controller and the display specification is changed.

A desktop computer system has a display adapter capable of supporting a digital display such as LCD panels as well as an analog display. The computer system provides analog/digital video signals outputted from the display adapter with a CRT monitor or a LCD monitor depending upon the monitor cable connection state. The computer system further has a power saving function to be performed in the display adapter also depending upon the monitor cable connection state. The display adapter includes two video ports, that is, a first video port being coupled with the CRT monitor cable, and a second video port being coupled with the digital monitor cable. Further included is a digital transmitter for sending parallel digital video signals to the LCD monitor through the second video port. A monitor cable sensing circuit is provided to detect connection state of the digital monitor cable. To this end, the digital monitor generates a signal being sent to the second video port over the monitor cable, thereby informing the video controller of the monitor cable connection state. If the LCD monitor cable is not connected with the video port, the sensing circuit prevents the display enable (DE) signal supplied by the video controller from being inputted to the transmitter.

A computer system that includes a first video controller, a second video controller, and a switching device is provided. The switching device is configured to receive a first signal from the first video controller and a second signal from the second video controller. The switching device is configured to provide the first signal or the second signal to a first display device.

An electronic interface device includes (1) a first input receiving signals from a graphics controller of a first electronic device having a display screen, (2) a second input receiving signals form a second electronic device, (3) a multiplexer, (4) an output connected to the display screen of the first electronic device, and (5) a switch to select which input signal of the interface device is fed to the display screen.

A video controller for controlling at least two video displays having independent refresh rates and pixel resolutions. In a first embodiment, two separate data paths are provided within a video controller for each video display (e.g., CRT and LCD). Taking advantage of the increased bandwidth of 64 bit wide DRAMS, data for each data path may be retrieved in separate read cycles. Each datapath may operate at its own clock frequency characteristic of refresh rate and pixel resolution. The dual data path embodiment also reduces the complexity of the software model needed to drive such dual displays. IN an alternative embodiment, a single data path may be provided within a video controller to drive data for two video displays having independent refresh rates and pixel resolutions. A data "tag" (extra bit) is attached to each word or dword passing through the data path indicating the destination (e.g., CRT or LCD) of the video data. At the output of the data path, separate FIFOs (e.g., LCD and CRT) are provided to temporarily store video data. FIFO pointers are fed back to a sequence controller to drive data read cycles from display memory. The use of tags and FIFO pointer feedback allows two video displays to be driven at different data rates, allowing for independent resolution and refresh rates in each display.