An impedance matching circuit employed at a high frequency includes a coupling line having a length longer than 1/4 of a wavelength at a design center frequency. Therefore, the impedance can be inductive and it is possible to impedance match a circuit comprising a transistor and having a capacitive impedance. The impedance matching circuit according to the present invention functions both as a dc blocking capacitor and an impedance matching circuit. Therefore, the degree of freedom in the circuit design is increased and the circuit can be reduced in size.
The present invention provides a millimeter-wave passive FET switch by using impedance transformation network to transfer the effective capacitance seen from the drain to source of an FET at off-state to low impedance, while transfer low impedance seen at on-state to high impedance. Since both on-state and off-state are transferred to high impedance, and low impedance respectively, a high-performance switch can be achieved. Since the size of the transformation network is small, the performance of the switch can be promoted with low cost.
6388546 - Method and apparatus for cascading frequency doublers - Owned by Her Majesty The Queen In Right of Canada as represented by The Minister of Industry through the Communications Research Centre (Ottawa,CA) The Communications Research Laboratory of the Ministry of Posts and Telecommunications, Japan (Koganei,JP)
This invention provides a multistage frequency multiplier having a plurality of frequency doublers. Each doubler incorporates a three-terminal transistor device and is connected to an adjacent doubler via an interstage network. The network comprises a transmission line having its electrical parameters selected to achieve conjugate impedance matching at the intermediate harmonic frequency generated by the corresponding doubler. This network also includes a quarter-wavelength open-ended stub for suppressing a main input frequency component received by the corresponding frequency doubler. A shunt resistor on the transistor gate is preferably used to stabilize the network. This interstage network simplifies overall circuit topology to reduce total circuit size, and provides increased drive power levels to permit broader bandwidth and stabilize required output level from a local oscillator. This invention is particularly useful in high-speed, large-capacity communications systems and in microwave and millimeter-wave radar applications.