Nitride based semiconductor device and manufacture thereof

What is claimed is:

1. A nitride semiconductor device comprising:

a substrate;

a first layer of an oriented polycrystalline nitride semiconductor of less than 5000 Angstroms thickness disposed directly on said substrate;

an operating layer of a single crystal nitride semiconductor disposed directly on said first layer; and

at least two electrical terminals connected at predetermined locations, at least one of said terminals being connected directly to said first layer.

2. The nitride semiconductor device as claimed in claim 1, wherein at least one of the orientations of the periodic arrangement of the atoms on the surface of said substrate, and at least one of the orientations of the crystal axes of the lattice face of said first layer nitride semiconductor in direct contact with said substrate coincide, and the mismatch of an integer multiple (from 1 to 10) of the atomic spacing of the latter orientation and the atomic spacing of the former orientation is within 5%.

3. The nitride semiconductor device as claimed in claim 2, wherein said substrate is a transparent single crystal substrate having a transmissivity in the 360 to 800 nm wave length region of at least 80%.

4. The nitride semiconductor device as claimed in claim 3, wherein said transparent single crystal substrate is a sapphire substrate.

5. The nitride semiconductor device as claimed in claim 4, wherein a face of said transparent single crystal substrate is the sapphire (01 1 2) R face.

6. The nitride semiconductor device as claimed in claim 5, wherein a face of said transparent single crystal substrate is inclined at an angle of 9.2 degrees to the sapphire (01 1 2) R face towards the (2 110) A face.

7. The nitride semiconductor device as claimed in claim 1, wherein said single crystal nitride semiconductor comprises nitrogen and at least one Group III constituent selected from aluminum, gallium, and indium.

8. The nitride semiconductor device as claimed in claim 1, wherein the C axis orientation of a crystal axis of the oriented polycrystalline nitride semiconductor of the first layer is parallel to the substrate surface.

9. The nitride semiconductor device as claimed in claim 1, wherein said first layer of an oriented polycrystalline nitride semiconductor has a composition graded structure, with the structure changing gradually from the portion in contact with the substrate to the portion in contact with the operating layer to finally give a required operating layer composition.

10. The nitride semiconductor device as claimed in claim 1, wherein said first layer of an oriented polycrystalline nitride semiconductor has a laminated structure of alternate differing composition nitride semiconductor layers each of less than 100 Angstroms thickness.

11. The nitride semiconductor device as claimed in claim 1, wherein said first layer of an oriented polycrystalline nitride semiconductor is doped with n-type dopant.

12. The nitride semiconductor device as claimed in claim 1, wherein said single crystal nitride semiconductor operating layer comprises a layer having a combination of at least two single crystal nitride semiconductors selected from the group of p-type, i-type and n-type single crystal nitride semiconductors.

13. The nitride semiconductor device as claimed in claim 1, wherein said single crystal nitride semiconductor operating layer comprises at least two layers having a combination of at least two single crystal nitride semiconductors selected from the group of p-type, i-type and n-type single crystal nitride semiconductors.

14. The nitride semiconductor device as claimed in claim 12 or claim 13, wherein a thickness of said single crystal nitride semiconductor operating layer is not more than 5 microns.

15. The nitride semiconductor device as claimed in claim 14, wherein said single crystal nitride semiconductor operating layer comprises at least one layer of p-type, i-type and n-type single crystal nitride semiconductor, and a terminal for applying a voltage is connected to said p-type or i-type single crystal nitride semiconductor layer.

16. The nitride semiconductor device as claimed in claim 15, wherein a surface layer is made from said p-type or i-type single crystal nitride semiconductor, and a terminal having a pattern for uniformly applying a voltage to produce a light, is disposed over a region of said surface layer not exceeding 50% of the area thereof.

17. The nitride semiconductor device as claimed in claim 14, wherein said single crystal nitride semiconductor operating layer comprises an i-type single crystal nitride semiconductor having a thickness of not more than 500 angstroms, an n-type single crystal nitride semiconductor having a thickness of not more than 3 microns, and a terminal for applying a voltage is disposed on said i-type single crystal nitride semiconductor layer.

18. The nitride semiconductor device as claimed in claim 14, wherein said single crystal nitride semiconductor operating layer comprises at least a p-type single crystal nitride semiconductor having a thickness of not more than 2 microns, and an n-type single crystal nitride semiconductor having a thickness of not more than 3 microns, and a terminal for applying a voltage is disposed on said p-type single crystal nitride semiconductor layer.

19. The nitride semiconductor device as claimed in claim 14, wherein said single crystal nitride semiconductor operating layer comprises at least a p-type single crystal nitride semiconductor, an i-type single crystal nitride semiconductor, and an n-type single crystal nitride semiconductor, and a terminal for applying a voltage is disposed on said p-type single crystal nitride semiconductor layer, wherein a current is produced in said operating layer when said operating layer is illuminated with light.

20. A method of making a nitride semiconductor device using a molecular beam epitaxy crystal growth apparatus having a gas source for supplying a compound including nitrogen in a gaseous state, a solid body source for supplying Group III constituents, and a source for supplying n-type and p-type dopants, comprising the steps of:

supplying a gaseous state compound containing nitrogen, and a Group III constituent to the surface of a substrate, with said substrate at a temperature of 300.degree. to 1000.degree. C., under a pressure of less than 10.sup.-5 Torr to produce a first layer of an oriented polycrystalline nitride semiconductor on said substrate at a growth rate of 0.1 to 20 Angstroms/second;

supplying a gaseous state compound containing nitrogen, and a Group III constituent to the surface of said first layer with said substrate at a temperature of 300 to 1000.degree. C., under a pressure of less than 10.sup.-5 Torr to produce a single nitride semiconductor layer on said first layer at a growth rate of 0.1 to 10 Angstroms/second;

dry etching predetermined positions on an operating layer comprising at least one of a p-type and an i-type single crystal nitride semiconductor, and an n-type single crystal nitride semiconductor, and predetermined positions on said first layer;

heat treating the device after the dry etching step at a temperature below at least one of the temperature of dissociation of the nitrogen containing gas and the temperature of dissociation of the nitride semiconductor, in at least one of an inert gas and other gases; and

forming terminals on at least two of the predetermined positions of said operating layer, at least one of said terminals being connected directly to said first layer.

21. The method of making a nitride semiconductor device as claimed in claim 20, wherein ammonia, nitrogen triflouride, hydrazine or di methyl hydrazine is used as the compound containing nitrogen.

22. The method of making a nitride semiconductor device according to claim 20, wherein said compound containing nitrogen gas is heated and supplied to the surface of said substrate.

23. The method of making a nitride semiconductor device as claimed in claim 20, wherein nitrogen containing ammonia is used as the compound containing nitrogen, and these are supplied in a plasma gaseous state.

24. The method of making a nitride semiconductor device according to claim 20, wherein a partial pressure of a carbon containing compound inside the crystal growth apparatus is less than 10.sup.-8 Torr.

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TECHNICAL FIELD

The present invention relates to nitride semiconductor device. In particular the present invention relates to nitride semiconductor device which can be used for light emitting diodes and laser diodes which emit light in the region from ultra violet to orange, and are suitable as light sources for display, light transmission and office automation equipment.

BACKGROUND ART

Semiconductor devices, in particular visible light, light emitting diodes (LED) are used extensively for display devices and for various light sources. However, they have not yet been used as light emitting diodes in the ultra violet to blue light region. There has however been rapid development of light emitting diodes for use in displays requiring three basic colors. The expected ten fold increase in recording density by using laser diodes as a light source for optical disks and compact disks however has not yet been achieved. Light emitting diodes and lazer diodes emitting light in the ultra violet to blue color region use compound semiconductors such as GaN, ZnSe, ZnS, and SiC.

However, with these wide band gap compound semiconductors, it is generally difficult to produce single crystal thin films, and methods for manufacturing thin films which can be used for light emitting devices have yet to be established. For example, gallium nitride (GAN) which shows promise as a blue light emitting device, has up until now been grown as a thin film on the sapphire C (0001) face by means of the Metal Organic Chemical Vapor Deposition (MOCVD) method, or the Vapor Phase Epitaxy (VPE) method (Journal of Applied Physics 56 (1984) 2367-2368). With this method however it is necessary to have a high reaction temperature in order to obtain good crystallization. Consequently production is extremely difficult. Furthermore, since growth occurs at a high temperature, defects due to nitrogen deficiency can occur, and carrier density may become extremely large. As a result satisfactory semiconductor characteristics are difficult to obtain. In order to overcome these problems an aluminum nitride buffer layer is formed on the sapphire C (0001) face and a GaN thin film of a comparatively large film thickness is formed on top of this to make up a semiconductor light emitting elements.

In tests to achieve film growth at low temperatures, a method whereby the nitrogen supply gas is activated by irradiating it with an electron shower has been proposed (Japanese Journal of Applied Physics, 20, L545 (1981)). However, even with this method it is not possible to obtain film qualities suitable for light emission. Furthermore, to guard against nitrogen deficiency a highly activated nitrogen source is used in carrying out the film growth. To obtain the highly activated nitrogen a method utilizing plasma is used (Journal of Vacuum Science and Technology, A7, 701 (1989)). However up until now this method has been unsuccessful.

Investigations have also been made with GaInN mixed crystal thin films. Most of the tests involved thin film growth on the sapphire C face using the Metal Organic Vapor Phase Epitaxy (MOVPE) method (Journal of Applied Physics 28 (1989) L-1334). With this method however, the growth temperature for GaN and InN differs markedly making it difficult to obtain a good quality GaInN mixed crystal. Also, with GaAlN mixed crystals, an example of film growth by means of a gas-source molecular beam epitaxy (MBE) method using ammonia gas has been reported (Journal of Applied Physics 53 (1982) 6844-6848). However, with this method, although cathodoluminescence at liquid nitrogen temperatures was observed, a good quality thin film for the manufacture of light emitting devices was not obtained.

When using the conventional MOCVD and MOVPE methods for the manufacture of nitride semiconductor thin films, it is necessary to use a source material which contains carbon. Since the pressure during film growth is high, there are problems with the absorption of significant amounts of carbon impurities into the thin film so that a nitride semiconductor having poor qualities results.

Alternatively, there is a proposed construction wherein a single crystal thin film of Group III-V compound semiconductor including In and/or Ga is grown directly on a single crystal electrically insulating substrate (U.S. Pat. No. 4,404,265). With this proposal however, the following problems exist. The conditions required for directly growing the Group III-V compound semiconductor single crystal thin film on the substrate are extremely limited. Consequently the fabrication is not easy. Moreover, when growing a thin film of semiconductor directly on the substrate, a significant stress occurs in the semiconductor thin film due to the lattice mismatch between the substrate and the semiconductor, resulting in poor device durability. Furthermore, since the single crystal semiconductor is formed on the substrate, conductivity is reduced making it difficult to form a satisfactory ohmic contact for device operation.

With the nitride semiconductor thin films as described above, the GaAs semiconductor and Si semiconductor are different. Hence, since the semiconductor does not have a single crystal substrate of its own type, the thin film must be grown by the heteroepitaxy method. The production of thin films having good crystallization suitable for semiconductor devices, especially light emitting devices is thus extremely difficult.

SUMMARY OF THE INVENTION

It is an object of the present invention to address the above problems and provide a nitride semiconductor device, in particular a semiconductor light emitting device having good properties in the ultraviolet to orange range.

The present inventor carried out exhaustive research into the above problems. In this research a substrate surface having a periodic atomic spacing in at least one direction was used. An oriented polycrystalline nitride semiconductor with the atomic spacing of the lattice surface thereof close to an integer multiple of that of the substrate was grown directly on the surface of the substrate. It was found that by this procedure a single crystal nitride semiconductor thin film having excellent crystal characteristics in spite of being extremely thin could be grown on the oriented polycrystalline nitride semiconductor. It thus became evident that by following this procedure semiconductor devices having excellent characteristics could be obtained.

The nitride semiconductor device of the present invention, thus comprises a substrate, first layer of an oriented polycrystalline nitride semiconductor of less than 500 Angstroms thickness disposed directly on the substrate, an operating layer of a single crystal nitride semiconductor disposed directly on the first layer, and has at least two electrical terminals connected at predetermined positions, with at least one of the terminals connected to the first layer.

Furthermore, the method of manufacture of the nitride semiconductor device of the present invention uses a molecular beam epitaxy method having a gas source for supplying a compound including nitrogen in a gaseous state, a solid body source for supplying Group III constituents, and a source for supplying n-type and p-type dopants. A gaseous state compound including nitrogen, and a Group III constituent are supplied to the surface of the substrate, with the substrate at a temperature of 300.degree. to 1000.degree. C., under a pressure of less than 10.sup.-5 Torr to produce a first layer of oriented polycrystalline nitride semiconductor on the substrate at a growth rate of 0.1-20 Angstroms/second. Then at a pressure of less than 10.sup.-5 Torr and with the substrate at a temperature of 300+-1000.degree. C., a gaseous state compound containing nitrogen, and a Group III constituent is supplied to the surface of the first layer to produce a single crystal nitride semiconductor layer on the first layer at a growth rate of 0.1-10 Angstroms/second.

With the oriented polycrystalline nitride semiconductor layer, the crystals in the vicinity of the interface between the substrate and the nitride semiconductor are oriented in substantially the same direction, and crystallization of the thin film improves with increasing distance from the interface of the substrate and the nitride semiconductor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view showing a hexagonal crystal system showing a crystal face inclined at an angle of .theta.1 to the (01 1 2) face towards the (2 110) face.

FIG. 2 is a sectional structural view showing a light emitting device according to a first working example comprising oriented polycrystalline GaN/n-GaN/p-GaN.

FIG. 3 is a sectional structural view showing a light emitting device comprising oriented polycrystalline Ga.sub.1-n In.sub.x N/n-Ga.sub.1-n In.sub.x N/p-Ga.sub.1-n In.sub.x N.

FIG. 4 is a sectional structural view showing a light emitting device comprising oriented polycrystalline n.sup.+ -GaN/n-GaN/P-GaN crystal.

FIG. 5 is a sectional structural view showing a light emitting device comprising oriented polycrystalline Ga.sub.1-x In.sub.x N/n-Ga.sub.1-x In.sub.x N/i-Ga.sub.1-x In.sub.x N/p-Ga.sub.1-x In.sub.x N.

FIG. 6 is a sectional structural view showing a light emitting device comprising oriented polycrystalline Ga.sub.1-x In.sub.x N/n-Ga.sub.1-x In.sub.x N/P-Ga.sub.1-y In.sub.y N/p-Ga.sub.1-x In.sub.x N (x.ltoreq.y).

FIG. 7 a sectional structural view showing a light emitting device comprising oriented polycrystalline Ga.sub.1-a Al.sub.a N/n-Ga.sub.1-a Al.sub.a N/p-Ga.sub.1-b Al.sub.b N/p-Ga.sub.1-a Al.sub.a N (a.gtoreq.b).

FIG. 8 is a sectional structural view showing a light emitting device comprising oriented polycrystalline Ga.sub.1-x-y In.sub.x Al.sub.y N/n-Ga.sub.1-x-y In.sub.x Al.sub.y N/i-Ga.sub.1-a-b In.sub.a Al.sub.b N/p-Ga.sub.1-x-y In.sub.x Al.sub.y N.

FIG. 9 is a sectional structural view showing a light emitting device comprising oriented polycrystalline GaN/n-GaN/n-GaN/p-GaN/n-Ga.sub.1-x In.sub.x N/p-Ga.sub.1-x In.sub.x N.

FIG. 10 is a sectional structural view showing a light emitting device comprising GaInN composition graded structure/n-Ga.sub.1-x In.sub.x N/p-Ga.sub.1-x In.sub.x N.

FIG. 11 is a sectional structural view showing a light emitting device comprising a strained super lattice structure/n-Ga.sub.1-x In.sub.x N/p-Ga.sub.1-x In.sub.x N.

FIG. 12 is a sectional structural view showing a light emitting device comprising oriented polycrystalline Ga.sub.1-x In.sub.x N/n-Ga.sub.1-x In.sub.x N/a quantum well structure/p-Ga.sub.1-x In.sub.x N.

FIG. 13 is a sectional structural view showing a light emitting device comprising oriented polycrystalline Ga.sub.1-x In.sub.x N/n-Ga.sub.1-x In.sub.x N/p-Ga.sub.1-x In.sub.x N/n-Ga.sub.1-y In.sub.y N/p-Ga.sub.1-y In.sub.y N.

FIG. 14 is a schematic view showing a crystal growing apparatus used in producing thin films.

FIG. 15 is a graph illustrating the diode-characteristics of a GaN light emitting device manufactured according to a first working example.

FIG. 16 is a graph illustrating the emission spectrum of a GaN light emitting device made according to the first working example.

FIG. 17 is a perspective view showing a cubic crystal system showing a crystal face inclined at an angle of .theta.2 to the (001) face towards the (100) face, and an angle of .theta.3 towards the (010) face.

FIG. 18 is a perspective view showing a orthorhombic crystal system showing a face inclined at an angle of .theta.4 to the (001) face towards the (100) face.

FIG. 19 is a sectional structural view showing a light detecting device comprising oriented polycrystalline Ga.sub.1-x In.sub.x N/n-Ga.sub.1-x In.sub.x N/i-Ga.sub.1-x In.sub.x N/p-Ga.sub.1-x In.sub.x N.

BEST MODE FOR CARRYING OUT THE INVENTION

With the substrate according to the present invention, at least one of the orientations of the periodic arrangement of the atoms on the surface of the substrate, and at least one of the orientations of the crystal axes of the lattice face of the first layer nitride semiconductor in direct contact with the substrate coincide, and the mismatch of an integer multiple (from 1 to 10) of the atomic spacing of the latter orientation and the atomic spacing of the former orientation is preferably within 5%.

The atoms periodically arranged on the surface of the substrate are those atoms which occupy the lattice points of the substrate crystal, and are positioned uppermost on the crystal surface. The integer multiple of the atomic spacing in at least one direction of the lattice face of the nitride of the oriented polycrystalline nitride semiconductor of the first layer is from 1 to 10. If this exceeds 10 the stacking of the atoms exposed on the substrate surface, with the atomic orbits of the nitride semiconductor becomes small so that the crystal orienting function is decreased, making it difficult to obtain a well orientated polycrystalline nitride semiconductor layer. The difference between the integer multiple of the atomic spacing in at least one direction on the lattice face of the nitride of the oriented polycrystalline nitride semiconductor, and the atomic spacing of the periodic arrangement of the atoms on the surface of the substrate in the same direction is preferably within 5%. If the difference (or mismatch) is greater than this, it becomes difficult to obtain a well oriented nitride semiconductor layer. A mismatch value of less than 3% is more preferable, and less than 1% is even more preferable.

With regards to the mismatch between the atomic spacing of the substrate and that of the nitride semiconductor. This refers to the difference in atomic spacing between an atomic spacing (a) (in one direction) of the lattice face of the nitride semiconductor grown on the substrate surface and in contact with the substrate surface, and an atomic spacing (b) (in one direction) of the periodic arrangement of atoms on a specific cut face of the single crystal substrate. The magnitude of the mismatch is represented by .vertline.b-n.times.a.vertline./b.times.100(%) where (n=1-10). The atomic spacing can be determined from the respective nitride semiconductor and the single crystal substrate lattice constants. This can be calculated once the substrate cut face has been decided.

Furthermore, it is even more preferable if the atomic spacing mismatch between the integral multiple of the atomic spacing in a second direction of the lattice face of the nitride of the orientated polycrystalline nitride semiconductor of the first layer, and the atomic spacing of the periodic arrangement of atoms on the upper surface of the substrate in the same second direction is also within 5%. In this case, the form of the lattice face of the nitride of the orientated polycrystalline nitride semiconductor is preferably the same as that of the periodic arrangement of the atoms on the substrate surface.

The following substrates may be used in the present invention. Single crystal semiconductor substrates such as Si, Ge, SiC, Group III-V compound semiconductor substrates such as GaAs, InAs, InP, and GaSb, and single crystal substrates such as AlN, ZnO, sapphire (Al.sub.2 O.sub.3), quartz (SiO.sub.2), TiO.sub.2, MgO, MgF.sub.2, CaF.sub.2, and SrTiO.sub.3. In order to satisfy the before mentioned conditions, the substrate crystal is grown so that a surface may be inclined at the desired angle to a predetermined reference face or cut and polished after growing the crystal. With the above substrates, the lattice face is often about .+-.2 degrees out of alignment with the surface so that a complete lattice face generally does not occur on the surface. Although this type of substrate may also be used, it is preferable if a misalignment of not more than .+-.1 degrees exists and more preferable if this is less than .+-.0.5 degrees. Furthermore, a single crystal thin film which satisfies the above conditions is grown on generally used glass, polycrystalline substrate or single crystal substrate as a substrate. The required oriented polycrystalline nitride semiconductor can then be grown on top of this. As an example of a single crystal thin film, for GaN, this may be a single crystal silicone substrate on which has been grown ZnO or SiC. There are no particular restrictions on the thickness of the single crystal thin film provided that a uniform surface is obtained.

When required for a light emitting element or light detecting device, it is preferable to use a transparent single crystal substrate having a transmissivity of not less than 80% in the wave length range from 360-800 mm. With this substrate, it is possible for emitted light or detected light to pass through the substrate. Typical examples of transparent single crystal substrates include sapphire, single crystal quartz, MgO, TiO.sub.2, MgF.sub.2, CaF.sub.2, and SrTiO.sub.3. Of these however the sapphire substrate is preferable. The C face (0001), R face (01 1 2), and A face (2 110) of the sapphire may be used as the lattice face, and the required substrate surface may be obtained by inclining at the required angle to these reference faces. For example, if the sapphire R face (01 1 2) is used, then with Ga.sub.1-x In.sub.x N wherein x is in the range from 0 to 0.45, and Ga.sub.1-y Al.sub.y N wherein y is in the range from 0 to 1, the difference in length between 3 times the length of the c-axis of the nitride semiconductor, and the axial length of the R face projection of the sapphire c-axis is within 5%. Consequently this is suitable as a substrate for the present invention. Furthermore, using the face inclined at an angle of 9.2 degrees to the sapphire R face (01 1 2) towards the A face (2 110), as a substrate face is even more preferable, since in this case, 3 times the length of the c-axis of the nitride semiconductor and 4 times the length of the line of intersection of the A face and C face of the nitride semiconductor are both within 5% of the periodic atomic spacing on the face inclined at 9.2 to the sapphire R face (01 1 2) towards the A face (2 110).

There are no particular limits to the thickness of the substrate of the present invention. However, when used as a light emitting device with light passing through the substrate, the thickness should preferably be as thin as possible. In practice, mechanical strength is the necessary consideration both in the manufacture of the nitride semiconductor thin film and in the manufacture of the subsequent device. Consequently a substrate thickness of from 0.05-2.0 mm is preferable. If this is less than 0.05 mm, mechanical strength is low making handling difficult. If the thickness is above 2.0 mm, then it becomes difficult to cut up the substrate for use as devices, and when used for light emitting devices, the light extraction efficiency is reduced.

A feature of the present invention is that the nitride semiconductor layer grown directly on the substrate is an orientated polycrystalline nitride semiconductor layer having a thickness of not more than 5000 angstroms. With the orientated polycrystalline nitride semiconductor layer in direct contact with the substrate, at least one of the orientations of the periodic arrangement of atoms on the surface of the substrate, coincide with at least one of the orientations of the crystal axis of the lattice face of the first layer nitride semiconductor layer in direct contact with the substrate. Furthermore the mismatch of an integer multiple (from 1 to 10) of the atomic spacing of the latter orientation, and the atomic spacing of the former orientation is within 5%. Consequently even in a region close to the substrate and the nitride semiconductor interface, the crystal grows two dimensionally, and aligns itself in a direction for minimum mismatch. Moreover, crystallinity of the thin film improves with increasing distance from the substrate surface. Hence, with the orientated polycrystalline nitride semiconductor layer of the present invention, the crystal of the nitride semiconductor may be aligned parallel with the substrate surface, so that a smooth surface is possible. Consequently an operating layer having good characteristics may be grown on top of this layer. This phenomena wherein orientation is improved may be observed during semiconductor thin film growth by Refractive High Energy Electron Diffraction (RHEED) techniques. It may also be observed after growth of the thin film by transmission electron microscope or X-ray diffraction methods. Although the thickness of the oriented polycrystalline nitride semiconductor layer is less than 5000 angstroms, this depends on the film growth rate and degree of mismatch. When the film growth rate or mismatch are large, a thick orientated polycrystalline nitride semiconductor film is not obtained and the single crystal nitride semiconductor tends to grow with a rough surface. When the oriented polycrystalline nitride semiconductor layer is made using the Molecular Beam Epitaxy (MBE) method according to the present invention, a thickness of less than 5000 angstroms gives adequate device characteristics. If the thickness of the thin film is greater than this, the growth time of the thin film becomes excessive so as to be unpractical. For example with a thin film growth rate of several angstroms per second, and a mismatch in one direction of approximately 1%, then even with a thickness of 500-1000 angstroms, it is not possible to obtain a well crystallized oriented polycrystalline nitride semiconductor layer having a smooth surface. However, when the mismatch in a second direction is also less than 1%, it is possible to obtain a well crystallized oriented polycrystalline nitride semiconductor layer with a smooth surface even if the film thickness is only several tens of angstroms thick. Accordingly, the film thickness of the oriented polycrystalline nitride semiconductor layer should preferably be within the range of from 10-5000 angstroms.

The oriented polycrystalline nitride semiconductor layer of the present invention may comprise nitrogen and at least one Group III constituent selected from Al, Ga, or In.

For example, when oriented polycrystalline nitride semiconductor having Ga as the main constituent is grown on a sapphire substrate, the resultant structure is such that the direction of the c-axis of the nitride semiconductor on the sapphire R face is aligned with the axial direction of the projection of the sapphire c-axis on the R face. The thickness of the layer depends on the film growth rate and is normally from 300-2500 angstroms. Moreover, when the face inclined at an angle of 9.2 (.theta.1) degrees to the sapphire R face (01 1 2) towards the A face (2 110) is used as a substrate face, an extremely thin film of oriented polycrystalline nitride semiconductor of less than several tens of angstroms thickness is obtained having a uniform surface and good crystallization.

With the present invention, in a second aspect of the oriented polycrystalline nitride semiconductor in direct contact with the substrate surface, the nitride semiconductor composition is given a composition graded structure with the structure changing gradually from the substrate side to finally give a required operating layer composition. The composition graded structure involves growing a semiconductor thin film comprising Ga.sub.1-x-y In.sub.x Al.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) on the substrate so as to give the finally required operating layer structure. With the Ga.sub.1-x-y In.sub.x Al.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) composition the x and/or y value may change gradually from the substrate side. This change may be determined by consideration of the required operating layer properties, and may involve changing the composition to increase the lattice constant, or changing the composition to decrease the lattice constant. By means of this composition graded structure, the stress applied to the operating layer may be minimized even in cases where defects exist in the crystal. Consequently device characteristics and durability may be improved.

In a third aspect of the oriented polycrystalline nitride semiconductor in direct contact with the substrate surface, a plurality of oriented polycrystalline nitride semiconductor layers having a composition different from that of the nitride semiconductor and a thickness of less than 100 angstroms are arranged in alternately stacked layers. With this laminated construction, the characteristics and durability of the device may be improved. In this case the effectiveness is reduced if the thickness of the respective layers is too thick. Consequently the thickness should be less than 100 angstroms, preferably less than 70 angstroms and more preferably less than 50 angstroms. Moreover, the thickness of the oriented polycrystalline nitride semiconductor layer should be not less than 10 angstroms. If less than this, the beneficial effect on device characteristics and durability does not appear.

The flatness of the surface of the oriented polycrystalline nitride semiconductor obtained in this way has an unevenness of less than 100 angstroms. With this surface it thus possible to grow a second layer having good crystallization. This amount of unevenness can be measured by means of an atomic force microscope.

With the present invention, the oriented polycrystalline nitride semiconductor layer formed in direct contact with the substrate surface has good electrical conductivity. Hence a uniform electric field may be applied over the entire operating layer by appropriate connection to terminals for operation of the device. Furthermore, to improve on the functions, n-type or p-type doping may be performed. In particular, n-type doping is preferable. For the n-type doping, dopants such as Si, Ge, C, Sn, Se, Te and the like may be used. By variation of the type and amount of dopant used, carrier density may be controlled, and electrical resistance reduced. The carrier density should be not less than 10.sup.17 cm.sup.-3, and preferably not less than 10.sup.18 cm.sup.-3.

The single crystal nitride semiconductor according to the present invention, may comprise a constituent containing nitrogen and at least one Group III constituent selected from Al, Ga or In. The band gap of these constituents lies within the broad range of from 2.4 eV for InN, 3.4 eV for GaN, to 6.2 eV for AlN. Band gap control may be achieved by making a mixed crystal semiconductor thin film comprising Al, Ga, or In. For example, this may comprise AlGaN, GaInN, or AlGaInN. Furthermore, band gap control may be achieved by doping the semiconductor or mixed crystal semiconductor with a p-type or n-type dopant.

With the present invention, the operating layer of single crystal nitride semiconductor formed on the substrate may comprise one or two groups of single crystal nitride semiconductor layer having at least one n-type, i-type or p-type single crystal nitride semiconductor layer, depending upon the purpose of the device. The n-type dopant may be, Si, Ge, C, Sn, Se, Te and the like, while the p-type dopant or i-type dopant may be Mg, Ca, Sr, Zn, Be, Cd, Hg, or Li and the like. By changing the type of dopant and the amount used, the required conductivity type and carrier density may be obtained. Moreover a structure may be made with a variation in doping concentration in the direction of the film thickness, and a structure with a .delta. doping layer with doping only in a specific layer may also be obtained.

The oriented polycrystalline nitride semiconductor according to the present invention is able to distinguish from the single crystal nitride semiconductor and the polycrystalline nitride semiconductor by using a multiple axis X-ray diffraction, or a transmission electron microscope method, or an electron beam diffraction method.

The nitride semiconductor devices may be for example; field effect transistors wherein the majority-carrier flow in the n-type or p-type nitride semiconductor layer is controlled by applying a voltage to the gate, bi-polar transistors having an n-p-n-type or p-n-p-type nitride semiconductor layer structure, light emitting devices having a structure comprising at least one n-type, p-type or i-type nitride semiconductor layer, light detecting devices with a structure comprising an n-type/p-type/i-type nitride semiconductor layer, rectifying devices with a structure comprising a p.sup.+ -type/n-type/n.sup.+ -type nitride semiconductor layer, light emitting devices or electronic elements with a structure combining n-type and/or p-type with a quantum well structure. However the nitride compound semiconductor devices of the present invention are not limited to those of the above.

FIGS. 2 to 13 show examples of structures of operating layers for use as a light emitting devices.

With the structure of the operating layer shown in FIG. 2, a single crystal (n-GaN) 25/single crystal (p-GaN) 26 is formed on an oriented polycrystalline (GAN) 24 which is formed on the substrate 23. With this device, a terminal 27 is connected to the oriented polycrystalline (GAN) 24, and a terminal 28 is formed on the operating layer 26.

With the structure of the operating layer shown in FIG. 3, a single crystal (n-Ga.sub.1-x In.sub.x N) 30/single crystal (p-Ga.sub.1-x In.sub.x N) 31 is formed on an oriented polycrystalline (Ga.sub.1-x In.sub.x N) 29 which is formed on the substrate 23. With this device, a terminal 27 is formed on the oriented polycrystalline (Ga.sub.1-x In.sub.x N) 29, and a terminal 28 is formed on the operating layer 31. Further, an n-GaN/i-GaN, n-Ga.sub.1-x Al.sub.x N/p-Ga.sub.1-x Al.sub.x N/p-Ga.sub.1-x Al.sub.x N operating layer, is possible as well as the structures of FIGS. 4 to 13.

With the structure of the operating layer shown in FIG. 4, a single crystal (n-GaN) 25/single crystal (p-GaN) 26 is formed on an oriented polycrystalline (n.sup.+ -GaN) 32 which is formed on the substrate 23. With this device, a terminal 27 is formed on the oriented polycrystalline (n.sup.+ -GaN) 32, and a terminal 28 is formed on the operating layer 26.

With the structure of the operating layer shown in FIG. 5, a single crystal (n-Ga.sub.1-x In.sub.x N) 30/single crystal (i-Ga.sub.1-x In.sub.x N) 33/(p-Ga.sub.1-x In.sub.x N) 31 where 0.ltoreq.x.ltoreq.1, is formed on an oriented polycrystalline (Ga.sub.1-x In.sub.x N) 29 which is formed on the substrate 23. With this device, a terminal 27 is formed on the oriented polycrystalline (Ga.sub.1-x In.sub.x N) 29, and a terminal 28 is formed on the operating layer 31.

With the structure of the operating layer shown in FIG. 6, a single crystal (n-Ga.sub.1-x In.sub.x N) 30/single crystal (p-Ga.sub.1-y In.sub.y N) 34/(p-Ga.sub.1-x In.sub.x N) 31 where x.ltoreq.y, 0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, is formed on an oriented polycrystalline (Ga.sub.1-x In.sub.x N) 29 which is formed on the substrate 23. With this device, a terminal 27 is formed on the oriented polycrystalline (Ga.sub.1-x In.sub.x N) 29, and a terminal 28 is formed on the operating layer 31.

With the structure of the operating layer shown in FIG. 7, a single crystal (n-Ga.sub.1-a Al.sub.a N) 36/single crystal (p-Ga.sub.1-b Al.sub.b N) 37/(p-Ga.sub.1-a Al.sub.a N) 38 where a.ltoreq.b, 0.ltoreq.a.ltoreq.1, 0.ltoreq.b.ltoreq.1, is formed on an oriented polycrystalline (Ga.sub.1-a Al.sub.a N) 35 which is formed on the substrate 23. With this device, a terminal 27 is formed on the oriented polycrystalline (Ga.sub.1-a Al.sub.a N) 35, and a terminal 28 is formed on the operating layer 38.

With the structure of the operating layer shown in FIG. 8, a single crystal (n-Ga.sub.1-x-y In.sub.x Al.sub.y N) 40/single crystal (i-Ga.sub.1-x-y In.sub.x Al.sub.y N) 41/single crystal (p-Ga.sub.1-x-y In.sub.x Al.sub.y N) 42 where 0.ltoreq.x+y.ltoreq.1, is formed on an oriented polycrystalline (Ga.sub.1-x-y In.sub.x Al.sub.y N) 39 which is formed on the substrate 23. With this device, a terminal 27 is formed on the oriented polycrystalline (Ga.sub.1-x-y In.sub.x Al.sub.y N) 39, and a terminal 28 is formed on the operating layer 42.

With the structure of the operating layer shown in FIG. 9, a single crystal (n-GaN) 25/single crystal (p-GaN) 26/single crystal (n-Ga.sub.1-x In.sub.x N) 30/single crystal (p-Ga.sub.1-x In.sub.x N) 31, is formed on an oriented polycrystalline GaN 24 which is formed on the substrate 23. With this device, respective terminals 27, 28 and 43 are formed on the oriented polycrystalline GaN 24, the single crystal (p-GaN) 26, and the single crystal (n-Ga.sub.1-x In.sub.x N) 30, and a terminal 44 is formed on the single crystal (p-Ga.sub.1-x In.sub.x N) 31 of the operating layer.

With the structure of the operating layer shown in FIG. 10, a single crystal (n-Ga.sub.1-x In.sub.x N) 30/single crystal (p-Ga.sub.1-x In.sub.x N) 31, is formed on a GaInN composition graded structural layer 45 which is formed on the substrate 23. With this device, a terminal 27 is formed on the composition graded structural layer 45, and a terminal 28 is formed on the operating layer 31.

With the structure of the operating layer shown in FIG. 11, a single crystal (n-Ga.sub.1-x In.sub.x N) 30/single crystal (p-Ga.sub.1-x-y In.sub.x N) 31 is formed on the strained super lattice structural layer 49 which is formed on the substrate 23. With this device, a terminal 27 is formed on the strained super lattice structural layer 49, and a terminal 28 is formed on the operating layer 31.

With the structure of the operating layer shown in FIG. 12, a single crystal (n-Ga.sub.1-x In.sub.x N) 30/quantum well layer 46/single crystal (p-