An FET gate bias circuit having a Schottky barrier gate incorporated therein is provided which can prevent gate voltage variations and thus provide a high-performance, high-reliability GaAs FET amplifier. The FET gate bias circuit includes a PNP transistor having a collector connected to a negative power supply, an NPN transistor having a collector thereof grounded and an emitter connected to the emitter of the PNP transistor, a Schottky barrier gate FET having a source grounded and a gate connected to the node between the emitters of the PNP transistor and NPN transistor, and a base voltage applying circuit for applying predetermined base voltages to the respective bases of the PNP transistor and NPN transistor.
A resistor is inserted in series with an inductor feeding a bias current and that reactance of an input matching circuit or of an output matching circuit is varied depending on variations of input signal power. The input impedance of the amplifying element is restrained from lowering even when the input signal power has increased so that a constantly satisfactory impedance matching is achieved irrespective of the input signal powers variations. Furthermore, restriction on increase of the bias current enables a limitation to be imposed on increase of the power consumption of the microwave amplifier.
A negative voltage detector is disclosed wherein a resistor divider circuit is used to translate a negative voltage into a standard CMOS logic low or logic high value. The small area consumed by the negative voltage divider of the present invention allows multiple device placement within a logic device without the consumption of much area on the logic device. Additionally, the multiple devices placed may detect different negative voltage thresholds with a simple tuning of device components.
A negative voltage detector including a resistor divider circuit is used to translate a negative voltage into a standard CMOS logic low or logic high value. The small area consumed by the negative voltage divider allows multiple device placement within a logic device without the consumption of much area on the logic device. Additionally, the multiple devices placed may detect different negative voltage thresholds with a simple tuning of device components.
An amplifier bias system and method has only reduced resonances at least throughout the envelope frequency of the signal to be amplified. Thus, the amplifier bias system can provide bias current to the amplifier with minimal voltage variations over the envelope frequency band, especially during signal peaks. For example, the amplifier bias system can be used as an amplifier gate or drain bias network where the amplifier bias system is coupled between the power supply and the gate or drain terminals of the amplifier. The amplifier bias system can include an amplifier bias filter having an impedance which is relatively low at least throughout the envelope frequency of the input signal and relatively high at radio frequency. Because the amplifier bias filter has an impedance which is relatively low through at least the envelope or baseband frequency of the input signal and relatively high at radio frequency (RF), the voltage will be relatively constant due to the low voltage drops over the bias network from energy within the envelope frequency band. To reduce the propagation of frequency components within the envelope frequency through the amplifier bias system, an energy handling device can filter energy within the envelope frequency, for example by acting as a short to ground for certain frequencies within the envelope frequency. For signal peaks within the envelope frequency, the energy handling device can provide current through the amplifier bias filter to the amplifier.