Thin multichip module - Patent Review 5661339

Claims

What is claimed is:

1. A semiconductor module, comprising:

a frame having a floor member defining an interior portion;

a plurality of electrical contacts along an edge of said frame;

a composite substrate comprising: a circuit layer, a substrate cover plate, and means for adhering said circuit layer to said substrate cover plate;

a plurality of semiconductor devices mounted to said composite substrate to form a composite semiconductor substrate subassembly, wherein said composite substrate is attached to said frame such that at least a portion of said composite semiconductor substrate subassembly is received in said interior portion of said frame and wherein said plurality of semiconductor devices are electrically coupled together; and

electrical connecting means for electrically connecting said semiconductor devices on said composite substrate to said electrical contacts on said edge of said frame.

2. The semiconductor module according to claim 1, said frame having a generally rectangular shape with first and second major planes, said interior portion being defined by a generally rectangular aperture.

3. The semiconductor module according to claim 1, wherein said substrate cover plate has heat dissipation properties, said substrate cover plate being in thermal communication with said semiconductor devices to conduct thermal energy therefrom.

4. The semiconductor module according to claim 1, said electrical connecting means comprising a plurality of electrically conductive pins connected to said edge of said frame.

5. A semiconductor module, comprising:

(a) a frame having an interior portion, said interior portion being defined by an aperture;

(b) a plurality of electrical contacts along an edge of said frame;

(c) a composite semiconductor substrate sub-assembly including a composite substrate and a plurality of semiconductor devices mounted to said composite substrate, said composite substrate comprising:

(i) a circuit layer comprising a plurality of circuit traces for providing electrical interconnection between said semiconductor devices;

(ii) a substrate cover plate; and

(iii) means for adhering said circuit layer to said substrate cover plate;

wherein said composite substrate is connected to said frame such that at least a portion of said composite semiconductor substrate sub-assembly is received in said interior portion of said frame; and

(d) electrical connecting means for electrically connecting said semiconductor devices on said composite semiconductor substrate sub-assembly to said electrical contacts on said edge of said frame.

6. A semiconductor carrier comprising:

(a) a generally rectangular perimeter frame member having side portions and a floor portion forming a cavity for receiving at least a portion of a semiconductor substrate;

(b) a plurality of electrical contacts associated with a portion of said perimeter frame member;

(c) a semiconductor substrate sub-assembly including a composite substrate comprising a cover plate and a laminate circuit applied to the cover plate and a plurality of spaced apart semiconductor devices mounted to the composite substrate, wherein said plurality of semiconductor devices are electrically coupled together;

(d) wherein said substrate sub-assembly is connected to said frame member such that a portion of said substrate sub-assembly is received in said cavity of the frame member but does not contact said floor portion of said cavity, and

(e) means for electrically connecting said semiconductor devices of said substrate sub-assembly to the electrical contacts on said perimeter frame member.

7. The semiconductor module according to claim 5, further comprising:

a heat sink in thermal communication with said semiconductor devices to conduct thermal energy therefrom.

8. The semiconductor module according to claim 1, wherein said semiconductor devices are removably mounted on said composite semiconductor substrate sub-assembly.

9. The semiconductor module according to claim 1, wherein said composite semiconductor substrate sub-assembly is removably attached to said frame.

10. The semiconductor module according to claim 1, further comprising a heat sink in thermal communication with said semiconductor devices to conduct thermal energy therefrom.

11. The semiconductor module according to claim 1, wherein said plurality of electrical contacts on said edge of said frame are adapted for insertion into a mating socket in a computer system.

12. The semiconductor module according to claim 11, wherein said plurality of semiconductor devices are memory devices.

13. The semiconductor module according to claim 1, wherein said plurality of semiconductor devices interact together to store data.

14. The semiconductor module according to claim 1, wherein said composite semiconductor substrate sub-assembly has a thickness ranging between 0.010 and 0.040 inches.

15. The semiconductor module according to claim 1, wherein said semiconductor module has a thickness of approximately 0.050 inches.

16. A semiconductor module comprising:

a frame having a floor member defining first and second cavities on opposite sides of said floor member;

a plurality of electrical contacts on an edge of said frame;

a first composite substrate comprising a cover plate and a circuit layer applied to said cover plate, said composite substrate having a plurality of semiconductor devices mounted thereon, wherein said composite substrate is attached to said frame such that at least a portion of said semiconductor devices are received in said first cavity of said frame;

a second composite substrate comprising a cover plate and a circuit layer applied to said cover plate, said composite substrate having a plurality of semiconductor devices mounted thereon, wherein said composite substrate is attached to said frame such that at least a portion of said semiconductor devices are received in said second cavity of said frame; and

electrical connecting means for electrically connecting said semiconductor devices on said first and second composite semiconductor substrate sub-assemblies to said electrical contacts on said edge of said frame.

17. The semiconductor module of claim 16, wherein said cover plate is in thermal communication with said semiconductor devices to conduct thermal energy therefrom.

18. The module of claim 1, wherein said composite substrate includes top and bottom surfaces and said semiconductor devices are mounted to said bottom surface; and

wherein said bottom surface of said composite substrate is attached to said frame such that said bottom surface faces said interior portion of said frame.

19. The module of claim 18, wherein said bottom surface of said composite substrate is attached to said frame such that at least a portion of said semiconductor devices are received in said interior portion of said frame, wherein said semiconductor devices do not contact said interior portion of said frame.

20. The module of claim 18, wherein said top surface of said composite substrate is external to the module.

21. The module of claim 1, wherein said means affixing said cover plate to said thin laminate circuit comprises a film adhesive positioned between said cover plate and said thin laminate circuit which bonds said thin laminate circuit to said cover plate.

22. The module of claim 1, wherein said thin laminate circuit includes windows to enhance thermal conduction from said semiconductor devices to said cover plate.

23. The module of claim 1, wherein said laminate circuit includes thermal vias to enhance thermal conduction from said semiconductor devices to said cover plate.

24. The module of claim 1, wherein said frame includes a stepped ledge in said interior portion; and

wherein said means to mount said substrate subassembly to said frame mounts said substrate subassembly to said stepped ledge of said frame.

25. The module of claim 24, wherein said means to mount said substrate subassembly to said frame comprises a rectangular ring including an anisotropic, electrically conducting material which mechanically and electrically connects said composite substrate and said frame.

26. The module of claim 1, wherein said semiconductor devices include one or more stacks of semiconductor devices mounted at various locations on said composite substrate.

27. The module of claim 1, wherein said plurality of electrical contacts on said frame are adapted for mating with a single in-line memory module socket.

28. The module of claim 1, wherein said frame and said plurality of electrical contacts disposed on said frame are adapted for mating with a single in-line memory module socket.

29. A thin multichip module, comprising, in combination:

a frame defining an interior portion;

a plurality of electrical contacts disposed on said frame;

a composite substrate comprising a cover plate portion having heat dissipation capabilities, a thin laminate circuit, and means affixing said cover plate to said thin laminate circuit;

semiconductor devices mounted on said composite substrate to form a substrate subassembly, wherein said semiconductor devices are in electrical connection with said laminate circuit and in thermal proximity to said cover plate; and

mounting means for mounting said composite substrate to said frame whereby at least a portion of said substrate assembly is maintained within said interior portion of the frame and the substrate subassembly is in electrical communication with said electrical contacts on said frame.

30. The thin multichip module of claim 29, wherein said mounting means mounts said composite substrate to said frame whereby a portion of said semiconductor devices are received in, but do not contact, said interior portion of said frame.

31. A thin multichip module, comprising, in combination:

a frame defining an interior portion;

a plurality of electrical contacts disposed on said frame;

a composite substrate comprising a cover plate portion having heat dissipation capabilities and a thin laminate circuit attached to said cover plate portion, wherein said composite substrate is attached to said frame, and wherein the laminate circuit is in electrical communication with said electrical contacts on said frame;

semiconductor devices mounted on said composite substrate such that portions of said semiconductor devices are maintained within said interior portion of the frame, wherein said semiconductor devices are in electrical connection with said laminate circuit and in thermal proximity to said cover plate.

32. The thin multichip module of claim 31, wherein said semiconductor devices do not contact said interior portion of said frame.

33. A semiconductor module comprising:

a frame having a member defining first and second cavities on opposite sides of said member;

a plurality of electrical contacts on an edge of said frame;

a first composite semiconductor substrate subassembly having a plurality of semiconductor devices mounted thereon, wherein said first composite semiconductor substrate subassembly is received in said first cavity of said frame and wherein said first composite semiconductor substrate subassembly has a thickness ranging between 0.010 and 0.040 inches;

a second composite semiconductor substrate subassembly having a plurality of semiconductor devices mounted thereon, wherein said second composite semiconductor substrate subassembly is received in said second cavity of said frame and wherein said second composite semiconductor substrate subassembly has a thickness ranging between 0.010 and 0.040 inches; and

electrical connecting means for electrically connecting said semiconductor devices on said first and second composite semiconductor substrate sub-assemblies to said electrical contacts on said edge of said frame.

34. A thin multichip module, comprising, in combination:

a frame having a member defining first and second interior portions;

a plurality of electrical contacts disposed on said frame;

first and second composite substrates each comprising a cover plate portion having heat dissipation capabilities and a thin laminate circuit affixed to said cover plate portion;

semiconductor devices mounted on said first and second composite substrates to form first and second substrate subassemblies, wherein said semiconductor devices are in electrical connection with said laminate circuit and in thermal proximity to said cover plate;

first attaching means to attach said first composite substrate to said frame whereby at least a portion of said first substrate assembly is maintained within said first interior portion of the frame and the substrate subassembly is in electrical communication with said electrical contacts on said frame; and

second attaching means to attach said second composite substrate to said frame whereby at least a portion of said second substrate assembly is maintained within said second interior portion of the frame and the substrate subassembly is in electrical communication with said electrical contacts on said frame.

35. The module of claim 34, wherein said semiconductor devices mounted to said first composite substrate are received in said first interior portion of said frame and wherein said semiconductor devices mounted to said second composite substrate are received in said second interior portion of said frame.

36. The module of claim 35, wherein said semiconductor devices mounted to said first and second composite substrates do not contact said member of said frame.

37. The module of claim 35, wherein said first and second composite substrates each include top and bottom surfaces, wherein said semiconductor devices are attached to said bottom surfaces of each of said first and second composite substrates, and wherein said bottom surfaces of said first and second composite substrates face said first and second interior portions, respectively.

FIELD OF INVENTION

The present invention relates generally to means for encapsulating microelectronic devices. More specifically, the present invention provides an improved module for significantly increasing the packaging density of microelectronic components.

BACKGROUND

The electronics industry has a continuing goal of increasing component packaging density in an effort to obtain increased functionality and consequent performance in smaller volumetric size. The principal roadblocks in meeting this goal have been the lack of industry standards for form factors and a flexible design which can be adapted to differing device types. Another significant impediment to increased packaging density has been the lack of a efficient means for dissipation of thermal energy generated by the devices.

One of the largest microelectronic device module markets is that related to dynamic random access memories (DRAM's). Since its introduction in 1983, the Single In-Line Memory Module or SIMM, disclosed generally in U.S. Pat. Nos. 4,656,605 and 4,727,513, has grown to become the preferred module configuration for the DRAM semiconductor market. Among the advantages offered by the SIMM are the following: (1) its significant packaging density increase achieved over prior chip mounting configurations, (2) the convenience for modular replacement or upgrade, and (3) availability of multiple, low-cost manufacturing sources.

A continuing industry trend towards increasing performance and smaller size, however, foreshadows the need for an even more compact module than the present SIMM is able to provide. The quest for ever faster data processing and more compact, light weight, portable electronic products necessitates newer semiconductor packaging schemes that enable aggregate assemblages of bare silicon devices to be interconnected together and mechanically protected inside a thin, lightweight module. Because of the handling difficulty and expense associated with repairing or replacing bare silicon chip devices, there is a need for an improved multichip module which meets the need for increased packaging density while maintaining minimum expense. This present invention, described in greater detail below, seeks to satisfy this need within the electronic industry.

Though semiconductor memory devices occupy the vast majority of the module market today, there is also a growing requirement to modularize other semiconductor components including, but not limited to, microprocessor, application specific integrated circuits, telecommunication and other device types. Accordingly, the present invention provides an upgrade path for a greater number of interconnect pins/pads and improves the thermal dissipation characteristics over present day microelectronic device modules.

SUMMARY OF THE INVENTION

The improved semiconductor module of the present invention is broadly comprised of a molded frame and a composite semiconductor substrate subassembly received in a cavity in said frame. The composite semiconductor substrate subassembly comprises a plurality of semiconductor devices which are connected to electrical contacts on an edge of the molded frame by a variety of configurations described herein.

In one embodiment of the invention, the composite semiconductor substrate subassembly includes a composite substrate which comprises a thin metal cover plate and thin laminate circuit which is bonded to the metal cover plate by a film adhesive. The composite substrate provides a mounting surface for the placement of semiconductor devices and their associated passive components. In some of the embodiments disclosed herein, the composite semiconductor substrate sub-assembly, comprising a cover plate with the composite substrate attached thereto, is attached to the molded frame by a rectangular ring formed from an anisotropic, electrically conductive adhesive material. The composite substrate employed in the present invention offers the advantage of allowing the components to be pre-assembled, tested and repaired prior to final attachment into the molded frame.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a exploded view of the major components of a first embodiment of the thin multichip module of the present invention.

FIGS. 2A-2B are, cross-sectional views taken along lines 2A--2A of FIG. 1 showing details relating to electrical contacts of the molded frame of the present invention.

FIG. 3 is a detailed view of the electrical contacts of the molded frame of the present invention.

FIGS. 4A-4D show details relating to individual contact elements employed in the multi-chip module of the present invention.

FIGS. 5A-5C show details relating to alternate embodiments of individual contact elements employed in the multi-chip module of the present invention.

FIGS. 6A-6C show details relating to further alternate embodiments of individual contact elements employed in the multi-chip module of the present invention.

FIGS. 7A-7B show alternate embodiments of edge mount clips for electrical contacts on the molded frame of the present invention

FIGS. 8A-8B illustrate an alternate embodiment of the present invention comprising an overmolded composite semiconductor substrate assembly.

FIG. 9 is a exploded view of the major components of an alternate embodiment of the thin multichip module of the present invention.

FIGS. 10A-10B illustrate thermal dissipation features of the composite semiconductor substrate of the present invention.

FIG. 11 illustrates thermal dissipation features of the cover plate of the composite semiconductor substrate of the present invention.

FIG. 12 illustrates an implementation of stacked memory chips for use in the composite semiconductor substrate assembly of the present invention.

FIG. 13 is a exploded view of the major components of an alternate embodiment of the thin multichip module of the present invention comprising multiple composite semiconductor substrate assemblies.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment of the. multichip module 10 of the present invention can be understood by referring to FIG. 1, which is an exploded view of the major components of the module. A molded frame assembly 12 comprises an internal cavity 14 which extends over a substantial portion of the length and width of the module to provide a nesting area for the electronic components in the finished module assembly. The molded frame 12 can be manufactured from an injection molded, thermoplastic material such as a liquid crystal polymer (LPC) or "Ryton.TM.". Both of these materials allow consistent and repeatable control over the dimensions of the molded frame 12. However, it should be obvious to one versed in the art, that several other materials may be substitute without departing from the scope or spirit of this invention. For example, the molded frame 12 may also be constructed from single or multiple laminate layers of epoxy glass materials (similar in composition to conventional PCB products) which have been shaped by stamping, pressing or machining processes to produce features similar in function to those described above. Alternatively, the molded frame 12 may be formed from one of several ceramic based materials processed though a firing kiln or hydraulic press by techniques well known within the industry.

Referring to FIG. 1 it can be seen that the molded frame 12 comprises first and second major parallel planes, illustrated by reference numerals 16 and 18, respectively, that are separated by a specified edge thickness illustrated by reference numeral 20. An array of contact pads 22 along one edge of the frame 12 provides electrical connection between the semiconductor devices contained within the interior of the module and an appropriate mating socket. In the embodiment illustrated in FIG. 1, the frame 12 is provided with two optional end holes 24 and a corner notch 26. These features are used for proper mating of the module to presently available SIMM sockets supplied by several connector manufacturers.

The internal cavity 14 may extend either partially or completely through the edge thickness 20, depending upon the spacing requirements of the components contained in the module. Although it is possible to construct the frame to have a single internal cavity, it is possible to also create first and second internal cavities by forming a thin, integrally molded floor 28 positioned along the centerline of the module thickness. Two possible embodiments of the molded floor 28 are illustrated in FIGS. 2A and 2B. In FIG. 2A, which is taken along section lines 2A-2A of FIG. 1, the floor 28 is shown molded flush to the second major plane 18. In the embodiment illustrated in FIG. 2B, however, the floor 28 is shown along the centerline of the module thickness to form first and second internal cavities in the interior of the module.

A stepped ledge 30 is formed around the circumference of the cavity 14 or cavities to provide a receiving area for the mating composite semiconductor substrate assembly 32 described in greater detail below. In the preferred embodiment, the ledge 30 is recessed below either the first major plane 16 or the second major plane 18 such that after the cover plate subassembly 32 is positioned and sealed in place, the outer surfaces of the subassembly 32 and the molded frame 12 are substantially flush to one another. Alternatively, the ledges may be simple extensions of major plane 16 and/or major plane 18, as illustrated in FIG. 2B, placing the composite semiconductor substrate assembly 32 further away from the center line of the module thickness, thus allowing more spacing for internal components. In this embodiment, the cover plate sub-assembly 32 would project a short distance above major plane 16 and/or major plane 18.

The array of contact pads 22 on the edge of the molded frame 12 provide electrical connection from the external surface edge of the module to an interior stepped ledge 30 of the module cavity 14 or cavities. Arrayed across the interior stepped ledge 30 is a multiplicity of smaller termination pads 34, each electrically paired with an associated external contact pad 22. In one embodiment of the invention, each of the contact pads 22 and termination pads 34 are formed by a selective plating process that deposits a conductive metal pattern extending from the edge of the molded frame 12, across the surface of the frame, and down a vertical wall or inclined plane 36, as shown in FIG. 2A and 3, to the surface of the ledge 30 lying a short distance below the first major plane 16 and/or the second major plane 18. Similarly positioned pairs of contact pads 22 and termination pads 34 on the opposite planes of the molded frame 12 can be electrically connected by a shunt 21 across the lower edge of the frame 12, as illustrated in FIG. 2B, or left electrically isolated.

Post molded plating techniques that may be commonly employed to produce the multi-leveled path of electrical conduction include, but are not restricted to, electrolytic or electroless plated copper, nickel, gold, or tin/lead alloys. These and other pure metals and alloys may be selectively plated onto the selected portions of the molded frame 12 via surface treatment and masking techniques known and available within the molded PCB industry. Alternatively, various plating processes may be employed separately or combined with screen printable, metal filled inks to produce electrically conductive pads on ceramic or epoxy glass materials.

As the need arises for a greater number of signal and data in/out connections than can be accommodated by using conventional plating processes to reduce the contact pad-width 23 and contact-to-contact pad-pitch 25, as shown in FIG. 3, an increased signal path density can be obtained by integrally molding into frame 12 an array of stamped metal contacts or by inserting stamped metal contacts into receptacles pre-molded in the edge of the frame 12, as shown in FIG. 4D. The array of stamped metal contacts comprises a plurality of thin, substantially parallel plates that are closely spaced but electrically insulated from one another by encompassing mold material. These stamped metal contacts have exposed edges extending from the bottom edge of the molded frame 12 across the contact pad surface plane and across the interior stepped ledge on the interior of the frame. The edges of the stamped contacts are substantially flush with the surrounding molded surfaces or project slightly above, except in the area corresponding to the exposed edge of the composite semiconductor substrate sub-assembly 32 where the stamped contact would be recessed into the molded frame to avoid undesirable electrical contact and structur