Full-wave rectifying circuit having only one differential pair circuit with a function for combining a pair of half-wave rectified currents into a full-wave rectified current
In a full-wave rectifying circuit comprising a differential amplifier (20) differentially amplifies an input alternating current signal (V.sub.IN) to produce first and second amplified output voltages (V.sub.O1, V.sub.O2) and a voltage reference circuit (30) for generating a reference voltage (V.sub.REF), a differential pair circuit (40) carries out half-wave rectification on the first and the second amplified output voltages on the basis of the reference voltage to obtain first and second half-wave rectified currents (I.sub.C3, I.sub.C4). The differential pair circuit (40) includes a combining part (44) for combining the first and the second half-wave rectified currents into a full-wave rectified current (I.sub.RO). The full-wave rectifying circuit may further comprise a current/voltage converting section (50) for converting the full-wave rectified current into a full-wave rectified voltage (V.sub.RO).
A rectifier circuit is described, which comprises an arrangement of a first, a second and a third transistor, emitters of said transistors being coupled together at a first junction point and to a terminal of a first constant current source and in which arrangement collectors of the first and the second transistor are coupled together at a second junction point, a current mirror arrangement having a predetermined mirror ratio, an input of said current mirror being coupled to the second junction point and an output of said current mirror being coupled to a collector of the third transistor at a third junction point, wherein an input voltage, by which the collector-emitter currents of the first and/or the second transistor are controllable, can be supplied to the rectifier circuit bia bases of the first and/or the second transistor, while an output voltage can be taken from the base of the third transistor of the rectifier circuit and the output voltage at least substantially corresponds to the rectified input voltage, and the first, the second and the third transistor have predetermined emitter regions. To provide a rectifier circuit of a simple structure, ensuring an at least substantially linear signal processing also in the range of its working point, the rectifier circuit according to the invention comprises a complementary current stage, which is controllable by the output voltage and supplies at least a complementary current to the input and/or output of the current mirror arrangement, said complementary current corresponding for all values of the output voltage at least substantially to the lower value of the collector-emitter currents of the first and the second transistor.
In an isolator circuit, a first differential pair circuit compares voltages of two input signals with each other, and, in accordance with the ratio of the voltages, currents flow through two resistors respectively connected to two output terminals of the first differential pair circuit. A current comparison circuit compares the currents respectively flowing through the two resistors, and outputs a voltage corresponding to a result of the comparison. A second differential pair circuit compares the voltage output from the current comparison circuit with a reference voltage, and a negative feedback is conducted so that the currents flowing through the two resistors are equal to each other. Unlike the conventional art, an isolator circuit can be configured without disposing buffer circuits.
In a circuit arrangement for rectifying a signal, in which two transconductors are controllable with opposite phase by means of the signal to be rectified, the outputs of the transconductors are connected to a first circuit point via a first diode and to a second circuit point via a second diode having an opposite polarity with respect to the first diode. The circuit points are connected to a predetermined potential. A rectified signal can be derived from at least one of the circuit points.
A signal voltage detection circuit is provided to include a differential amplifier a differential amplifier having first and second driver transistors to which a reference voltage and a signal voltage to be detected are input respectively, a current mirror circuit configured to generate an output current corresponding to a detection output of the differential amplifier, a current-to-voltage conversion circuit configured to convert a change in the output current of the current mirror circuit into a voltage and for outputting the voltage converted, a latch circuit to which an output of the current-to-voltage conversion circuit is transferred and in which the output is held, and a capacitive load element connected to an input node of the current-to-voltage conversion circuit.
A peak detector circuit (100) includes an output transconductance amplifier (102), a current rectifier (104) and an averaging circuit (108). The current rectifier includes an amplifier (115) which reduces input impedance of the current rectifier to increase the operating frequency of the peak detector circuit. An isolator (106) employs a current mirror (509) with a cascode transistor (512) having a bias potential which is dynamically adjusted to achieve accurate mirroring. An amplifier of a common mode feedback circuit (110) has improved linearity.