Display panel driving method and display apparatus

What is claimed is:

1. A display apparatus comprising:

a display panel for performing gradation display by applying a voltage across a pair of electrodes; and

a voltage source for outputting a first voltage changing from a predetermined first potential to a second potential higher than the predetermined first potential, at intervals of a predetermined period, and a second voltage changing from the second potential to a third potential higher than the second potential, at intervals of the predetermined period, and applying one of the predetermined first potential and a potential lower than the predetermined first potential, or one of the third potential and a potential higher than the third potential, to a first electrode of the pair of electrodes of the display panel by switching at intervals of a multiple of the predetermined period; and a source driver supplied with the first and second voltages that applies one to one of the first and second voltages to a second electrode of the pair of electrodes.

2. The display apparatus of claim 1, wherein the first and second voltages linear-functionally change in the predetermined period.

3. The display apparatus of claim 1, wherein the first and second voltages shift stepwise in one of a rise and drop direction in the predetermined period.

4. The display apparatus of claim 1, wherein the source driver includes two switching devices which are supplied with the first and second voltages from the voltage source, respectively, and whose outputs are supplied to the second electrode, and turns on one of the switching devices, selected in accordance with gradation display data.

5. The display apparatus of claim 1, wherein the source driver includes driving means for sampling a voltage selected from the first and second voltages on the basis of data for performing gradation display at intervals of the predetermined period.

6. The display apparatus of claim 1, wherein the source driver includes

a shift register that sequentially delivers a plurality of memory control signals to a plurality of source limes respectively,

a data memory that stores a gradation display data in response to the memory control signals;

a selector that receives an AC-converting signal and converts the gradation display data based on a level of the AC-converting signal,

a subtraction counter that receives a hold signal and stores and latches the gradation display data output from the selector corresponding with the source lines based on the hold signal;

a detection decoder that receives an output signal from the subtraction counter and delivers a predetermined signal based on the output signal, and

a switch circuit that receives the predetermined signal and the first and second voltages and outputs voltages corresponding to the gradation display data at intervals of the predetermined period.

7. The display apparatus of claim 6, wherein the selector includes a plurality of selector circuits, each selector circuit receiving an element of the gradation display data and an inverted signal of the AC-converting signal.

8. The display apparatus of claim 6, further comprising a discharge circuit that receives a discharge signal and one of the first and second voltages, the discharge circuit including an analog switch having an input terminal connected between the switch circuit and an output terminal of the source driver.

9. The display apparatus of claim 1, wherein the display panel includes a low-pass filter connected to the source driver via a source line, the low-pass filter having a resistor connected to a capacitance of the source line and an equivalent capacitance of the second electrode that is smaller than the capacitance of the source line.

10. The display apparatus of claim 1, further comprising a display control that sequentially supplies a gradation display data to the source driver.

11. The display apparatus of claim 10, wherein the display control supplies a clock signal, a hold signal, a gradation clock signal, a start pulse signal and an AC-converting signal to the source driver.

12. The display apparatus of claim 11, further comprising a gate driver that supplies a plurality of gate signals to a plurality of gate lines connected to a plurality of pixels switching devices.

13. A method of driving a display panel for performing m-level gradation display (m: an integer of 2 or more) by application of a voltage across a pair of electrodes through a dielectric layer disposed therebetween, the method comprising the steps of:

dividing a range from a predetermined low potential to a high potential higher than the predetermined low potential into n potential segments (n: an integer divisor of m excluding 1 and m) and creating first to nth voltages changing from the predetermined low potential to the high potential, or from the high potential to the predetermined low potential, in each of the n potential segments in a predetermined period;

applying one of the predetermined low potential and a potential lower than the predetermined low potential, or one of the high potential and potential higher than the high potential to a first electrode of the display panel by switching at intervals of a multiple of the predetermined period; and

selecting a voltage corresponding to a number of gradation levels for a desired display from among the first to nth voltages changing from predetermined low potential to the high potential, on the basis of the potential applied to the first electrode, applying the selected potential to a second electrode, and holding the voltage across the first electrode and the second electrode at the dielectric layer to perform gradation display.

14. The method of driving a display panel of claim 13, wherein the first to nth voltages change linear- functionally in the n potential segments.

15. The method of driving a display panel of claim 13, wherein the first nth voltages rise or drop in m/n steps in the potential segment.

16. A display apparatus comprising:

a display panel in which drive voltages supplied to a plurality of pixel electrodes disposed at intersections of a plurality of first and second lines arranged in a matrix from via the first lines, are supplied via a plurality of pixel switching devices turned on by a pixel control signal supplied via the second lines, and a constant reference voltage is applied to a common electrode disposed facing opposite to the pixel electrodes, whereby potential differences are obtained between the pixel electrodes and the common electrode to perform a gradation display; second line driving means for sequentially supplying the pixel control signal to the second lines in a plurality of predetermined horizontal scanning periods to turn on the pixel switching devices connected to the second lines;

a voltage source for generating a voltage which one of rises and drops stepwise with time in each horizontal scanning period, wherein

the voltage source generates:

a first voltage which one of rises stepwise from a predetermined first potential to a second potential higher than the predetermined first potential, and drops stepwise from the second potential to the predetermined first potential, and

a second voltage which one of rises stepwise from the second potential to a third potential higher than the second potential, and drops stepwise from the third potential to the second potential, and wherein

one of the predetermined first potential and one of the third potential and a potential higher than the third potential is applied as the constant reference voltage to the common electrode by switching at intervals of a predetermined period; and

first line driving means for applying one of the first and second voltages in accordance with a gradation display data to the pixel electrodes via respective first lines in the horizontal scanning period.

17. The display apparatus of claim 16, wherein

the first driving means includes:

gradation display generation means for delivering the gradation display data in serial bits sequentially for each of the first lines in the horizontal scanning period;

a data latch circuit that delivers the gradation display data in parallel bits from the gradation display data generation means while latching the gradation display data in each horizontal scanning period;

gradation clock signal generation means for sequentially generating gradation clock signals having a higher number than a number of gradation levels used for the gradation display, in each horizontal scanning period;

first and second voltage application switching devices disposed between the voltage source and the pixel electrodes and supplied with the first and second voltages, respectively; and

switching control means for applying voltages to the pixel electrodes by turning on and off the voltage application switching means in response to outputs of the data latch circuit after a lapse of time corresponding to the gradation display data,

the switching control means including a subtraction counter, wherein a value corresponding to the gradation display data is set and the value is subtracted each time the gradation clock signal is received, and controlling the on/off operation of the first and second voltage application switching devices when the value of the subtraction counter reaches predetermined value.

18. The display apparatus of claim 16, wherein the first and second voltage application switching devices are analog switches.

19. The display apparatus of claim 17, wherein

the first and second voltage application switching devices are P-channel type MOS transistor in the case where the first and second voltages which rise stepwise are supplied, and are N-channel type MOS transistors in the case where the first and second voltages which drop stepwise are supplied.

20. The display apparatus of claim 17, wherein

an analog switch which is turned on at the end of each horizontal scanning period to supply the second potential to the pixel electrodes is disposed between the first and second potential application switching devices and pixel electrode.

Description Submit all comments and votes

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method for driving a display panel, such as an active matrix type liquid crystal display panel, and also relates to a display apparatus.

2. Description of the Related Art

A first prior art, that is, a typical prior art, is shown in FIG. 20. In an active matrix type liquid crystal display panel 11 constituting a display apparatus 10, source lines O1 to ON and gate lines L1 to LM are formed in a matrix. At each intersection of the lines, a thin film transistor T is disposed. Voltages at the source lines O1 to ON are selectively supplied to pixel electrodes P via the transistors T.

The source lines O1 to ON are connected to a source driver 12 formed by a semiconductor integrated circuit. In accordance with display data D0 to D2 of the respective bits of 3-bit display data corresponding to each source line Ok (k=1 to N) , the source driver 12 supplies one of eight reference voltages V0 to V7 supplied from a reference voltage source 13 to the source lines O1 to ON via terminals S1 to SN. (Hereinafter, display data of one bit, which is a component of n-bit display data, is described as a display data element.) A gate driver 14 formed by a semiconductor integrated circuit delivers gate signals G1 to GM to gate lines L1 to LM. In a single horizontal scanning period, the source driver 12 supplies a reference voltage, which is generated in accordance with the display data elements D0 to D2 and corresponds to each pixel electrode P supplied with a gate signal Gj (j=1 to M), to the source line Ok.

FIG. 21 is a block diagram specifically showing a partial constitution of the source driver 12 of the first prior art shown in FIG. 20. The source driver 12 is provided with decoder circuits FRk (k=1 to N) corresponding to the source lines O1 to ON, respectively. In response to data d0 to d2 corresponding to the display data elements D0 to D2, respectively, the source driver 12 selects and supplies one of eight different reference voltages V0 to V7 from the reference voltage source 13, to a source line Ok via analog switches ASW0 to ASW7 so as to offer eight-level gradation display. In the first prior art shown in FIGS. 20 and 21, reference voltages V0 to V7 individually corresponding to the gradation levels are supplied to the source driver 12 from the reference voltage source 13. The source driver 12 requires connection terminals supplied with the reference voltages V0 to V7 and the number of the connection terminals is the same as that of the reference voltages. In addition, the source driver 12 also requires the analog switches individually corresponding to gradation levels so as to output the reference voltages.

The on-time resistances of the analog switches ASW0 to ASW7 in the source driver 12 must be sufficiently low so that the levels of the selected reference voltages V0 to V7 are accurately written at the source lines O1 to ON of the display panel 11 externally connected to the source driver 12. Accordingly, the area occupied by the analog switches ASW0 to ASW7 in the semiconductor chip of the source driver 12 is larger generally more than ten times to several tens of times than that occupied by the logic circuit devices on/off-controlled for logic operation in the source driver 12.

Because of the above-mentioned reasons, the ratio of the area occupied by the analog switches ASW0 to ASW7 to the total area occupied by the source driver 12 is large. Consequently, the increase of analog switch in number, caused by increase in gradation level leads directly to increase in size of the semiconductor chip on which the source driver 12 is formed.

These days, such a semiconductor chip in which the source driver 12 or the like is formed is desired to be miniaturized to reduce production cost. To miniaturize the chip, an attempt has been taken place to miniaturize terminals for supplying signals, voltages and the like. However, there is a limit in miniaturizing the terminals themselves. For further miniaturization, for example, it is necessary to reduce the number of connection terminals. Furthermore, the semiconductor chip in which the source driver 12 made of semiconductor integrated circuit is formed can be miniaturized by reducing the number of analog switches.

To perform 16-level gradation display in the first prior art by using 4-bit display data, for example, connection terminals for supplying 16-different reference voltages are required. In addition, 16 analog switches corresponding to the reference voltages are required in total. In reality, the mass production of the source driver 12 for display in more gradation levels, such as 64 and 256 levels, has become impossible.

A second prior art has been disclosed in Japanese Unexamined Patent Publication JP-A 4-214594, wherein such a semiconductor chip is miniaturized by reducing the number of connection terminals supplied with reference voltages and also by reducing the number of analog switches. FIG. 22 shows a schematic configuration of the display apparatus disclosed in the above-mentioned patent publication.

One of a pair of LCD substrates, between which a liquid crystal layer is disposed, is provided with pixel electrodes 16, drain lines 17, gate lines 18, and switching devices 19 which are disposed at the intersections of the drain lines 17 and the gate lines 18 and supplies the voltages developed on the drain lines 17 to the pixel electrodes 16. The other substrate is provided with data electrodes 20 for each row, extending in the vertical direction in FIG. 22.

A scanning circuit 21 supplies control pulses to the gate lines 18 to perform sequential scanning. Within each horizontal scanning period, a reference gradation signal having a voltage changing regularly is applied to the pixel electrodes 16 via the drain lines 17. In other words, a ramp waveform voltage which rises or drops with time is commonly supplied to the drain lines 17 from a single reference gradation signal circuit 23 within a single horizontal scanning period.

A data signal is supplied to the data electrode 20 from a signal supply circuit 22. A voltage level is determined only in a period corresponding to a gradation level indicated by the data signal within a horizontal scanning period. In the remaining period, a high impedance state occurs. In other words, a voltage, the level of which is determined within only the period corresponding to the gradation level, is supplied to the data electrode 20. Accordingly, the gradation level is adjusted depending on the length of the period during which the voltage level at the data electrode has been determined.

In the above-mentioned second prior art, there is a great problem that a plurality of data electrodes 20 grouped for each row must be provided on the other substrate. The other substrate facing opposite to the pixel electrodes 16 of a liquid crystal display panel, which has been used widely in these days, has a single common electrode formed for all of the plurality of the pixel electrodes 16. Therefore, when executing the prior art, the display panel itself must be redesigned, which makes the execution of the prior art difficult.

Furthermore, in the second prior art, since the gradation level is held at the data electrodes 20 side, the auxiliary capacitances for data storage, which have been formed on the one of the substrates of the display panel, which has been used generally, cannot be utilized without modification. In addition, a third prior art has been disclosed in Japanese Unexamined Patent Publication JP-A 5-297833. A schematic configuration of the prior art is shown in FIG. 23. A shift register 27 controls the timing of writing input data composed of four bits for each of three colors R, G and B into a data register 28 in accordance with a clock signal CLK. When input data for a single line is written into the data register 28, the written data for the single line is transferred to a data latch circuit 29 in parallel and held.

The data held in the data latch circuit 29 are supplied to a comparison circuit 30 at a predetermined timing. In the comparison circuit 30, the data for each of the colors R, C and B from the data latch circuit 29 is compared with a 4-bit count value delivered from a 4-bit counter 31, and a result of the comparison is supplied to a selector-contained sample-and-hold circuit 32. To the selector-contained sample-and-hold circuit 32, in addition to the results of the comparison at the comparison circuit 30, stepwise waveform voltages VR, VB, the levels of which change in accordance with predetermined eight and two steps respectively, are supplied from stepwise waveform voltage generation circuits 33, 34 respectively.

The selector-contained sample-and-hold circuit 32 samples and holds the signals from the stepwise waveform voltage generation circuits 33, 34 depending on the results of the comparison at the comparison circuit 30 by using sample-and-hold capacitors contained in the selector-contained sample-and-hold circuit 32. An output buffer 35, supplied with a voltage VDD, delivers signal voltages depending on the charge voltage levels charged in the capacitors in the selector-contained sample-and-hold circuit 32, each signal voltage for each of the colors R, G and B, and supplies each signal voltage to the line of each column.

In the third prior art, the selector-contained sample-and-hold circuit 32 has the sample-and-hold capacitors. The potential due to the charge stored in each capacitor is outputted through a voltage follower by an operational amplifier provided for each line in the output buffer 35. Therefore, the outputs of the stepwise waveform voltage generation circuits 33, 34 are supplied only to the capacitors of the selector-contained sample-and-hold circuit 32, but not supplied directly to the lines of the display panel. Since the voltages amplified by the operational amplifiers provided in the output buffer 35 are supplied to the lines of the display panel, the voltages supplied to the lines are changed undesirably because of the variation in the characteristics of the operational amplifiers, which causes deterioration in display quality. The variation in the characteristics of the operational amplifiers occurs because of the existence of output voltage deviation due to the fluctuation of the input offset voltage, a narrow output voltage range due to the limited dynamic range of the operational amplifier, or the like, for example.

Additionally, a fourth prior art has been disclosed in Japanese Examined Patent Publication JP-B2 7-50389. FIG. 24 is a block diagram showing a configuration of an X driver 120 for driving source electrodes disclosed in the publication. FIG. 25 is a timing chart for signals used in the X driver 120.

A shift register 121 controls the timing of writing 4-bit data input signals PD1 to PD4 into the half latch 129 of a latch-A circuit 122 in accordance with a start pulse VSP and a clock signal XCL. The latch circuit 122 is provided with M groups of half latches 129 composed of four D-type flip-flops. When data is held in the M groups of half latches 129, the latch clock signal LCL shown in FIG. 25 is inputted to the half latches 130 of the latch-B circuit 123 to hold the data.

A 4-bit binary counter 124 is reset by a latch clock signal LCL and counts the number of pulses in the fundamental signal F16 for gradation shown in FIG. 25. The outputs QA to QD of the binary counter 124 and the outputs of the half latch 130 are inputted to each of M pieces of comparators 138 in a comparator 125, and a result of the comparison is supplied to an input D of a D-type flip-flop circuit 126 as an output signal Y shown in FIG. 25. The D-type flip-flop circuit 126 takes the output of the comparator 138 in synchronization with the rise of the fundamental signal F16 for gradation. The D-type flip-flop circuit 126 is set by the latch clock signal LCL and reset by a stop signal STOP. The output of the D-type flip-flop circuit 126 is raised to a voltage capable of driving analog switches 128 by a level shifter 127.

The analog switches 128 are supplied with the video voltage VID shown in FIG. 25 and are on/off-controlled by the outputs of the level shifter 127. The video voltage VID changes linearly from the off-level voltage VOFF to the on-level VON of the liquid crystals in a single horizontal scanning period TH.

By the on/off control operation of the analog switch 128, the video voltage VID changing as described above is applied to a pixel electrode of the liquid crystal display panel via a source signal line as a voltage Vpix shown in FIG. 25. The level of the voltage Vpix at rise time ta of the fundamental signal F16 for gradation after the output signal Y is lowered is held until time tb when the horizontal scanning period TH ends.

In the fourth prior art, since the video voltage VID supplied to the source electrode via the analog switch 128 has a linear sawtooth waveform, when the output signal timing of the comparator 138 is deviated slightly, a desired voltage cannot be held, but a voltage obtained at a slightly deviated timing is held. This voltage difference degrades display quality.

Furthermore, in all the above-mentioned prior arts, the charges stored in the liquid crystal element are not discharged. This causes a problem that the charges stored at the preceding display timing remain in the liquid crystal element, whereby the voltage with which the liquid crystal element is charged does not coincide with the voltage indicated by gradation display data. For example, after display was performed by applying a high voltage to the liquid crystal element, when display is attempted at the next display timing by applying a voltage which is lower than that applied at the preceding display timing, the charges stored in the preceding display timing remain unless the charges held in the liquid crystal element are discharged. This may reduce the display quality of the liquid crystal display panel.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a display panel driving method and a display apparatus, wherein a semiconductor chip, such as a source driver, can be made smaller in size, lower in power consumption and higher in packaging density by reducing the number of connection terminals and the number of analog switches while ensuring multiple-level gradation.

Another object of the invention is to provide a display panel driving method and a display apparatus, wherein a commonly used display panel is provided with a plurality of pixel electrodes disposed on one of two substrates and also provided with a single common electrode disposed on the other substrate facing opposite to the former substrate through a dielectric layer such as a liquid crystal layer, sandwiched therebetween, is used without modification, and wherein the number of connection terminals and the number of analog switches can be reduced as described above.

Still another object of the invention is to provide a display panel driving method and a display apparatus, wherein complicated circuit structures such as operational amplifiers as used in the prior art and shown in FIG. 23 are not used, deterioration in display quality due to variation in characteristics of such semiconductor devices can be prevented, and semiconductor chips such as a source driver and the like can be made smaller in size and lower in power consumption.

The invention provides several embodiments of a display apparatus including

a display panel for performing gradation display by applying a voltage across a pair of electrodes, and

a voltage source for outputting a first voltage changing from a predetermined first potential to a second potential higher than the first potential, at intervals of a predetermined period, and a second voltage changing from the second potential to a third potential higher than the second potential, at intervals of the predetermined period. The voltage applies the first potential or a potential lower than the first potential, or applies the third potential or a potential higher than the third potential, to one electrode of the pair of electrodes of the display panel by switching at intervals of the predetermined period or at intervals of a period plural times the predetermined period. The display apparatus also includes a

driving device used for receiving the first and second voltages, sampling one of the first and second voltages selected on the basis of data for performing gradation display at intervals of the predetermined period, and applying the sampled voltage to the other electrode of the pair of electrodes.

Furthermore, the first and second voltages of the invention change linear-functionally in the predetermined period.

Furthermore, the first and second voltages of the invention build up or drop stepwise in the predetermined period.

According to a preferred embodiment of the invention, the driving device applies a potential corresponding to gradation display data from among potentials in the changeable ranges of the first and second voltages which rise or drop stepwise with time, supplied from the voltage source, to the other electrode of the display panel. The driving means also applies the first potential or a potential lower than the first potential, applies or the third potential or a potential higher than the third potential selected by switching at intervals of a predetermined period or multiple number of periods to one electrode in order to perform gradation display on the display panel. Therefore, it is acceptable that the potential corresponding to the gradation display data is a potential included in the first or second voltage, and the differences in the changing potentials of the first and second voltages in each period can be reduced. A desired potential can thus easily be applied to the display panel to perform gradation display. In addition, when the first and second voltages change stepwise, a period having a certain potential can be taken relatively long. Consequently, the potential corresponding to the gradation display data can easily be applied to the other electrode to perform gradation display.

Furthermore, the driving device can include two switching devices which are supplied with the first and second voltages from the voltage source, respectively, and whose outputs are supplied to the other electrode in common, and turns on one of the switching devices, selected in accordance with gradation display data.

According to an embodiment of the invention, the switching devices respectively supplied with the first and second voltages are disposed between the voltage source and the other electrode of the display panel, and the driving device controls the on/off operation of the switching devices in accordance with gradation display data. Accordingly, one of the switching devices is turned on in accordance with the gradation display data, and one of the voltages supplied to the switching device is supplied to the other electrode. As a result, a desired potential can be applied to the other electrode without being affected by the other voltage.

Furthermore, the invention provides a method of driving a display panel for performing m-level gradation display (m: an integer of 2 or more) by application of a voltage across a pair of electrodes through a dielectric layer disposed therebetween, the method including

dividing a range from a predetermined low potential to a potential higher than the low potential into n potential segments (n: a divisor of m excluding 1 and m) and creating first to nth voltages changing from the lowest potential to the highest potential, or from the highest potential to the lowest potential, in each potential segment in a predetermined period. The method also includes

applying the low potential or a potential lower than the low potential, or the high potential or a potential higher than the high potential to the other electrode of the display panel by switching at intervals of the predetermined period or at intervals of a period plural times the predetermined period. A potential is selected corresponding to a number of gradation levels for desired display from among the potentials changing in the range of the first and nth voltages, on the basis of the potential applied to the one electrode, applying the selected potential to the other electrode, and holding the voltage across the one electrode and the other electrode at the dielectric layer to perform gradation display.

Furthermore, in the invention, the first to nth voltages change linear-functionally in the potential segment.

Furthermore, in the invention, the first to nth voltages rise or drop in m/n steps in the potential segment.

According to the invention, the low potential or a potential lower than the low potential, or the high potential or a potential higher than the high potential is applied to the one electrode by switching at intervals of a predetermined period or at intervals of a multiple period of the predetermined period, and among the first to nth voltages with potentials changing with time, a potential at a certain time. The potential corresponds gradation display data is applied to the other electrode to perform gradation display on the display panel. Therefore, it is acceptable that the potential corresponding to the gradation display data is a potential included in one of the first to nth voltages changing at intervals of the predetermined period. Therefore, the differences in the changing potentials of the first to nth voltages in each period can be reduced. A desired potential can thus easily be applied to the other electrode to perform gradation display. In addition, when the first to nth voltages change stepwise, a period having a certain potential can be taken relatively long. Consequently, the potential corresponding to the gradation display data can be easily applied to the other electrode to perform gradation display.

Furthermore, an other embodiment of the invention provides a display apparatus including

a display panel in which drive voltages supplied to pixel electrodes disposed at intersections of first and second lines arranged in a matrix form, via first lines, are supplied via pixel switching devices turned on by a pixel control signal supplied via the second lines. A and a constant reference voltage is applied to a common electrode disposed facing opposite to the pixel electrodes, whereby potential differences are obtained between the pixel electrodes and the common electrode to perform gradation display . The display apparatus of this embodiment also includes a--;

second line driving device for sequentially supplying the pixel control signal to the second lines in a plurality of predetermined horizontal scanning periods to turn on the pixel switching devices connected to the second lines, and

a voltage source for generating a voltage which rises or drops stepwise with time in each horizontal scanning period. The voltage source generates:

a first voltage which rises stepwise from a predetermined first potential to a second potential higher than the first potential, or drops stepwise from the second potential to the first potential, and

a second voltage which rises stepwise from the second potential to a third potential higher than the second potential, or drops stepwise from the third potential to the second potential.

The first potential or a potential lower than the first potential and the third potential or a potential higher than the third potential is applied as the constant reference voltage to the common electrode by switching at intervals of a predetermined period; and

the first line driving device applies one of the changing potentials of the first and second voltages in accordance with gradation display data to pixel electrodes via the respective first lines in the horizontal scanning period.

According to the invention, the first line driving device applies a predetermined potential selected from the first and second voltages which rise and drop stepwise with time and supplied from the voltage source to the pixel electrodes via the first lines of the display panel in accordance with gradation display data in a horizontal scanning period. In addition, the second line driving device sequentially supplies the pixel control signal to the second lines of the display panel in each horizontal scanning period to turn on the pixel switching devices. Furthermore, the common electrode is supplied with the first potential or a potential lower than the first potential and the third potential or a potential higher than the third potential by switching at intervals of a predetermined period. Gradation display is performed by a voltage generated owing to the potential applied between the common electrode and the pixel electrodes. Therefore, it is acceptable that the potential corresponding to the gradation display data is a potential included in one of the first and second voltages. Consequently, the differences in the changing potentials of the first and second voltages in a single horizontal scanning period can be reduced. A desired potential can thus easily be applied to the pixel electrodes via the first lines of the display panel to perform gradation display.

Furthermore, in the invention, the first line driving device includes:

a gradation display data generation device for delivering gradation display data in serial bits sequentially for each first line in the horizontal scanning period,

a data latch circuit for delivering gradation display data in parallel bits from the gradation display data generation device while latching the data in each horizontal scanning period,

a gradation clock signal generation device for sequentially generating gradation clock signals, whose number is more than that of gradation levels to be used for gradation display, in each horizontal scanning period,

first and second voltage application switching devices disposed between the voltage source and the pixel electrodes and supplied with the first and second voltages, respectively, and

a switching control device for applying voltages to the pixel electrodes by turning on or off the voltage application switching device in response to outputs of the data latch circuit after a lapse of time corresponding to the gradation display data.

The switching control device includes a subtraction counter, wherein a value corresponding to gradation display data is set and the value is subtracted each time the gradation clock signal is received, and also controls the on/off operation of the first and second voltage application switching devices when the counted value of the subtraction counter reaches a predetermined value.

According to the invention, gradation display data generated sequentially from the gradation display data generation device are held and latched by the data latch circuit of the first line driving device in each horizontal scanning period, and then outputted to the switching control device. The gradation clock signals are supplied from the gradation clock signal generation device to the subtraction counter of the switching control device, and a value determined in accordance with gradation display data is subtracted sequentially. The switching control device controls the on/off operation of the first and second voltage application switching devices in accordance with the value of the subtraction counter. The first and second voltages which rise or drop stepwise are supplied to the first and second voltage application switching devices, and the potential in accordance with the gradation display data is applied to the pixel electrodes. Therefore, it is acceptable that the potential corresponding to the gradation display data is a potential included in one of the first and second voltages. Consequently, the differences in the changing potentials of the first and second voltages in a single horizontal scanning period can be reduced. A desired potential can thus easily be applied to the pixel electrodes via the first lines of the display panel to perform gradation display.

Furthermore, in the invention the first and second voltage application switching devices are analog switches.

According to the invention, since the first and second voltage application switching devices are analog switches, even when the first and second voltages rise or drop stepwise, a desired potential of the changing potentials of the first and second voltages supplied from the voltage source can easily be applied to the pixel electrodes via the first lines of the display panel to perform gradation display.

Furthermore, in the invention the first and second voltage application switching devices are P-channel type MOS transistors in the case where voltages which rise stepwise are supplied, and are N-channel type MOS transistors in the case where voltages which drop stepwise are supplied.

According to the invention, when the first and second voltages are voltages which rise stepwise, the voltage application switching devices which are supplied with the voltages are P-channel MOS transistors. When the first and second voltages are voltages which drop stepwise, the voltage application switching devices which are supplied with the voltage are N-channel MOS transistors. Therefore, the first and second voltage application switching devices can be transistors conductive in either direction, whereby the area of the devices for driving the display panel can be reduced. Furthermore, a desired potential of the changing potentials of the first and second voltages supplied from the voltage source can easily be applied to the pixel electrodes via the first lines of the display panel to perform gradation display.

Furthermore, in the invention an analog switch which is turned on at the end of each horizontal scanning period to supply the second potential to the pixel electrodes, is disposed between the first and second potential application switching devices and the pixel electrode.

According to the invention, the analog switch is turned on at the end of each horizontal scanning period and the second potential is supplied to the pixel electrodes. Therefore, the potential which was applied to the pixel electrodes in the preceding horizontal scanning period is changed to the second potential. Consequently, even when a potential to be applied to the pixel electrode varies significantly according to the horizontal scanning periods, the display quality on the display panel can be prevented from being degraded.

In particular, when the first voltage drops stepwise from the second potential to the first potential, when the first voltage application switching device is an N-channel MOS transistor, when the second voltage rises stepwise from the second potential to the third potential, and when the second voltage application switching device is a P-channel MOS transistor, the voltage application switching devices can be made smaller. In addition, since the initial potential in each horizontal scanning period is the second potential which is the potential at the start time in each of the voltages, display on the display panel can be performed without being affected by the potentials of the charges held in the pixel electrodes.

As described above, according to the invention, it is acceptable that the potential corresponding to the gradation display data is a potential included in one of the first and second voltages. Consequently, the differences in the changing potentials of the first and second voltages in each period can be reduced. A desired potential can thus