A stacked current mirror circuit includes four N-channel MOS transistors. One transistor serves as an input device for conducting via its drain, a majority of the reference current. Another transistor is connected as a mirroring device, with its drain coupled to a voltage source, its gate coupled to the gate of the input device, and its source coupled to the source of the input device at a first common node. These two transistors couple to form a first current mirror circuit which couples to the input of a second current mirror comprising the third and fourth transistors. The drain and gate of the third transistor couple to the first common node and the gate of the fourth transistor. The sources of both the third and fourth transistors couple to a second common node (e.g., ground), and the drain of the fourth transistor provides the output. As a result, current is mirrored from the input device transistor to the mirroring device transistor, and then forced through the third transistor. The current is then mirrored from the third transistor to the fourth transistor which forces the current to the output line.
A CMOS current mirror is provided that includes a current input, an input transistor, whose conductivity path is located between the current input and a reference potential terminal, a current output, an output transistor, whose conductivity path is connected to the reference potential terminal and which supplies the current output with an output current, a gate node common for both transistors, and a supply potential terminal. The current mirror further includes a first additional transistor, whose conductivity path is located between the supply potential terminal and the gate node and whose gate terminal is connected to the current input, and a second additional transistor, whose conductivity path is located between the gate node and the reference potential terminal and whose gate terminal is connected to the gate node.
A current mirror circuit comprises first and second resistors for conducting first and second reference currents dependent upon a supply voltage, and first and second current mirrors coupled to the first and second resistors, the second resistor being in series with a voltage reference. The second current mirror mirrors the second reference current, and its mirrored current output is subtracted from the first reference current, the difference current being mirrored by the first current mirror to produce a controlled output current. The circuit can be arranged so that the controlled output current is independent of changes of the supply voltage, or, optionally with further current mirrors and voltage references, so that the controlled output current has a desired relationship with the supply voltage. A circuit is described for a cellular telephone transmitter power amplifier for which the controlled current decreases with increasing supply voltage in a working range, and decreases more rapidly beyond this range for over-voltage protection.
A current mirror circuit includes a first current-mirror transistor coupled to a second current-mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current-mirror transistor and in parallel with the load to shunt the bias current away from the load.
