A bus construction (20) for connecting a circuit (14) controlled via a separate control port (26c) to a bus controlled by addressing, in which the signal paths (24a, 24b) connected to the I/O ports (26a, 26b) of the circuit (14) with a separate control port are connected to the corresponding signal paths (23a, 23b) of the bus controlled by addressing by means of switches (22a, 22b).

Aspects of the invention provide a method and system for a communication bus for resetting one or more devices connected to the bus. The transceiver bus (620) may include a single serial data line (616), a single serial clock line (614) and a single reset line (612). A status of a slave device coupled to the transceiver bus (620) may be determined by a master device. Based on the status of the slave device, the master device may execute a forced reset or a normal reset. In a case where a device may be unresponsive, the master device may execute a forced reset. Additionally, in a case where a device is responsive but requires resetting, the master device may execute a normal reset and selectively reset a slave device requiring reset.

A method and system for communicating data between an integrated circuit and each of a first device and a second device. Communications between the integrated circuit and the first device use a first interface protocol, while communications between the integrated circuit and the second device use a second interface protocol. Both interface protocols, however, share the same data bus and clock bus. To communicate using the second interface protocol, the first device, which uses the first interface protocol, is first deactivated by sending address data via the shared data bus that does not identify the first device, thereby causing the first device to enter an inactive state until a stop condition is detected on the shared data bus. Then, communications using the second interface protocol can be carried out, provided that a start or stop condition for the first interface protocol is not inadvertently generated on the shared data bus.

In a specific embodiment of the present invention, a graphics device generates digital output data in response to a known input data. The resulting digital output data has an expected circular redundancy check (CRC) value. The generated digital output data is provided to a digital graphics output port associated with the graphics controller, which is thereby transmitted to a test apparatus over a digital graphics cable. The test apparatus performs an analysis on the received digital graphics data. The analysis results are transmitted back to the graphics device over a serial link of the digital display cable. The graphics device receives the transmitted analysis data, which is subsequently used to determine if the graphics device is operating properly. This determination may be made the graphics device, or by a host system for further analysis.

The present invention is an I.sup.2 C (inter-IC control) bridge device which implements a communication protocol layered on top of a standard I.sup.2 C protocol. The layered protocol used by the bridge device is termed the "Layered I.sup.2 C Protocol"--abbreviated "LIP". Thus the bridge device is called a "LIP bridge device". The LIP bridge device provides I.sup.2 C address extension, data integrity checking, and fault detection and isolation when inserted between an I.sup.2 C bus master and it's intended target I.sup.2 C device. Each LIP bridge device has at least two attached I.sup.2 C busses--a parent bus and a child bus. The LIP bridge operates as a slave on its parent bus, and a master of its child bus. The Layered I.sup.2 C protocol is specified to operate on a bus between one or more bus masters and the parent bus of one or more LIP bridge devices. The child bus is used for attaching multiple I.sup.2 C devices and/or one or more LIP bridge devices. In an exemplary implementation, the LIP bridge device is constructed using a microcontroller to create a LIP bridge device with one parent and one child I.sup.2 C bus port and a group of LIP bridge configuration pins. The parent bus traffic to a given LIP bridge device consists entirely of LIP packets, and the child bus traffic consists of standard I.sup.2 C packets to communicate with standard child bus I.sup.2 C devices. The child bus traffic may also consist of LIP packets to communicate with LIP bridges attached to the child bus. By design, the LIP packets and standard I.sup.2 C transactions do not interfere with one another. The LIP bridge device interprets LIP command packets from a bus master and translates them into the intended I.sup.2 C data stream that is then broadcast over the child bus. Likewise, data from the child bus is used to create LIP packets that are returned to the proper bus master. The use of LIP packets on a given I.sup.2 C bus provides an extra level of I.sup.2 C addressing.