An information processing apparatus which processes a large amount of data at high speed. The synchronizing signal has a cycle including a transfer period and a processing period. In the transfer period, data is transferred, e.g., from a data input unit to a first memory, and from the first memory to a second memory. In the processing period, the data input unit reads data for one frame of a digital video image, and a data output unit displays an image based on the image data. Processors respectively perform predetermined processing upon data stored in a memory connected to the processor. Thus, within one cycle of the synchronizing signal, processing is completed at respective stages from input to output. Note that the connection between the memories and the processors may be changed for performing the processing at the respective stages without data transfer. In this case, data transfer time can be saved.
A pipeline processing system and an information processing apparatus not malfunctioning even if there is a pipeline stage in which data is not correctly written, including a plurality of processing circuits for applying predetermined processing to a plurality of data blocks; memories accessed by any circuit of a plurality of processing circuits, encryptor for encrypting the data based on key information set for each series of pipeline processings continuously processed when storing processing results of the circuits in the memories; and decoders for decoding data based on set information used for the encrypting when reading the data encrypted and stored in the memories.
A matrix type display is provided in which information is transmitted to a flat panel display element such as a liquid crystal or electroluminescent panel utilizing optical communication. Synchronization signals are transmitted from a synchronization circuit to scan electrode driving circuits through optical communication utilizing a plurality of pairs of light-emitting elements and light-receiving elements facing each other, and image data is transmitted from a memory circuit to signal electrode driving circuits through non-interfering optical communication signals utilizing a plurality of opposing pairs of light-emitting elements and light-receiving elements.
Herein disclosed is a surveillance system, comprises: a plurality of imaging units for respectively taking images of specific objects to transform the images into image signals; a plurality of terminal units for respectively displaying thereon the images and producing command signals each indicative of requiring one of the images to be taken by imaging units; an image signal processing apparatus for processing the image signals transformed by the imaging units and operating the terminal units to have the terminal units display the images from the imaging units with the command signals respectively produced by the terminal units; and the image signal processing apparatus including image signal selecting means for selecting one of the image signals from among the image signals respectively transformed by the imaging units; controlling means for controlling the image signal selecting means to allow the image signals to be sequentially selected by the image signal selecting means; image signal encoding means for encoding the image signals sequentially selected by the image signal selecting means to image data; image data compressing means for compressing the image data encoded by the image signal encoding means into compression data; compression data storing means for storing therein the compression data compressed by the image data compressing means; and transmitting means for transmitting to the terminal units the compression data stored by the compression data storing means with the command signals respectively produced by the terminal units.
According to one embodiment, a computer system is disclosed. The computer system includes an image processor. The image processor includes an image signal processor having two or more processing elements. The processing elements concurrently process an array of pixel values via a plurality of image filter comparison operations.
An inter-cluster communication module using the memory access network is provided, including a plurality of clusters, a memory subsystem, a controller and a switch device. When some clusters issue a load instruction and some clusters issue a store instruction of an identical memory address concurrently, the controller controls the switch device which connects the clusters and the memory banks of the memory subsystem, so that the data item is transmitted from the cluster issuing the store instruction to the cluster issuing the load instruction through the switch device, thereby achieving data exchange between the clusters. Herein, the data item is selectively stored in the memory module depending on the address. Furthermore, the data item is also transmitted between the memory and the clusters over the switch device.