A punch-through diode includes a first and second gate forming first and second junctions respectively with and spaced from each other by a first region. The junctions may be PN junction or Schottky barrier junctions with the first region. The diode may be the top gate-channel-bottom gate junctions of an FET or the collector-base-emitter junctions of a bipolar transistor. In either case, the channel or the base is depleted and currents flow between the top and bottom gate or the emitter and collector respectively. The punch-through diode is used as a voltage reference element and can be structured for Kelvin connection.
This is a Continuation of application Ser. No. 08/344,123, having a filing date of Nov. 23, 1994 which is a continuation of 07/821,069, filed Jan. 16, 1992, which is now abandoned.
A multifunctional pure water maker includes a main body and a reverse osmosis module. The main body includes a base portion and a column extending from the base portion. A water container is removably placed on the base portion. A control cap is pivotally attached to the column and includes a compartment in an underside thereof. An outlet pipe is mounted in the control cap and has an end communicated with the reverse osmosis module. Water purified by the reverse osmosis module flows through the other end of the outlet pipe into the water container when the control cap is in a closed position covering an opening of the water container. A limit switch is mounted in the control cap such that the reverse osmosis module is activated to proceed with production of pure water when the control cap is moved to the closed position and that the reverse osmosis module is deactivated when the control cap is moved to an open position.
A plurality of connection holes 24 for connecting n.sup.+ type semiconductor region 20 of zener diodes (D.sub.1, D.sub.2) and wires 21 and 22 to each other are not arranged in the center of the n.sup.+ type semiconductor region 20, that is, in a region in which a p.sup.+ type semiconductor region 6 and the n.sup.+ type semiconductor region 20 form a junction but is arranged in the periphery which is deeper than the center in junction depth. In addition, these connection holes 24 are spaced from each other so that a pitch between the adjacent connection holes 24 is greater than a minimum pitch between connection holes of the circuit, and thereby a substrate shaving quantity is reduced when the respective connection holes 24 are formed by means of dry etching.
A manufacturing technique for a zener diode which includes forming a first semiconductor region in a region such as a well region at a primary face of a semiconductor substrate and then forming a second semiconductor region of opposite conductivity type thereover. The second semiconductor region covers an area greater than the underlying first semiconductor region. The method further calls for forming an insulating film on the primary face of the substrate followed by the forming connection holes in the insulating film to expose an upper part of the second semiconductor region located outside the area covered by the junction affected between the first and second semiconductor regions. This is followed by the formation of a wire at the upper part of the insulating film in which an electrical connection is affected between the wire and the second semiconductor region through the plural connection holes which are distributively arranged.
