A rasterizer, particularly suited for generating patterns for semiconductor masks and the like is described. An 8.times.8 array uses RAS, CAS and WE signals in addition to the memory address for accessing the array. A state machine is used to convert the pattern data (e.g., type of object orientation, etc.) into accessing data with the WE generator being driven through a ROM.
This is a continuation of application Ser. No. 07/689,083 filed Apr. 19, 1991, now abandoned, which is a continuation of application Ser. No. 07/268,838, filed Nov. 8, 1988, now abandoned, which is a continuation of application Ser. No. 06/784,856, filed Oct. 4, 1985, now U.S. Pat. No. 4,806,921.
A frame buffer is divided into tiles of, for example, 32 by 32 pixels. Triangles (and portions thereof) that are within a given tile are rasterized one triangle at a time into the tile location. This process repeats for each tile in the image frame. A sorting circuit generates control bits representing a vertical order of the vertices of a current triangle. A series of multiplexers vertically sorts the vertices bases on these control bits. A region calculation circuit generates region bits representing a location each of the vertices with respect to the current tile. A trivial discard of the triangle data occurs if the region bits indicate that the entire triangle lies outside of the tile. Subsequently, an initial rasterization starting point is estimated based on the region bits to lower the time needed for the rasterizer to find the first pixel of the current triangle to be assigned values.
