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Write enabling circuitry for a semiconductor memory
   
Document Number
US Patent 5963487
Issued Date
October 5, 1999
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Abstract
A write control circuit for a semiconductor memory device includes a conventional write path responsive to a control input (e.g., an external write enable signal) to control the beginning of a write operation for a write driver, whilst a separate dedicated write disable path, responsive to the same control input, controls the end of the write operation for the write driver. The invention separates the end of write from the beginning of write by introducing a fast dedicated path designed primarily for ending the write. This dedicated path contains dedicated logic to generate an end of write signal at the disabling edge of the control input to disable the write driver quickly before a new memory cell is selected.
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Write enabling circuitry for a semiconductor memory - US Patent 5963487 Drawing
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Number of Claims:
10
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Published
October 5, 1999
Application Number
08/991,231
Filed
December 16, 1997
US Classification
365/194   365/230.06 365/233
Int'l Classification
G11C   7/10   (20060101)   G11C   7/00   (20060101)   G11C   7/22   (20060101)  
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USPTO Field of Search
365/194   365/230.06   365/233   365/191   326/82   326/86   326/92   326/104  
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