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Interconnect substrate with circuits for field-programmability and testing of multichip modules and hybrid circuits    
United States Patent5973340   
Link to this pagehttp://www.wikipatents.com/5973340.html
Inventor(s)Mohsen; Amr M. (Saratoga, CA)
AbstractAn interconnect structure is centered around a substrate having multiple component contacts for receiving electronic components. Multiple conductive traces are provided over the substrate or in multiple layers of the substrate. Each conductive trace is connected to one of the component contacts. A programmable IC having a group of separate conductive leads is connected to the substrate. Two or more of the conductive leads are connected to corresponding ones of the conductive traces. The IC has programmable elements, such as electrically programmable elements, for selectively connecting the conductive leads, thereby enabling selected conductive traces to be interconnected so as to achieve a desired electrical function from the electronic components connected to the substrate. A test chip, an interconnect structure that contains the test chip, and a related test method are also provided.
   














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Drawing from US Patent 5973340
Interconnect substrate with circuits for field-programmability and
     testing of multichip modules and hybrid circuits - US Patent 5973340 Drawing
Interconnect substrate with circuits for field-programmability and testing of multichip modules and hybrid circuits
Inventor     Mohsen; Amr M. (Saratoga, CA)
Owner/Assignee     Aptix Corporation (San Jose, CA)
Patent assignment
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Publication Date     October 26, 1999
Application Number     08/895,718
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     July 17, 1997
US Classification     257/209 257/211 257/758 257/E21.526 257/E23.147 257/E23.151 257/E23.171
Int'l Classification    
Examiner     Fahmy; Wael M.
Assistant Examiner    
Attorney/Law Firm     Meetin; Ronald J. Skjerven, Morrill, MacPherson, Franklin & Friel LLP
Address
Parent Case     This is a division of U.S. patent application Ser. No. 08/594,929, filed Jan. 31, 1996, now U.S. Pat. No. 5,654,564, which is a division of U.S. patent application Ser. No. 08/300,289, filed Sep. 2, 1994, now U.S. Pat. No. 5,504,354, which is a continuation of U.S. patent application Ser. No. 07/972,884, filed Nov. 4, 1992, now U.S. Pat. No. 5,371,390, which is a continuation of U.S. patent application Ser. No. 07/598,417, filed Oct. 15, 1990, now abandoned.
Priority Data    
USPTO Field of Search     257/208 257/209 257/211 257/773 257/778 257/786
Patent Tags     interconnect substrate circuits field-programmability and testing multichip modules hybrid circuits
   
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Market Size
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$5B - $10B
$2B - $5B
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$0   $2.5B   $5B   $7.5B   $10B
Market Share
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