A method of forming a viahole in an interlayer insulating film without the formation of irregularities on a side wall of the viahole. The method includes a first step of forming a viahole in an interlayer insulating film having a multi-layer structure of plural kinds of insulating layers; a second step of forming a side wall film on a side wall of the viahole; and a third step of removing a native oxide film formed on a bottom portion of the viahole by etching.
A method for contact profile improvement is described. The contact window is formed over a substrate having at least one element. A first oxide layer is formed on the substrate. A borophosphosilicate glass layer is formed on the first oxide layer and the borophosphosilicate glass layer is treated by a planarization process. The contact window is formed in the first oxide layer and the borophosphosilicate glass layer. The element on the substrate is exposed therein. A second oxide layer is formed on the borophosphosilicate glass layer, the sidewall and the bottom of the contact window, with overhangs formed at an opening of the contact window. A spacer on the sidewall of the contact window is formed by etching the second oxide layer to further expose the surface of the borophosphosilicate glass layer. Finally, a native oxide on the bottom of the contact window is removed by a wet etching process and the etching selectivity between the native oxide and the spacer is smaller than 1.
A method of reducing contact size in an integrated circuit includes providing an insulating layer over a semiconductor substrate including a plurality of gate structures, creating an aperture extending through the insulating layer and having side walls, providing a spacer on the side walls of the aperture, and providing a contact in the aperture. The lateral sides of the contact abut the spacer. A contact structure is also disclosed in which a spacer separates a contact from a gate structure to avoid charge gain or loss between the contact and gate structure.
In one aspect, the invention includes a semiconductor processing method of selectively reducing an etch rate of a doped material. At least some dopant is removed from one portion of the doped material while leaving the dopant in an other portion of the doped material. In another aspect, the invention includes a semiconductor processing method of forming openings. A doped material is provided over a substrate. Openings are etched in the doped material. Dopant in the doped material proximate the openings is depleted relative to other regions of the doped material. In yet another aspect, the invention includes a semiconductor processing method of forming openings. A doped material is provided over a substrate and openings are formed in the doped material. The doped material has a substantially uniform dopant concentration throughout its thickness. One peripheral portion of the openings is defined by the doped material and another peripheral portion is defined by another material. The dopant concentration is depleted from the doped material at the peripheral portion. After the depleting, the peripheral portions of the openings are subjected to an etch to remove the other material.
This invention is directed to a method for reforming an undercoating surface prior to the formation of a film by the CVD technique using a reaction gas containing an ozone-containing gas having ozone contained in oxygen and TEOS. It effects the reform of the surface by forming an undercoating insulating film on a substrate prior to the formation of film and exposing the surface of the undercoating insulating film to plasma gas.
A method of forming a viahole in an interlayer insulating film without formation of irregularities on a side wall of the viahole. The method includes a first step of forming a viahole in an interlayer insulating film having a multi-layer structure of plural kinds of insulating layers; a second step of forming a side wall film on a side wall of the viahole; and a third step of removing a native oxide film formed on a bottom portion of the viahole by etching.