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Method tester and circuit for applying a pulse trigger to a unit to be triggered
   
Document Number
US Patent 5983378
Issued Date
November 9, 1999
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Abstract
A unit (108) to be triggered, for example a memory, receives data under the control of Boundary Scan Test (BST) logic, via a BST chain (110). The invention utilizes a pulse circuit (202) which generates a pulse trigger for the unit (108) on the basis of a stimulus presented via the BST chain (110). This saves time, because it is no longer necessary to supply the entire pulse trigger via the BST chain and the supply of the stimulus now suffices.
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Method tester and circuit for applying a pulse trigger to a unit to be triggered - US Patent 5983378 Drawing
Drawing from US Patent 5983378
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Number of Claims:
14
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Owner
JTAG Technologies (Eindhoven,NL)
Published
November 9, 1999
Application Number
08/729,480
Filed
October 10, 1996
US Classification
714/727  
Int'l Classification
G01R   31/3185   (20060101)   G01R   31/28   (20060101)   G11C   29/04   (20060101)   G11C   29/32   (20060101)  
Assistant Examiner
Attorney/Law Firm
Priority Data
Oct 13, 1995 [EP] 95202758
USPTO Field of Search
371/22.31   371/22.32   371/22.34   371/22.5   371/22.6   371/25.1   371/27.1   371/27.5   395/183.06   324/765   324/763   714/30   714/32   714/37   714/43   714/48   714/718   714/720   714/726   714/727   714/733   714/734  
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