A circuit is presented which sets the transconductance of a FET using a resistor. The circuit comprises a resistor and first and second FETs series-connected in sequence between a supply voltage and a circuit common point, and third and fourth FETs and a bias current source series-connected in sequence between the supply voltage and the circuit common point. The drain and gate of the fourth FET are connected to the gate of the second FET and the gates of the first and third FETs are cross-coupled to the drains of the third and first FETs, respectively. The bias current source provides a starting current for the circuit. When so arranged, and with the threshold voltages of the first and second FETs matched, the transconductance of the second FET is directly proportional to 1/R1. The circuit can in turn be used to bias other transistors in a reproducible way to fix the transconductance of an amplifier according to the selected resistor value.

Disclosed is a differential amplifying circuit including an amplifying circuit, wherein 1) a drain of a sixth transistor is connected to a drain of an eighth transistor, and a drain of a tenth transistor is connected to a drain of a fourth transistor, and 2) a ratio between a total of gate widths of the fourth (or eighth) and tenth (or sixth) transistors (converted per unit gate length, and gate widths that follow are the same)and a gate width of a fifth (or ninth) transistor is nearly proportional to a current ratio between a first (or third) and second (or fourth) current source circuits, the gate width of the fourth (or eighth) transistor being equal to or more than that of the tenth (or sixth) transistor.

There is disclosed a current mirror circuit comprising a first transistor having a first electrode connected to a first potential, a second electrode connected to a second potential lower than the first potential, and a third electrode connected to a third potential higher than the second potential, a second transistor having a first electrode connected to the first potential and the first electrode of the first transistor, and a second electrode connected to the second potential, an operational amplifier having a high-potential input connected to the third potential and the third electrode of the first transistor, and a low-potential input connected to the third electrode of the second transistor, and a third transistor having a first electrode connected to an output of the operational amplifier, a second electrode connected to the low-potential input and the third electrode of the second transistor, and a third electrode used as an output terminal.

An output stage amplifier circuit in accordance with the present invention overcomes many shortcomings of the prior art. A output stage amplifier circuit for providing a high output voltage and current reference signal suitably includes an output buffer configured with a compensation circuit for reducing disturbances introduced into the output stage amplifier circuit by voltage supply rails, such as parasitic ringing and other disturbances. The compensation circuit can suitably comprise a first compensation device, such as at least one capacitor, and a second compensation device, such as at least one capacitor. The compensation devices are suitably coupled between an input terminal of the output stage amplifier circuit and a pair of transistors proximate a pair of output transistors of the output stage amplifier circuit, and are configured to provide "pole-zero" compensation to the output stage amplifier circuit.