A window generating circuit of an image processing apparatus which processes an image is provided. The circuit includes a main controller, a memory device, first, second and third registers, and a window generator. The main controller inputs an original clock signal and generates first and second line memory read control signals, first and second line memory write control signals, a pixel clock, and address signals for first and second line memories based on the original clock signal. The memory device contains the first and second line memories. The first register stores current pixel data in accordance with the pixel clock, and the current pixel data relates to a current line of pixels of the image. The second register stores first line memory data output from the first line memory in accordance with the first line memory read control signal, and the first line memory data relates to a first line of pixels which precedes the current line of pixels. The third register stores second line memory data output from the second line memory in accordance with the second line memory read control signal, and the second line memory data relates to a second line of pixels which precedes the first line of pixels. The window generator inputs the current pixel data, the first line memory data, and the second line memory data from the first, second and third registers, respectively, and generates an n.times.n window of data based on such data. Also, a method performed by the circuit is also provided.
