|
|
|
| United States Patent | 6009487 |
| Link to this page | http://www.wikipatents.com/6009487.html |
| Inventor(s) | Davis; Paul Gregory (San Jose, CA), Batra; Pradeep (Santa Clara, CA), Dillon; John B. (Palo Alto, CA), Krishnamohan; Karnamadakala (San Jose, CA), Gasbarro; James A. (Mountain View, CA) |
| Abstract | In a system comprising a current controlling device and a plurality of
signal lines coupled to the current controlling device, wherein the
current controlling device has an output driver including a register, an
improved method for setting a current of the output driver for at least
one of the plurality of signal lines. The improved method determines a
reference register-setting for the register of the current controlling
device. The reference register-setting corresponds to a reference voltage
for at least one of the plurality of signal lines. A target
register-setting is then determined for the register based on the
reference register-setting. The target register-setting corresponds to a
target voltage for at least one of the plurality of signal lines, wherein
the target voltage produces an appropriate swing about the reference
voltage. An operational register-setting is then determined for the
register based on the target register-setting. The current of the output
driver for at least one of the plurality of signal lines is then set based
on the operational register-setting so that a swing about the reference
voltage is optimal. |
|
|
|
Title Information  |
|
|
|
|
|
|
| Publication Date |
December 28, 1999 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Title Information  |
|
|
References  |
|
|
| *references marked with an asterisk below are user-added references |
|
U.S. References |
|
|
| Add a new US reference: |
| | Reference | Relevancy | Comments | Reference | Relevancy | Comments | 5663674 Beyer et al.
Sep,1997 |      Your vote accepted [0 after 0 votes] | | 5592076 Main et al.
Jan,1997 |      Your vote accepted [0 after 0 votes] | | 5585741 Jordan
Dec,1996 |      Your vote accepted [0 after 0 votes] | | 5475336 Singh et al.
Dec,1995 |      Your vote accepted [0 after 0 votes] | | 5254883 Horowitz et al.
Oct,1993 |      Your vote accepted [0 after 0 votes] | | 5194765 Dunlop et al.
Mar,1993 |      Your vote accepted [0 after 0 votes] | | 5023488 Gunning
Jun,1991 |      Your vote accepted [0 after 0 votes] | | 4860198 Tanenaka
Aug,1989 |      Your vote accepted [0 after 0 votes] | | 4811202 Schabowski
Mar,1989 |      Your vote accepted [0 after 0 votes] | | 4785394 Fischer
Nov,1988 |      Your vote accepted [0 after 0 votes] | | 4519034 Smith et al.
May,1985 |      Your vote accepted [0 after 0 votes] | | 4481625 Roberts et al.
Nov,1984 |      Your vote accepted [0 after 0 votes] | | 4473762 Iwahashi et al.
Sep,1984 |      Your vote accepted [0 after 0 votes] | | 4247817 Heller
Jan,1981 |      Your vote accepted [0 after 0 votes] | | 4200863 Hodges et al.
Apr,1980 |      Your vote accepted [0 after 0 votes] | | | | | |
|
|
|
|
U.S. References |
|
|
Foreign References |
|
|
|
|
|
|
Foreign References |
|
|
Other References |
|
|
| Add a new Other reference: |
| Post related web sites and other references in this section |
| | Reference | Relevancy | Comments | Arnold O. Allen, Probability, Statistics, and queueing Theory With Computer Science Applications, Second Edition, Academic Press, Inc., pp.
450, 458-459,. (Nov. 1990).
. Feb,2007 |      Your vote accepted [0 after 0 votes] | | Harold Pilo, Steve Lamphier, Fred Towler, Richard Hee, A 300 MHz, 3.3V 1Mb SRAM Fabricated in a 0.5.mu.m CMOS Process,IBM Microelectronics Division, Essex Junction, VT, pp.148-149, 1996 IEEE International Solid-State Circuits Conference (Feb.
9,1996).
. Feb,2007 |      Your vote accepted [0 after 0 votes] | | PCT International Search Report, PCT/US 97/09219, dated Jun.10,1997.
. Feb,2007 |      Your vote accepted [0 after 0 votes] | | T. Yang, M. Horowitz, and B. Wooley, "A 4-ns 4K.times.1-bit Two Port BiCMOS SRAM", IEEE Journal of Solid State Circuits, vol. 23, No. 5, pp. 1030-40 (Oct. 1988).
. Feb,2007 |      Your vote accepted [0 after 0 votes] | | T. Chappell, et al., "A2ns Cycle, 4ns Access 512kb CMOS ECL SRAM", IEEE International Solid-State Circuits Conference, pp. 50-51 (1991).
. Feb,2007 |      Your vote accepted [0 after 0 votes] | | Translated Abstract of Japanese patent application No. 58-54412, vol. 7, No. 138 (P-204) (1283) Jun. 16, 1983.
. Feb,2007 |      Your vote accepted [0 after 0 votes] | | H. Shumacher, J. Dikken, and E. Seevinck, "CMOS Subnanosecond True-ECL Output Buffer", IEEE Journal of Solid-State Circuits, vol. 25, No. 1, pp. 148-154 (Feb. 1990).. Feb,2007 |      Your vote accepted [0 after 0 votes] | | |
|
|
|
|
Other References |
|
|
|
|
|
References  |
|
|
|
|
|
| Market Size |
|
Estimate the gross annual revenues of the relevant market
sector:
|
| | |
| |
|
|
| Market Share |
|
Estimate the percentage of the relevant market sector this invention will capture:
|
| | |
| |
|
|
| Reasonable Royalty |
|
What percentage of gross sales should the inventor or assignee be paid?
|
| | |
| |
|
|
|
Public's "Guesstimation" of Royalty Value
|
| Market Size | N/A | [No votes] | | x | Market Share | N/A | [No votes] | | x | Reasonable Royalty | N/A | [No votes] |
| | N/A | |
| |
|
|
|
|
|
|
|
|
|
|
|
|
Market Review  |
|
|
Technical Review  |
|
|
Claims  |
|
|
What is claimed is:
1. In a system comprising a current controlling device and a plurality of signal lines coupled to the current controlling device, the current controlling device having an
output driver including a register, a method for setting a current of the output driver for one of the plurality of signal lines, the method comprising the steps of:
(A) determining a reference register-setting;
(B) determining a target register-setting based on the reference register-setting;
(C) determining an operational register-setting based on the target register-setting, comprising the steps of:
(1) determining a possible operational register-setting based on the target register-setting;
(2) repeating steps (A) through (C)(1) a predetermined number of times to produce a plurality of possible operational register-settings;
(3) determining a measure of central tendency of the plurality of possible operational register-settings: and
(D) setting the current of the output driver for the one of the plurality of signal lines based on the operational register-setting.
2. The method of claim 1, wherein step (D) comprises coupling selective ones of a plurality of capacitors to an output of a current mirror of the output driver based upon the operational register-setting.
3. The method of claim 1, wherein step (C)(3) comprises statistically determining the operational register-setting based on the plurality of operational register-settings.
4. The method of claim 1, wherein step (B) comprises multiplying the reference register-setting by a predetermined multiplier.
5. The method of claim 1, wherein the output driver has non-ideal current source characteristics, and wherein step (B) comprises multiplying the reference register-setting by the predetermined multiplier.
6. The method of claim 1, wherein step (C) comprises setting the operational register-setting equal to the target register-setting.
7. The method of claim 1, wherein the plurality of signal lines comprise a bus.
8. The method of claim 7, wherein the bus has a known fixed impedance.
9. The method of claim 7, wherein the bus has a known alterable impedance.
10. The method of claim 9, wherein the known alterable impedance is altered by coupling a removable module to the bus.
11. The method of claim 10, wherein the removable module comprises a module device affixed to the module.
12. The method of claim 11, wherein the module device is a memory device.
13. The method of claim 12, wherein the memory device is a dynamic random access memory device.
14. In a system comprising a current controlling device and a plurality of signal lines coupled to the current controlling device, the current controlling device having an output driver including a register, a method for setting a current of the
output driver for one of the plurality of signal lines, the method comprising the steps of:
(A) determining a reference register-setting, comprising the steps of:
(1) generating a plurality of voltages on the plurality of signal lines for a first amount of time in response to a register-setting;
(2) incrementally altering the register-setting a number of times;
(3) obtaining for each register-setting in the altering step an indicator equal to a number of voltages in the plurality of voltages which fail a comparison with a reference voltage; and
(4) determining the reference register-setting based on the indicators;
(B) determining a target register-setting based on the reference register-setting;
(C) determining an operational register-setting based on the target register-setting; and
(D) setting the current of the output driver for the one of the plurality of signal lines based on the operational register-setting.
15. The method of claim 14, wherein step (A)(1) further comprises:
(a) providing the register-setting to a current controller;
(b) generating an output from the current controller; and
(c) coupling the output of the current controller to a particular combination of a plurality of transistors coupled between the plurality of signal lines and ground.
16. The method of claim 14, wherein step (A)(1) comprises:
(a) initializing the current controlling device to enable the output driver to set an output current for the plurality of signal lines;
(b) requesting the current controlling device to enable the output driver to set the output current for the plurality of signal lines; and
(c) selecting a particular combination of a plurality of transistors coupled between the plurality of signal lines and ground based upon the register-setting in order to generate the plurality of voltages on the plurality of signal lines.
17. The method of claim 14, wherein step (A)(2) comprises:
incrementally altering the register-setting until the plurality of voltages surpasses the reference voltage.
18. The method of claim 14, wherein step (A)(3) comprise:
(a) comparing for each register-setting the plurality of voltages with the reference voltage after a second amount of time, wherein the second amount of time is less than the first amount of time; and
(b) setting the indicator equal to the number of voltages in the plurality of voltages that fail the comparison with the reference voltage.
19. The method of claim 14, wherein step (A)(3) comprises:
(a) sampling for each register-setting the plurality of voltages a plurality of times to produce a plurality of samples;
(b) comparing at least one of the plurality of samples with the reference voltage; and
(c) setting the indicator equal to the number of voltages in the plurality of voltages which fail the comparison with the reference voltage.
20. The method of claim 14, wherein one of the plurality of voltages fails the comparison with the reference voltage in step (A)(3) when the one of the plurality of voltages equals the reference voltage.
21. The method of claim 14, wherein one of the plurality of voltages fails the comparison with the reference voltage in step (A)(3) when the one of the plurality of voltages surpasses the reference voltage.
22. The method of claim 14, wherein step (A)(4) comprises:
setting the reference register-setting equal to an approximation of a register-setting that corresponds to a transition of the indicators from a first value to a second value.
23. The method of claim 14, wherein step (A)(4) comprises:
setting the reference register-setting equal to a register-setting that corresponds to a measure of central tendency of a transition of the indicators from a first value to a second value.
24. The method of claim 14, wherein step (A)(4) comprises:
(a) accumulating the indicators into a first number;
(b) dividing the first number by a second number to produce a measure of central tendency; and
(c) setting the reference register-setting equal to the measure of central tendency minus a bias number.
25. The method of claim 15, wherein the output of the current controller comprises the register-setting.
26. The method of claim 15, wherein step (A)(1)(b) comprises:
(i) coupling selective ones of a plurality of capacitors to an output of a current mirror of the current controller based upon the register-setting;
(ii) charging the selective ones of the plurality of capacitors to a variable voltage while a counter counts;
(iii) comparing the variable voltage to the reference voltage; and
(iv) when the variable voltage approximately equals the reference voltage, stopping the counter from counting and latching the output of the current controller.
27. The method of claim 16, wherein the current controlling device includes a storage element and step (A)(1)(a) comprises storing assertion data into the storage element.
28. The method of claim 18, wherein the second amount of time is of a sufficient duration that the plurality of voltages have stabilized on the plurality of signal lines.
29. The method of claim 14, wherein one of the plurality of voltages fails the comparison with the reference voltage in step (A)(3) when the one of the plurality of voltages does not surpass the reference voltage.
30. The method of claim 29, wherein the one of the plurality of voltages does not surpass the reference voltage when the one of the plurality of voltages is less than the reference voltage.
31. The method of claim 29, wherein the one of the plurality of voltages does not surpass the reference voltage when the one of the plurality of voltages is greater than the reference voltage.
32. The method of claim 22, wherein the first value is greater than the second value.
33. The method of claim 22, wherein the first value is less than the second value.
34. The method of claim 22, wherein the first value has a first associated register-setting and the second value has a second associated register-setting.
35. The method of claim 27, wherein step (A)(1)(b) comprises requesting the current controlling device to read the assertion data from the storage element.
36. The method of claim 34, wherein reference register-setting is the first associated register-setting or the second associated register-setting.
37. In a system comprising a current controlling device and a plurality of signal lines coupled to the current controlling device the current controlling device having an output driver including a register a method for setting a current of the
output driver for one of the plurality of signal lines, the method comprising the steps of:
(A) determining a reference register-setting comprising the steps of;
(1) sending a register-setting to the register;
(2) initializing the current controlling device to enable the output driver to set an output current for the plurality of signal lines;
(3) requesting the current controlling device to enable the output driver to set the output current for the plurality of signal lines;
(4) selecting a particular combination of a plurality of transistors coupled between the plurality of signal lines and ground based upon the register-setting in order to generate a plurality of voltages on the plurality of signal lines;
(5) comparing the plurality of voltages with a reference voltage and generating an indicator in response thereto;
(6) accumulating the indicator into a first number;
(7) repeating steps (3) through (6) a predetermined number of times;
(8) accumulating the first number into a second number;
(9) comparing the first number with a first predetermined number;
(10) updating the register-setting if the first number does not equal the first predetermined number;
(11) repeating steps (1) through (10) until the first number equals the first predetermined number; and
(12) determining the reference register-setting based upon the second number and a second predetermined number,
(B) determining a target register-setting based on the reference register-setting;
(C) determining an operational register-setting based on the target register-setting: and
(D) setting the current of the output driver for the one of the plurality of signal lines based on the operational register-setting.
38. The method of claim 37, wherein the first predetermined number is zero.
39. The method of claim 37, wherein step (A)(12) further comprises dividing the second number by the second predetermined number and subtracting a bias number.
40. The method of claim 39, wherein the plurality of signal lines comprises eight data lines, the predetermined number of times is ten times, the second predetermined number is 80 and the bias number is one-half.
41. In a system comprising a current controlling device and a plurality of signal lines coupled to the current controlling device, the current controlling device having an output driver including a register, a method for setting a current of the
output driver for one of the plurality of signal lines the method comprising the steps of:
(A) determining a reference register-setting;
(B) determining a target register-setting based on the reference register-setting comprising the steps of:
(1) adding an offset value to the reference register-setting to produce a first result;
(2) multiplying the first result by a multiplier to produce a second result; and
(3) subtracting the offset value from the second result to produce the target register-setting
(C) determining an operational register-setting based on the target register-setting; and
(D) setting the current of the output driver for the one of the plurality of signal lines based on the operational register-setting.
42. In a system comprising a current controlling device and a plurality of signal lines coupled to the current controlling device, the current controlling device having an output driver including a register, a method for setting a current of the
output driver for one of the plurality of signal lines, the method comprising the steps of:
(A) determining a reference register-setting:
(B) determining a target register-setting based on the reference register-setting;
(C) determining an operational register-setting based on the target register-setting, comprising the steps of:
(1) generating a plurality of output values from a current controller in response to a plurality of register-settings in the current controlling device;
(2) comparing the plurality of output values to the target register-setting; and
(3) setting the operational register-setting equal to one of the plurality of register-settings that results in one of the plurality of output values that is closest to the target register-setting; and
(D) setting the current of the output driver for the one of the plurality of signal lines based on the operational register-setting.
43. The method of claim 42, wherein step (C)(1) comprises:
(a) loading a register-setting into the register;
(b) storing an output value in response to step (a);
(c) updating the register-setting; and
(d) repeating steps (C)(1)(a) through (C)(1)(c) a predetermined number of times.
44. The method of claim 42, wherein step (C)(1) comprises:
(a) sending a register-setting to the register;
(b) coupling selective ones of a plurality of capacitors to an output of a current mirror of the current controller based upon the register-setting;
(c) charging the selective ones of the plurality of capacitors to a variable voltage while the counter counts;
(d) comparing the variable voltage to a reference voltage;
(e) when the variable voltage approximately equals the reference voltage, stopping the counter from counting and latching a count of the counter, wherein the count of the counter is one of the plurality of output values;
(f) updating the register-setting; and
(g) repeating steps (C)(1)(a) through (C)(1)(f) a predetermined number of times to produce the plurality of output values.
45. The method of claim 44, wherein step (C)(1)(e) comprises storing the count.
46. The method of claim 44, wherein step (C)(1)(e) comprises storing the count when the count is within a predetermined range of the target register-setting.
47. In a system comprising a current controlling device and a plurality of signal lines coupled to the current controlling device, the current controlling device having an output driver including a register, a method for setting a current of the
output driver for one of the plurality of signal lines, the method comprising the steps of:
(A) determining a reference register-setting;
(B) determining a target register-setting based on the reference register-setting;
(C) determining an operational register-setting based on the target register-setting, comprising the steps of:
(1) sending a register-setting to the register;
(2) generating an output value from a current controller in response to the register-setting;
(3) comparing the output value with the target register-setting;
(4) if the output value is less than the target register-setting, then updating the register-setting;
(5) repeating steps (1) through (4) until the output value is greater than or equal to the target register-setting; and
(6) setting the operational register-setting equal to the register-setting; and
(D) setting the current of the output driver for the one of the plurality of signal lines based on the operational register-setting.
48. In a system comprising a current controlling device and a plurality of signal lines coupled to the current controlling device, the current controlling device having an output driver including a register, a method for setting a current of the
output driver for one of the plurality of signal lines, the method comprising the steps of:
(A) determining a reference register-setting;
(B) determining a target register-setting based on the reference register-setting;
(C) determining an operational register-setting based on the target register-setting. Compromising the steps of:
(1) setting a variable equal to the target register-setting;
(2) sending a register-setting to the register;
(3) generating an output value from a current controller in response to the register-setting;
(4) comparing the variable with the absolute value of the target register-setting minus the output value;
(5) if the absolute value of the target register-setting minus the output value is less than the variable, then setting a currently closest register-setting equal to the register-setting and replacing the variable with the absolute value of the
target register-setting minus the output value;
(6) if the output value is less than the target register-setting, then updating the register-setting;
(7) if the output value is less than the target register-setting, repeating steps (2) through (6) until the output value is greater than or equal to the target register-setting; and
(8) setting the operational register-setting equal to a floor of a halved first quantity, wherein the first quantity is the sum of the currently closest register-setting and the register-setting; and
(D) setting the current of the output driver for the one of the plurality of signal lines based on the operational register-setting.
49. In a bus system comprising a bus, a master, and a slave with an output driver including a register, a method for setting a current of the output driver for the bus, the method comprising the steps of:
(A) sending a first register-setting from the master to the register of the slave;
(B) selectively coupling the first register-setting to a plurality of transistors coupled between the bus and ground;
(C) selecting a particular combination of the plurality of transistors based upon the first register-setting in order to generate a plurality of voltages on the bus;
(D) sampling each of the plurality of voltages a plurality of times to produce a plurality of sample sets;
(E) comparing each of the plurality of voltages of one of the plurality of sample sets with a reference voltage and setting a fail number equal to a number of the plurality of voltages which fail the comparison;
(F) repeating steps (D) and (E) a first predetermined number of times;
(G) updating the first register-setting if the fail number does not equal a check number
(H) repeating steps (A) through (G) until the fail number equals the check number;
(I) if the fail number equals the check number, then setting a target register-setting equal to the first register-setting multiplied by a multiplier;
(J) sending a second register-setting from the master to the register of the slave;
(K) generating an output value from a current controller in response to the second register-setting;
(L) storing the output value associated with the second register-setting when the output value is within a predetermined range of the target register-setting;
(M) updating the second register-setting and repeating steps (I) through (L) a second predetermined number of times;
(N) determining an operational register-setting based on the second register-setting having an associated output value closest to the target register-setting; and
(O) setting the current of the output driver for the bus based on the operational register-setting.
50. The method of claim 49, wherein step (O) comprises the steps of:
(1) repeating steps (A) through (N) a third predetermined number of times to produce a plurality of possible operational register-settings; and
(2) determining the operational register-setting based on the plurality of possible operational register-settings.
51. In a bus system comprising a bus, a master, and a slave with an output driver including a register, a method for setting a current of the output driver for the bus, the method comprising the steps of:
(A) sending a register-setting from the master to the register of the slave;
(B) generating an output value from a current controller in response to the register-setting;
(C) selecting a particular combination of a plurality of transistors coupled between the bus and ground based upon the output value in order to generate a plurality of voltages on the bus;
(D) sampling each of the plurality of voltages a plurality of times to produce a plurality of sample sets;
(E) comparing each of the plurality of voltages of one of the plurality of sample sets with a reference voltage and setting a fail number equal to a number of the plurality of voltages which fail the comparison;
(F) repeating steps (D) and (E) a first predetermined number of times;
(G) updating the register-setting if the fail number does not equal a check number;
(H) repeating steps (A) through (G) until the fail number equals the check number;
(I) determining a target register-setting based on the register-setting; and
(J) setting the current of the output driver for the bus based on the target register-setting.
52. The method of claim 51, wherein step (J) comprises the steps of:
(1) repeating steps (A) through (I) a second predetermined number of times to produce a plurality of target register-settings;
(2) determining an operational register-setting based on the plurality of target register-settings; and
(3) setting the current of the output driver for the bus based on the operational register-setting.
53. A medium readable by a digital signal processing device in a bus system having a bus and a slave, the slave having an output driver including a register, the medium storing sequences of instructions for setting a current of the output driver
for the bus, wherein the sequences of instructions cause the digital signal processing device to:
(A) determine a reference register-setting;
(B) determine a target register-setting based on the reference register-setting;
(C) determine an operational register-setting based on the target register-setting comprising the steps of:
(1) determining a possible operational register-setting based on the target register-setting;
(2) repeating steps (A) through (C)(1) a predetermined number of times to produce a plurality of possible operational register-settings;
(3) determining a measure of central tendency of the plurality of possible operational register-settings; and; and
(D) setting the current of the output driver for the bus based on the operational register-setting.
54. An output driver for an electronic device coupled to a bus, comprising:
a plurality of transistors coupled to bus to control bus current; control circuitry coupled to the transistors;
and a current controller coupled to the control circuitry, the current controller comprising:
a comparison circuit having a first input to receive a reference voltage, and a second input to receive a variable voltage;
a capacitor circuit configured to generate the variable voltage;
a multiplexer having first inputs to receive a register-setting, and second inputs, and outputs coupled to control circuitry;
a counter having outputs coupled to the second inputs of the multiplexer; and
control logic coupled to the counter, the comparison circuit, and the multiplexer, the control logic for causing the counter to count until the comparison circuit determines that the variable voltage is in a predetermined relationship with the
reference voltage.
55. The output driver of claim 54, wherein the control logic further causes the multiplexer to output either the register-setting or the count of the counter. |
|
|
|
|
Claims  |
|
|
Description  |
|
|
FIELD OF THE INVENTION
The present invention pertains to the field of electrical buses. More particularly, the present invention relates to a method for setting a current of a current source driver for a high speed bus system.
BACKGROUND OF THE INVENTION
Computer systems and other electronic systems typically use buses for interconnecting integrated circuit components so that the integrated circuit components can communicate with one another. The buses typically connect masters such as
microprocessors and controllers and slaves such as memories and bus transceivers.
Each master and slave coupled to a bus typically includes output driver circuitry for driving signals onto the bus. The output driver circuitry may comprise a current mode output driver. A current mode driver draws a known current regardless of
load and operating conditions and has a high output impedance.
An example of a current mode output driver for use in a master or slave device is disclosed in U.S. Pat. No. 5,254,883, issued Oct. 19, 1993, of Horowitz et al. ("Horowitz"), entitled Electrical Current Source Circuitry for a Bus. Horowitz
describes a process for calibrating a register-setting for a register in a curre | | |