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Method and apparatus for transferring test data from a memory array    
United States Patent6014759   
Link to this pagehttp://www.wikipatents.com/6014759.html
Inventor(s)Manning; Troy A. (Meridian, ID)
AbstractA memory device includes an output data path that uses single-ended data in conjunction with a flag signal. The output data path transfers data from an I/O circuit coupled to a memory array to an output tri-state buffer. A comparing circuit compares data from the I/O circuit to a desired data pattern if the data does not match the desired pattern outputs the flag signal. The flag signal is input to the output buffer and the output buffer outputs a tri-state condition on the data bus. Since the flag signal corresponds to more than one data bit, the tri-state condition of the output buffer is held for more than one tick of the data clock, rather than only a single tick. Consequently, the tri-state condition remains on the bus for sufficiently long that a test system can detect the tri-state condition even at very high clock frequencies.



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Patent Text Patent PDF Print Page Summary File History
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Inventor     Manning; Troy A. (Meridian, ID)
Owner/Assignee     Micron Technology, Inc. (Boise, ID)
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Publication Date     January 11, 2000
Application Number     08/874,315
PAIR File History     Application Data   Transaction History
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Filing Date     June 13, 1997
US Classification     714/42 365/189.05 365/201 714/718 714/739
Int'l Classification    
Examiner     Hua; Ly V.
Assistant Examiner    
Attorney/Law Firm     Dorsey & Whitney LLP
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USPTO Field of Search     395/183.18 371/21.1 365/201 365/189.05 714/160 714/718 714/42
Patent Tags     transferring test data memory array
   
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