Uniformity of temperature is established within a wafer, and a higher throughput is achieved while the wafer heating time is dramatically reduced by combining lamp heating with hot-wall heating. Lamps 10 are provided outside the furnace body 3 of a hot-wall CVD apparatus. The hot-wall reactor furnace body 3 is preheated to a prescribed temperature. Wafers W are loaded into the furnace body 3, and these wafers W are rapidly heated immediately thereafter to the desired temperature by light emitted by the lamps 10. The lamps 10 are switched off following heating, and the wafer temperature is allowed to reach a uniform state as a result of heat diffusion in the wafers in the hot-wall reactor furnace body 3. It is also possible to adopt an arrangement in which preheating commensurate with the cooling occurring during the transport period is performed before the wafers W are loaded into the furnace body 3, the wafers W are then loaded into the reactor furnace body 3, and the wafer temperature is allowed to achieve a uniform state.

In plasma processing, a bias voltage is provided from a power supply through a DC blocking capacitor to a platform on which a substrate to be treated is supported within a plasma reactor. The periodic bias voltage applied to the DC blocking capacitor has a waveform comprised of a voltage pulse peak followed by a ramp down of voltage from a first level lower than the pulse peak to a second lower level, the period of the bias waveform and the ramp down of voltage in each cycle selected to compensate for and substantially cancel the effect of ion accumulation on the substrate so as to maintain a substantially constant DC self-bias voltage on the substrate between the voltage pulse peaks. The waveform may include a single voltage pulse peak followed by a ramp down in voltage during each cycle of the bias voltage such that the ion energy distribution function at the substrate has a single narrow peak centered at a selected ion energy. The waveform may also comprise two voltage pulse peaks each followed by a ramp down of voltage selected to provide a bias voltage at the substrate comprising two voltage peaks during each cycle with DC self-bias voltages following each pulse peak at two different substantially constant DC levels, resulting in an ion energy distribution function at the substrate that includes two peaks of ion flux centered at two selected ion energies with substantially no ion flux at other ion energies. The ion energy distribution function may thus be tailored to best accommodate the desired plasma treatment process and can be used to reduce the effects of differential charging of substrates.

A plasma reactor system with controlled DC bias for manufacturing semiconductor wafers and the like. The reactor system includes a plasma chamber, a plasma generating coil and a chuck including a chuck electrode. The chuck supports a workpiece within the chamber. The plasma reactor system further includes a pair of generators, one of which supplies a radio frequency signal to the plasma generating coil. The second generator delivers a RF signal which to the chuck electrode and acts to control DC bias at the workpiece. Peak voltage sensor circuitry and set point signal circuitry controls the power output of the generator, and a matching network coupled between the generator and the first electrode matches the impedance of the RF signal with the load applied by the plasma. DC bias determines the energy with which plasma particles impact the surface of a workpiece and thereby determines the rate at which the process is performed. This DC bias forms at the surface of the workpiece upon generation of a plasma in the plasma chamber and is affected by the RF signal applied to the chuck electrode. Since power losses within the match network are variable and unpredictable, the peak voltage at the electrode can not be consistently maintained by simply applying a predetermined generator output. By monitoring the peak voltage at the electrode and generating a corresponding control signal to control the generator, a consistent DC bias and corresponding process rate can be maintained.

Uniformity of temperature is established within a wafer, and a higher throughput is achieved while the wafer heating time is dramatically reduced by combining lamp heating with hot-wall heating. Lamps 10 are provided outside the furnace body 3 of a hot-wall CVD apparatus. The hot-wall reactor furnace body 3 is preheated to a prescribed temperature. Wafers W are loaded into the furnace body 3, and these wafers W are rapidly heated mediately thereafter to the desired temperature by light emitted by the lamps 10. The lamps 10 are switched off following heating, and the wafer temperature is allowed to reach a uniform state as a result of heat diffusion in the wafers in the hot-wall reactor furnace body 3. It is also possible to adopt an arrangement in which preheating commensurate with the cooling occurring during the transport period is performed before the wafers W are loaded into the furnace body 3. the wafers W are then loaded into the reactor furnace body 3. and the water temperature is allowed to achieve a uniform state.