Semiconductor package with wire bond protective member

What is claimed is:

1. A semiconductor package comprising:

a base for retaining a semiconductor die comprising a plurality of contacts, the base comprising a plurality of first conductors;

an interconnect on the base comprising a plurality of contact members for electrically contacting the contacts on the die, and a plurality of second conductors in electrical communication with the contact members;

a plurality of wires bonded to the base and to the interconnect for electrically connecting the first conductors to the second conductors;

a cover and a force applying member on the base configured to bias the die and the interconnect together; and

a plate on the base comprising an opening aligned with the interconnect, the opening larger than the die but smaller than the interconnect to permit placement of the die on the interconnect, the base and the plate substantially enclosing the wires.

2. The package of claim 1 wherein the base comprises a mounting shelf configured to support the plate proximate to the wires with a cap therebetween.

3. The package of claim 1 wherein the base comprises a mounting shelf for retaining the plate, the mounting shelf and the plate having mating peripheral shapes.

4. The package of claim 1 wherein the plate includes a cup shaped portion for covering the wires.

5. A semiconductor package comprising:

a base configured to retain a semiconductor die comprising a plurality of contacts, the base comprising a surface, a plurality of terminal contacts, and a plurality of first conductors in electrical communication with the terminal contacts;

an interconnect on the base comprising a plurality of contact members for electrically contacting the contacts on the die, and a plurality of second conductors in electrical communication with the contact members;

a plurality of wires bonded to the first conductors and to the second conductors;

a plate on the surface comprising an opening aligned with the interconnect configured to permit access for the die to the interconnect, the plate and the surface configured such that the plate substantially encloses the wires; and

a cover and a force applying member on the base for biasing the die against the interconnect.

6. The package of claim 5 wherein the opening is larger than an outer periphery of the die but smaller than an outer periphery of the interconnect.

7. The package of claim 5 wherein the plate has a generally cup-shaped cross section configured to substantially enclose the wires.

8. The package of claim 5 wherein the surface and the plate have mating peripheral shapes.

9. A semiconductor package comprising:

a base configured to retain a semiconductor die comprising a plurality of contacts the base comprising a plurality of terminal contacts configured for electrical communication with testing circuitry and a mounting shelf;

an interconnect on the base comprising a plurality of contact members configured to make temporary electrical connections with the contacts on the die;

a plurality of wires bonded to the base and to the interconnect for electrically connecting the terminal contacts to the contact members;

a protective member on the base comprising a plate on the mounting shelf, the plate and the mounting shelf configured to protect the wires; and

a force arriving member and a cover attached to the base configured to bias the die and the interconnect together.

10. The package of claim 9 wherein the mounting shelf and the plate have mating peripheral shapes.

11. A semiconductor package comprising:

a base for retaining a semiconductor die comprising a plurality of contacts, the base comprising a surface and a plurality of first conductors;

an interconnect on the base comprising a plurality of contact members configured to make temporary electrical connections with the contacts on the die, and a plurality of second conductors in electrical communication with the contact members;

a plurality of wires bonded to the first conductors and to the second conductors;

a plate on the surface, the plate and the surface configured such that the plate substantially covers the wires and at least a portion of the interconnect, the slate comprising an opening for allowing access to the interconnect for the die.

12. The package of claim 11 wherein the surface and the plate have mating peripheral shapes.

13. The package of claim 11 wherein the surface comprises a mounting shelf.

14. The package of claim 11 wherein the plate includes a groove for enclosing the wires.

15. The package of claim 11 wherein the opening is larger than an outer periphery of the die.

16. A system for testing a semiconductor die having a plurality of contacts comprising:

a testing apparatus in electrical communication with testing circuitry;

a package for the die comprising a base comprising a plurality of terminal contacts configured for electrical communication with the testing circuitry, an interconnect on the base comprising a plurality of contact members for making temporary electrical connections with the contacts on the die, a plurality of wires bonded to the interconnect and to the base for electrically connecting the terminal contacts and the contact members, and a force applying member and a cover attached to the base for biasing the die against the interconnect;

the package further comprising a protective member on the base substantially enclosing the wires and comprising an opening configured to permit the die to be placed on the interconnect.

17. The system of claim 16 wherein the base comprises a mounting shelf and the protective member comprises a plate configured for placement on the mounting shelf.

18. A system for testing a semiconductor die having a plurality of contacts comprising:

a testing apparatus in electrical communication with testing circuitry;

a base for retaining the die comprising a plurality of terminal contacts configured for electrical communication with the testing circuitry, and a plurality of first conductors in electrical communication with the terminal contacts;

an interconnect on the base comprising a plurality of contact members configured to electrically engage the contacts on the die, and a plurality of second conductors in electrical communication with the contact members;

a plurality of wires bonded to the first conductors and to the second conductors;

a protective member on the base comprising a plate substantially covering the wires and an opening configured to permit placement of the die on the interconnect; and

a force a-olvincr member and a cover attached to the base configured to bias the die against the interconnect.

19. The system of claim 18 wherein the protective member comprises a channel for enclosing the wires.

20. A method for testing a semiconductor die comprising:

providing a temporary package for the die;

providing an interconnect on the package configured to establish temporary electrical communication with the die;

wire bonding wires to the package and to the interconnect to provide conductive paths therebetween;

placing a protective member on the base comprising a plate configured to substantially enclose the wires during assembly of the package, the plate comprising an opening aligned with the interconnect configured to permit placement of the die on the interconnect;

attaching a cover and a force applying member to the base configured to bias the die against the interconnect as the wires are protected by the plate; and

applying test signals to the die.

21. The method of claim 20 wherein the opening has a peripheral share larger than the die but smaller than the interconnect.

22. The method of claim 20 wherein the portion of the plate includes a channel for enclosing the wires.

23. A method for testing a semiconductor die having a plurality of contacts comprising:

providing a testing apparatus in electrical communication with testing circuitry;

providing a temporary package for the die comprising a base comprising a surface and a plurality of terminal contacts electrically connectable to the testing circuitry, and an interconnect on the base comprising a plurality of contact members electrically connectable to the contacts on the die;

wire bonding wires to the interconnect and to the base to provide conductive paths between the contact members and the terminal contacts;

placing a plate on the surface with the plate and the surface configured such that the slate substantially encloses the wires;

attaching a cover and a force applying member to the base configured to bias the die against the interconnect as the wires are protected by the plate; and

applying test signals through the terminal contacts, the wires, and the contact members to the contacts on the die.

24. The method of claim 23 further comprising following the applying step removing the die from the package while the plate remains mounted to the base.

Description Submit all comments and votes

FIELD OF THE INVENTION

This invention relates generally to semiconductor manufacture and more particularly to an improved semiconductor package having a protective member for the wires and wire bonds of an interconnect for the package.

BACKGROUND OF THE INVENTION

Temporary packages are used in the testing of bare semiconductor dice. For example, temporary packages can be used in place of conventional plastic or ceramic semiconductor packages for testing bare dice. One type of temporary package is adapted to contain a single bare die, or a chip scale package, for burn-in testing. This type of package can include a base for holding the die, and an interconnect component that mounts to the base. The interconnect provides temporary electrical connections between contacts on the die and terminal contacts (e.g., J-bend pins) formed on the base. The terminal contacts are adapted to electrically connect to a burn-in board, or other testing apparatus, in electrical communication with testing circuitry.

One method for mounting the interconnect to the base involves wire bonding. With this method, the interconnect includes conductors (e.g., traces) in electrical communication with contact members. The contact members on the interconnect are configured to electrically connect to contacts on the die (e.g., test pads, bond pads). The base includes conductors (e.g., internal traces) in electrical communication with the terminal contacts. Wires can be bonded to the conductors on the interconnect and the conductors on the base to form electrical paths therebetween. These wires are herein referred to as "wires", and their bonded connections are referred to as "wire bonds".

In some cases the wires are made relatively long to provide improved electrical characteristics for the package. For example, aluminum alloy wires used for wirebonding, typically have a lower resistance than the thin film conductors formed on the interconnect. Accordingly, it can be advantageous to make the wires as long as possible, and the thin film conductors as short as possible. This allows test procedures to be performed at higher speeds with lower resistance and reduced parasitics.

One problem with the long wires is that they tend to reduce the reliability of the temporary package. In particular, the wires can be bumped during handling and transport of the package causing sagging and shorting. The temporary packages are designed to be assembled and disassembled multiple times and the wires are often exposed. In addition, the wire bonds on the interconnect or base, are also subject to damage during continued usage of the temporary package. It would be advantageous for a temporary package to include some type of protection for the wires of the package and for the associated wire bonds. This would permit the wires to made as long as possible without compromising the performance of the temporary package.

SUMMARY OF THE INVENTION

In accordance with the present invention, an improved semiconductor package, system, and method for testing semiconductor dice are provided. The semiconductor package comprises a base for housing a single bare die; an interconnect for establishing temporary electrical communication with the die; and wires bonded to conductors on the base and interconnect. In addition, the semiconductor package includes a protective member adapted to protect the wires and associated wire bonds.

In an illustrative embodiment, the protective member comprises a plate configured for mating engagement with a mounting shelf on the base. The protective member protects the bonded wires, while at the same time allowing access to the interconnect for assembling the package and removing the tested die. In an alternate embodiment, the protective member comprises an epoxy resin or a silicone based elastomeric material, such as an epoxy resin, dispensed onto the wires and associated wire bonds as a "glob top" and then cured.

The base can include terminal contacts, such as pins or ball contacts, configured for mating electrical engagement with a testing apparatus, such as a burn-in board. In addition, conductors are formed on the base in electrical communication with the terminal contacts. The conductors terminate in bonding pads located on a bonding shelf of the base. Still further, a cover and force applying member are associated with the base to bias the die against the interconnect in the assembled package.

The interconnect includes contact members configured to electrically connect to contacts on the die. In addition, conductors are formed on the interconnect in electrical communication with the contact members, and terminate in bonding pads. Prior to a testing procedure using the package, the wires can be bonded to the bonding pads on the interconnect, and to the bonding pads on the base, to form electrical paths therebetween. During a package assembly procedure, the die can be aligned with the interconnect, and the cover and force applying member secured to the base. The assembled package can then be used to test the die. During a disassembly procedure, the tested die can be removed from the package. The protective member, in addition to protecting the wires and wire bonds during assembly and disassembly of the package, also provides protection during transport, storage and handling of the package.

A system constructed in accordance with the invention includes the assembled semiconductor package, and a testing apparatus such as a burn-in board. The testing apparatus is in electrical communication with testing circuitry adapted to apply test signals to the integrated circuits on the die. During the testing procedure, test signals can be applied through the terminal contacts and conductors on the package base, through the wires, through the conductors and the contact members on the interconnect, and to the contacts on the die.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an enlarged perspective view of an assembled semiconductor package constructed in accordance with the invention;

FIG. 2 is an enlarged cross sectional view taken along section line 2--2 of FIG. 1;

FIG. 3 is an enlarged perspective view, with parts removed, illustrating the assembly of a protective member of the semiconductor package;

FIG. 4A is an enlarged cross sectional view taken along section line 4A--4A of FIG. 2 illustrating a contact member for the semiconductor package;

FIG. 4B is an enlarged cross sectional view taken along section line 4B--4B of FIG. 2 illustrating an alternate embodiment contact member;

FIG. 5 is an enlarged perspective view illustrating an alternate embodiment protective member;

FIG. 6 is an enlarged perspective view illustrating another alternate embodiment protective member; and

FIG. 7 is a block diagram of a system that includes a semiconductor package constructed in accordance with the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIGS. 1 and 2, a semiconductor package 10 constructed in accordance with the invention is shown. The package 10 is adapted to contain a single, bare, semiconductor die 16 (FIG. 2) for testing. The package 10 includes a base 12 with terminal contacts 18 (FIG. 1) formed thereon, and an interconnect 14 (FIG. 2) adapted to establish temporary electrical communication with the die 16. The base 12 includes a recessed surface 31 (FIG. 2) wherein the interconnect 14 is mounted.

Wires 28 (FIG. 2) are wire bonded to the interconnect 14 and to the base 12 to establish conductive paths therebetween. In addition, the package 10 includes a protective member 26 (FIG. 2). The protective member 26 removably attaches to the base 12. The protective member 26 is configured to protect the wires 28, while at the same time allowing access to the interconnect 14 for inserting or removing the die 16.

The package 10 also includes a force applying member 20 (FIG. 2) configured to bias the die 16 against the interconnect 14. The force applying member 20 can be formed of a compressible elastomeric material, such as silicone, or as a compressible spring member, such as a belleville washer.

In addition, the package 10 includes a cover 22 and clips 24 that removably attach to the base 12. The clips 24 secure the cover 22 and force applying member 20 to the base 12. The ends of the base 12 are formed in a cross sectional configuration adapted to receive and retain the clips 24. The construction and function of the different components of the package 10 will become more apparent as the description proceeds.

The base 12 can be formed of an electrically insulating material, such as molded plastic, or ceramic. In the illustrative embodiment, the base 12 and terminal contacts 18 thereon, are formed in the configuration of a conventional small outline J-bend (SOJ) package. Alternately, the base 12 and terminal contacts 18 can be formed the configuration of other conventional semiconductor packages, such as ball grid array (BGA), pin grid array (PGA), land grid array (LGA), dual in line package (DIP), zig zag in line package (ZIP), leadless chip carrier (LCC), small outline package (SOP), thin small outline package (TSOP), or quad flat package (QFP).

The base 12 includes patterns of conductors 30 (FIG. 2) in electrical communication with the terminal contacts 18. The patterns of conductors 30 can be formed integrally with the base 12 using a process such as injection molding or lamination. Suitable materials for forming the conductors 30 include tungsten, copper and nickel. Suitable methods for forming the package base 12 are disclosed in U.S. Pat. No. 5,519,332, incorporated herein by reference.

As shown in FIG. 2, the conductors 30 include wire bonds 34 formed on their terminal ends to the wires 28. To facilitate the wire bonding process, the terminal ends of the conductors 30 can be formed with bonding sites or with separate bonding pads having a metallurgy suitable for wire bonding (e.g., gold with nickel underplating). In addition, the base 12 includes a bonding shelf 32 wherein the wire bonds 34 can be formed. The wires 28 can be bonded to the conductors 30 using a wire bonding process such as thermocompression bonding, ultrasonic bonding, or thermosonic bonding. Suitable wirebonders are commercially available from Kulicke and Soffa of Horsham, Pa. and other manufacturers.

Referring to FIG. 3, the interconnect 14 also includes patterns of conductors 36 having wire bonds 38 with the wires 28. The wire bonds 38 can be formed during the above wire bonding process. The conductors 36 can include bonding sites or separate bonding pads having a metallurgy suitable for wire bonding. In addition, the conductors 36 on the interconnect 14 are in electrical communication with the contact members 40.

Referring to FIG. 4A, the contact members 40 are adapted to electrically connect to contacts 42 on the die 16. The contacts 42 will typically be thin film bond pads, test pads or fuse pads on the die 16. The contact members 40 are formed integrally on a substrate 44 of the interconnect 14. The contact members 40 include penetrating projections 46 adapted to penetrate the contacts 42 on the die 16 to a limited penetration depth. In addition, the contact members 40 include conductive layers 48 in electrical communication with the conductors 36, and an insulating layer 50 formed on the substrate 44. Further details of the interconnect 14, including methods of fabrication, are disclosed in U.S. Pat. No. 5,483,741, incorporated herein by reference.

Referring to FIG. 4B, an alternate embodiment contact member 40A is adapted to form temporary electrical connections with bumped contacts 42A for a bumped die 16A. The contact members 40A are formed on a substrate 44A. The substrate 44A can be formed of silicon, ceramic, or other suitable materials and can include an insulating layer 50A. The contact members 40A include depressions formed in the substrate 44A, sized to retain the bumped contacts 42A. The depressions are covered with conductors 36A, or another metal layer, in electrical communication with the conductors 36A. The conductors 36A function substantially the same as the conductors 36 (FIG. 3) previously described.

Referring again to FIG. 3, the base 12 also includes a mounting shelf 52 wherein the protective member 26 can be retained or removed, as required. The protective member 26 and mounting shelf 52 have mating outer peripheral configurations. As indicated by arrow 56 (FIG. 3), the protective member 26 can be placed on