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Carrier and system for testing bumped semiconductor components    
United States Patent6040702   
Link to this pagehttp://www.wikipatents.com/6040702.html
Inventor(s)Hembree; David R. (Boise, ID); Farnworth; Warren M. (Nampa, ID); Wood; Alan G. (Boise, ID); Gochnour; Derek (Boise, ID); Akram; Salman (Boise, ID)
AbstractA semiconductor carrier and system for testing bumped semiconductor components, such as dice and packages, having contact bumps are provided. The carrier includes a base, an interconnect, and a force applying mechanism. The interconnect includes patterns of contact members adapted to electrically contact the contact bumps. The interconnect can include a substrate having contact members formed as recesses, or as projections, covered with conductive layers. Alternately, the interconnect can be a multi layered tape bonded directly to a base of the carrier. In addition to providing electrical connections, the contact members perform an alignment function by self centering the contact bumps within the contact members. The carrier can also include an alignment member configured to align the components with the interconnect. The system can include the carrier, a socket, and a testing apparatus such as a burn-in board in electrical communication with test circuitry.



 Title Information Submit all comments and votes
 
Patent Text Patent PDF Print Page Summary File History
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Inventor     Hembree; David R. (Boise, ID); Farnworth; Warren M. (Nampa, ID); Wood; Alan G. (Boise, ID); Gochnour; Derek (Boise, ID); Akram; Salman (Boise, ID)
Owner/Assignee     Micron Technology, Inc. (Boise, ID)
Patent assignment
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Publication Date     March 21, 2000
Application Number     08/888,075
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     July 3, 1997
US Classification    
Int'l Classification    
Examiner     Ballato; Josie
Assistant Examiner     Tang; Minh
Attorney/Law Firm     Gratton; Stephen A.
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Patent Tags     carrier testing bumped semiconductor components
   
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 References Submit all comments and votes
 
*references marked with an asterisk below are user-added references
 U.S. References
 
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ReferenceRelevancyCommentsReferenceRelevancyComments
5962921
Farnworth
257/773
Oct,1999

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Hembree

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Hembree
439/74
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Gochnour
29/843
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Farnworth
324/755
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Farnworth
257/797
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Hembree
438/17
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Farnworth
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Farnworth
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Gochnour
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Farnworth
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Akram
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Lee
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 Foreign References
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 Market Review Submit all comments and votes
   
Market Size
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> $10B
$5B - $10B
$2B - $5B
$500M - $2B
$100M - $500M
$10M - $100M
$1M - $10M
$500K - $1M
$100K - $500K
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$0
 
$0   $2.5B   $5B   $7.5B   $10B
Market Share
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75% - 100%
50% - 74.99%
25% - 49.99%
10 - 24.99%
5 - 9.99%
2 - 4.99%
1 - 1.99%
< 1%
[No votes]
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Reasonable Royalty
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75% - 100%
50% - 74.99%
25% - 49.99%
10 - 24.99%
5 - 9.99%
2 - 4.99%
1 - 1.99%
< 1%
[No votes]
0.0%
 
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 Technical Review Submit all comments and votes
 Claims Submit all comments and votes
 


What is claimed is:

1. A semiconductor carrier comprising:

a base comprising an external contact, the base configured to retain a semiconductor component comprising a contact bump;

an interconnect on the base comprising a contact member in electrical communication with the external contact configured to electrically contact the contact bump on the component;

a first alignment member on the base comprising a first opening configured to contact an edge of the component to coarse align the contact bump to the contact member;

a second alignment member on the interconnect comprising a second opening configured to contact the contact bump to fine align the contact bump to the contact member; and

a force applying mechanism attached to the base configured to bias the component against the interconnect.

2. The carrier of claim 1 wherein the component comprises a plurality of contact bumps and the interconnect comprises a plurality of contact members including at least one contact member configured to form a mark on a selected contact bums