An apparatus and method for clocking digital and analog circuits on a common substrate is provided. The apparatus and method serves to reduce digitally derived noise at select times during which the analog input signal is sampled. Analog sampling error is thereby reduced while, at the same time, the digital clocking signal maintains maximum frequency. Digitally derived noise is substantially eliminated near the latter portion of each sampling interval to ensure an accurate sampled value exists at the culmination of that interval. During the earlier portion of each sampling interval, digital clocking pulses are maintained at a high frequency so as to enhance processing speeds. It is determined that only the latter portion of each sample interval is critical to the reduction of sampling error. Furthermore, the digital clocking pulses occur a non-power-of-two factor to ensure tonal noise is not coupled into the analog circuit frequency band of interest.
A multi-bit continuous-time sigma-delta analog-to-digital converter provides a digital output signal as a digital representation of an analog input signal. The converter performs several functions in providing the digital output signal. First, the converter provides an analog summing signal indicative of a summation of the analog input signal and an analog feedback signal. Second, the converter provides a first set of bits as a digital representation of the analog summation signal. Third, the converter provides a second set of bits as a digital representation of a periodic sampling of the first set of bits. Fourth, the converter provides the analog feedback signal as an analog representation of the second set of bits. Fifth, the converter outputs the first set of bits or the second set of bits as the digital output signal.
In an RBW filter, a bandwidth is set so as to selectively pass a frequency component of only a desired signal bandwidth of the measured signals that have been frequency converted into a normalized intermediate frequency signal. A waveform detector detects a signal that passes through the RBW filter. An A/D converter samples the signal detected by the waveform detector at a predetermined sampling rate at which a Nyquist frequency is within the frequency bandwidth of the RBW filter, thereby converting the sampled signal into digital data. A data storage section stores the digital data converted by the A/D converter. A signal processing section re-samples the digital data stored in the data storage section so as to reproduce a bandwidth of the detection signal of the waveform detector, thereby generating arbitrary time data. A display section displays the arbitrary time data generated by the signal processing section while time and amplitude are defined on horizontal and vertical directions on the display screen.
A noise compensating device in a discrete time control system, such as a R/W system for hard disks, including: a control loop generating a first timing signal, a signal indicative of a quantity to be controlled, and a control signal, which have a first frequency; and an open loop control line which generates a compensation signal synchronous with the control signal and includes a sensor. The sensor includes a sensing element, generating an analog signal, an acquisition stage, connected to the sensing element and generating a disturbance measure signal correlated to the analog signal and synchronous with the control signal, and a synchronization stage. The synchronization stage includes a frequency generator having an input receiving the first timing signal and a first and a second output connected to the acquisition stage and generating, respectively, a second timing signal and a third timing signal.
In accordance with a specific embodiment of the present invention, a system is disclosed having an analog to digital converter and control module. The analog-to-digital converter includes an analog input, digital output, and control input. The control input of the analog-to-digital converter is connected to a pulse width modulated output of the control module which provides an offset pulse width modulated signal. During a first portion of the offset pulse width modulated signal a sampling capacitor is charged. During a second portion of the offset pulse width modulated signal an integration capacitor is charged.
An apparatus performs adaptive analog-to-digital conversion. The apparatus according to one embodiment comprises a frequency modulator unit for changing an input analog signal into a modulated analog signal with a frequency spectrum in a bandwidth of interest, a parallel delta sigma conversion unit operatively connected to the frequency modulator unit, the parallel delta sigma conversion unit converting the modulated analog signal into a digital signal, and a controller operatively connected to the frequency modulator unit and the parallel delta sigma conversion unit, the controller adjusting at least one parameter relating to a frequency characteristic of the frequency modulator unit and/or the parallel delta sigma conversion unit.
