A waveform equalizer prevents the delay of coefficient convergence due to the characteristics of a reproduced signal or the coefficient divergence due to an increase in determined errors. The waveform equalizer constituted by a transversal filter suppresses inter-symbol interferences of a transmitted digital information signal by multiplying the digital information signal and delayed signals thereof by tab coefficients and adding the multiplication results. The waveform equalizer comprises a virtual determination circuit for virtually determining the most plausible digital information from the output of the transversal filter, an error calculation circuit for providing an amplitude error based on the virtual determination result, a retaining and selecting circuit for retaining and selecting the digital information signal and the delayed output thereof, and an updating circuit for multiplying the output from the error calculation circuit by the outputs from the retaining and selecting circuit and to thereby update tab coefficients, wherein the virtual determination circuit virtually determines the value of a most plausible digital information signal by detecting a peak and utilizing the correlationship between signal components of the digital information signal.
A receiver for a received signal having two or more different data levels comprises two or more channel estimators, (at least) one channel estimator for each different data level, where each channel estimator preferably implements an adaptive 2.sup.nd order or higher model of the transmission channel over which the received signals was transmitted to generate an estimated signal for one of the different data levels. The receiver also has a comparator that compares the current received signal to the estimated signals generated by the different channel estimators to select an output data value for the current received signal. The adaptive model of the transmission channel has coefficients that are dynamically controlled based on an error signal generated by the comparator. Each channel estimator relies on an output signal generated by an adaptive equalizer. In preferred shared-component implementations, each adaptive equalizer is shared by two or more different channel estimators, and, in one possible preferred shared-component implementation, all of the different channel estimators share a single adaptive equalizer.
A method and device employing an iterative MMSE equalization-decoder soft information exchange decoding. The method uses a MMSE equalizer which receives and outputs soft information. The equalizer exchanges soft information with a soft input soft output decoder, preferably an error correction decoder. The nature of the equalizer permits solutions beyond one-dimensional data streams and permits solutions for long channel lengths and multi-dimensional data since the solution is not a function of the channel impulse response.
The invention includes disk drive circuitry, systems, and methods. The disk drive system comprises control circuitry and a disk device. The disk device stores data and transfers an analog signal representing the data. The control circuitry receives the analog signal, converts the analog signal into a digital signal, and transfers the digital signal. The control circuitry includes zero forcing circuitry and an adaptive filter. The zero forcing circuitry produces new coefficients for the adaptive filter. The control circuitry may also include an analog-to-digital converter, detector, decoder, and LMS circuitry. The analog-to-digital converter receives and samples the analog signal to generate a sampled signal. The adaptive filter shapes the sampled signal based on coefficients to produce an equalized signal. The detector detects binary data from the equalized signal, and the decoder decodes the binary data to generate the digital signal. Either the zero forcing circuitry or the LMS circuitry may be selected to produce the coefficient signal that adjusts the coefficients in the adaptive filter.
Error detection mechanisms for devices that have multilevel signal interfaces test multilevel signals of an interface with a binary test apparatus. The error detection mechanisms include converting between multilevel signals of the interface and binary signals of the test apparatus. The error detection mechanisms also include repeated transmission of multilevel signals stored in a memory of a device having a multilevel signal interface for detection by the test apparatus at different binary levels.
An signal communication device having an auto-configured equalizer. The signal communication device includes a scoping circuit, buffer circuit, select circuit and equalizing circuit. A test signal is transmitted to the signal communication device via a signal path. The scoping circuit generates a waveform trace of the test signal, the waveform trace indicating time interval between receipt of a transition in the test signal and receipt of a reflection of the transition. The buffer circuit stores a plurality of data values that correspond to data signals received via the signal path. The select circuit selects one of the plurality of data values from the buffer circuit based on the time interval indicated by the waveform trace. The equalizing circuit generates an equalizing signal based on the selected data value.
