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Description  |
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BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device having a structure provided with contact holes and wiring grooves in an insulating film, and a method for manufacturing such a semiconductor device.
At present, a wiring comprising Al as a main constituent material is employed in a semiconductor device. In particular, the wiring most popularly employed is manufactured by a process wherein a barrier film for inhibiting the Al film from
reacting with an underlying layer is formed under an Al film, or a antireflection film for inhibiting the irregular reflection of light at the occasion of lithography is formed on an Al film, and then these laminated films involving the Al film thus
deposited are etched by means of RIE. Further, with an increase in integration density of LSI, the wiring is now demanded to be formed into a multi-layer wiring structure, thus necessitating a development of a plug-forming technique for making a
connection between an upper wiring and a lower wiring.
On the other hand, with an increase in integration density of semiconductor devices, the wiring becomes increasingly fine, resulting in an decrease in cross-sectional area of the wiring and hence in an increase in wire resistance. Moreover, the
distance between each wirings becomes narrower, resulting in an increase in inter-wiring capacity.
Such increases in wire resistance and in inter-wiring capacity lead to an RC delay, thus hindering the operation of LSI. With an increase in fineness of LSI, a multi-layer wiring is becoming more important as a factor for determining the
operation speed of LSI. Therefore, the lowering in resistance of wiring ELS well as the lowering of dielectric constant of interlayer insulating film are now urgently desired.
As one of the conventional plug-forming techniques, W (tungsten)-CVD technique is known to be excellent in step coverage. FIG. 1A shows a cross-sectional view of the conventional multi-layer wiring structure which has been formed by making use
of the W-CVD technique. In FIG. 1A, the reference numeral 81 denotes an interlayer insulting film, 82 denotes a W plug and 83 denotes an Al wiring.
This W-CVD technique can be classified into two kinds, i.e. "blanket
deposition" and "selective deposition". The "blanket deposition" is a method wherein a W film is deposited all over a substrate including the inner surface of contact holes. On the other hand, the "selective deposition" is a method wherein a W
film is deposited selectively only on the bottom surface of contact holes.
Both methods are performed under a thermal condition which is different from each other. In the case of the "selective deposition", the interior of the contact holes can be filled with a W film in a single step. Whereas, in the case of the
"blanket deposition", an etch-back step or a CMP step is required as a post treatment for removing part of W film which has been deposited outside the contact holes.
The W plug formed by making use of the afore-mentioned W-CVD technique is accompanied with problems that it is high in resistance and poor in EM (electromigration) resistance.
The EM is a phenomenon where Al atoms in an Al wiring are caused to move due to the collision thereof with electrons as an electric current is passed through the Al wiring. W is a material which is more resistive to EM as compared with Al. When
an upper Al wiring and a lower Al wiring are connected with each other through a W plug, an accumulation of Al atoms takes place at the upstream side of the flow of Al atoms while a depletion of Al atoms takes place at the downstream side.
The accumulation of Al or depletion of Al of this kind may give rise to the generation of hillocks or voids, thus leading to a short circuit between wirings or a disconnection of wiring.
Further, in the case of the "blanket deposition", part of W film which has been deposited outside the contact holes is required to be removed, thus leading to an increase in number of manufacturing step. On the other hand, in the case of the
"selective deposition" where a step of removing W film deposited outside the contact holes is not required, the selectivity of deposition is frequently deteriorated at present so that a step of RIE etch-back is also required subsequently.
As an alternative plug-forming technique, an Al reflow technique is also known wherein a plug is formed by making use of Al which is lower in resistance than W. This method is featured in that it takes advantage of the fluidity through the
surface diffusion of an Al film. This method is advantageous in that the interior of the contact hole can be filled with Al by simply heating a substrate, thus making it possible to decrease the number of the manufacturing step.
As a result of extensive studies, an underlying layer made for instance of Ti (titanium) which is excellent in wettability in relative to Al is frequently employed in the deposition of Al film. Furthermore, a two-step reflow method, wherein Al
is sputtered at first without heating and then Al is sputtered again under a heated condition, is increasingly employed at present, since it is possible with this method to lower the fluidization temperature and to fill even a contact hole of high aspect
ratio (A.R.) (aspect ratio =depth of contact hole/pore diameter of contact hole).
Additionally, there have been various proposals wherein a reflow technique is combined with a sputtering technique of high directivity, such as a low pressure-long distance sputtering, a collimation sputtering and an HDP (high density plasma)
sputtering.
On the other hand, there is a problem in the aforementioned Al reflow technique that it is very difficult with this method to effectively fill a contact hole of high A.R. with Al. Since the Al reflow technique is based on sputtering, it is
inherently poor in step coverage.
Thus, the film thickness of Al becomes relatively thin at the bottom portion of contact hole, and the Al may be agglomerated when it is heated for fluidization, generating voids in the Al film buried in the contact hole. For the purpose of
overcoming this problem, a material such as Ti which is excellent in wettability to Al is employed as an underlying film as mentioned above, whereby preventing the agglomeration of Al.
However, when an underlying film is formed by a sputtering of Ti, an over-hang may be caused to develop at the opening portion of the contact hole, and the surface of Ti thus formed may become rugged. This rugged surface can be ascribed to the
crystal face dependency of the crystal growth of Ti. The over-hanging of Ti as well as the rugged surface of Ti prevents not only the adhesion of Al but also the reflow property of Al. Moreover, even if a directional sputtering of Ti is employed, it is
almost impossible to deposit a sufficiently thick Al film on the side wall of contact hole according to the current technique.
Further, since Ti is reactive to Al, an Al.sub.3 Ti film is formed on the bottom of contact hole, and this Al.sub.3 Ti film may become a cause for deteriorating the EM resistance of the Al plug as in the case of the W plug.
The application of the Al reflow technique to a damascene structure or a dual damascene structure is recently studied. FIG. 1B illustrates a cross-sectional view of the conventional dual damascene multi-layer wiring structure which has been
formed by making use of the Al reflow technique. In FIG. 1B, the reference numeral 84 denotes a Ti/TiN laminate film, 82 and 83 denotes an Al.sub.3 Ti film.
This dual damascene structure (DD structure) can be obtained by a process wherein contact holes and wiring grooves are formed in advance in an insulating film, and, after the interiors of these contact holes and wiring grooves are concurrently
filled with Al film in a single step, any excessive externally exposed Al film is removed by means of CMP (chemical mechanical polishing), whereby simultaneously forming Al wirings and Al plugs. It is possible, according to this dual damascene
structure, to simplify the manufacturing process and to save the manufacturing cost.
However, when a Ti film is employed as an underlying film and the Al-DD structure is formed by making use of the Al reflow technique, the Al.sub.3 Ti film may be formed also on the inner surface of the wiring grooves, since the wiring grooves are
disposed at the upper portion of the contact hole. Since Al.sub.3 Ti is high in electric resistance, the formation of Al.sub.3 Ti within the wiring may invite a reduction of the effective volume of the Al film and an increase in wire resistance. This
problem becomes more serious as the width of wiring becomes increasingly narrow.
As explained above, there have been proposed various kinds of plug-forming technique for filling a contact hole of high aspect ratio with a conductive material. Among them, the Al reflow technique is directed to the formation of a dual damascene
structure. However, when the dual damascene structure is formed by making use of the Al reflow technique, Al.sub.3 Ti is caused to be formed due to a Ti/TiN laminate film to be employed as an underlying film, thus giving rises to the problem of an
increase in wire resistance.
Aside from the aforementioned conventional methods, a method of covering a step portion (overhang portion) through a substitution between an Si film and an Al film has been proposed (Japanese Patent Unexamined Publication S/60-46024).
This method is known to be excellent in step coverage and can be performed by making use of the Si-CVD technique which has been employed in the manufacture of an LSI. Namely, according to this method, the overhang portion is covered in advance
with an Si film, an Al film is then deposited on the Si film by means of sputtering, and the resultant layers, are heat-treated thereby substituting the Al film for the Si film.
According to this method, it is possible to perform the covering of an overhang portion with an Al film, which could not be realized if only a sputtering method is employed, or to perform the filling of a contact hole of high aspect ratio with an
Al film.
However, if the quantity of Si diffused into the Al film exceeds over the solid solution limit (the extent of solid solution) thereof in this method, an Si nodule (precipitation) may be formed at another location. If this Si nodule is formed
within a wiring, it may become a cause for increasing the electric resistance of the wiring, and if this Si nodule is formed between wirings, it may become a cause for a short circuit between the wirings.
For the purpose of minimizing the development of Si nodule, there has been proposed a method wherein a Ti film is formed on an Al film, and then the Si diffused into the Al film is allowed to be trapped by making use of the Ti film (Japanese
Patent Unexamined Publication S/63-70455).
According to this method, since the Si in the Al film can be absorbed by the Ti film, it is possible to suppress an increase in resistance of an Al--Si alloy wiring due to the Si nodule that may be generated at the bottom of contact hole during a
heat treatment.
This method however is accompanied with a problem that since Ti is contained in the wiring, a high resistant Al.sub.3 Ti is formed during heat treatment as in the case of the aforementioned reflow, so that the volume of Al in relative to the
volume of wiring is substantially decreased, thus increasing the wire resistance. This problem of increase in wire resistance becomes more serious as the wiring becomes higher in integration and in fineness.
There is also proposed a method (Japanese Patent Unexamined Publication H/2-199838) which is substantially a combination of the method disclosed in Japanese Patent Unexamined Publication S/60-46024 and the method disclosed in Japanese Patent
Unexamined Publication S/63-70455.
According to this method, the interior of contact hole is filled in advance with an Si film by making use of the Si-CVD technique, and then an Al film is substituted for the Si film, whereby making it possible to carry out the filling of a
contact hole of high aspect ratio, any excessive Si film being absorbed by making use of a Ti film.
According to this method, it is possible to fill a contact hole of high aspect ratio with an Al film. The Al film is subsequently worked by means of RIE to form an Al wiring.
However, this method is accompanied with the following problems. Namely, the Al film to be obtained according to this method contains a product of high resistance such as Al.sub.3 Ti, which may be formed through a reaction between Ti silicide to
be formed through a absorption of the Al film by the Ti film and the Al film, or through a reaction between an excessive Ti film which has not been served for the absorption of the Si film and the Al film.
Therefore, when the Al film containing a product of such a high resistance is worked by means of RIE to form an Al wiring, an Al wiring 83 containing a high resistance product 87 on its upper surface as shown in FIG. 2A, or an Al wiring 83
containing a high resistance product 87 on its upper surface and side walls as shown in FIG. 2B would be obtained.
The Al wiring 83 containing such a high resistance product 87 is too high in resistance to use it as a fine wiring. The reference numeral 86 shown in these FIGS. 2A and 2B denotes a first wiring.
BRIEF SUMMARY OF THE INVENTION
This invention has been accomplished under the aforementioned circumstances, and the objects of this invention is to provide a semiconductor device having a contact structure of high reliability that is formed in an insulating film provided with
contact holes and wiring grooves.
Another object of this invention is to provide a method of manufacturing a semiconductor device having a contact structure of high reliability that is formed in an insulating film provided with contact holes and wiring grooves.
The present inventor has at first found out a method of manufacturing an Al damascene structure or an Al dual damascene structure, which is featured in that an Al film is substituted for an Si film at first, any superfluous portion of the Si film
is allowed to be absorbed by a Ti film during or after the substitution, and reaction products which are high in resistance and formed between the Al film and Ti film or between the Ti film and Si film are removed by means of the CMP method. As matter
of fact, it has been confirmed by the present inventor that the reaction products causing an increase in wire resistance can be easily removed, thus making it possible with this method to lower the resistance of the wiring.
It has been also found out by the present inventor that the aforementioned method is accompanied with various problems as explained below. Namely, the quantity of Si to be substituted becomes excessive depending on the layout of pattern at the
occasion of carrying out the substitution between the Si film and the Al film after the interiors of the wiring groove and contact hole are filled with the Si film.
As a result, a long period of time is required for the substitution, thus lowering the throughput. Furthermore, a Si nodule tends to be partially developed, thus increasing the electric resistance of wiring if the nodule is formed on the wiring. The generation of the Al nodule may become a cause for generating a flaw in the subsequent CMP process. Namely, it has been found that the aforementioned method is accompanied with various problems to be solved before it is put into an actual use.
This invention has been accomplished with a view to solve the aforementioned problems.
[1] Namely, this invention provides; a method of manufacturing semiconductor device which comprises the steps of:
forming an insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the insulating film to a depth reaching to the conductive layer and forming a wiring groove in the insulating film;
forming a substitutive film (a film to be substituted) so as to incompletely fill interiors of the contact hole and the wiring groove, but at least partially filling the interior of contact hole with the substitutive film;
forming a conductive film at a region comprising the contact hole and the wiring groove;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film
to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
It has been also found as a result of studies made by the present inventor that if the quantity of Ti is too large, a void is more likely to be formed in the Al film. This phenomenon can be ascribed to the fact that when the Si filled in the
wiring groove or in the contact hole is absorbed by the upper Ti layer so as to be substituted by Al, a reaction layer formed as a result of reaction of Si with Ti gives a stress to the Al film.
Namely, an AlTi compound layer is formed at the interface of Al/Ti in the heat treatment for effecting the substitution between Si and Al, and at the same time, the Si diffused through the Al film is caused to react with Ti to form a TiSi
compound layer, thus giving rise to the generation of void in the Al film due to stress exerted by the AlTi compound layer and the TiSi compound layer. In particular, the stress gradient that will be given by the AlTi compound to the Al film is
relatively large, so that some measures are required to suppress the formation of the AlTi compound.
The dual damascene structure comprises an Al wiring in the lower layer thereof, so that when the Si filled in the upper wiring groove and contact hole is substituted by Al, the void may be generated in this lower Al wiring layer too. When the
lower wiring is not formed with an Al wiring but with W, the void can be observed in the interior of the upper wiring groove. This pattern dependency of void may be attributed to the phenomenon that the void tends to generate at a location which
minimizes the surface free energy of the void.
The void may become a cause for a disconnection of wiring and for a deterioration of electromigration resistance or stress migration resistance, and hence some measures are required to be taken to solve the
problems in actual use.
Followings are specific embodiments of the afore-mentioned method [1] of manufacturing a semiconductor device.
(a) The wiring groove is formed after the contact hole is formed.
(b) A barrier film or a CMP stopper layer is formed after the contact hole is formed, and then the wiring groove is formed.
(c) The contact hole is formed after the wiring groove is formed.
(d) A barrier film or a CMP stopper layer is formed after the wiring groove is formed, and then the contact hole is formed.
(e) A barrier film or a CMP stopper layer is formed after the contact hole and the wiring groove are formed.
(f) The contact hole and the wiring groove are formed after a barrier film or a CMP stopper layer is formed on the insulating film.
[2] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming a first insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the first insulating film to a depth reaching to the conductive layer;
forming a substitutive film in an interior of contact hole;
forming a second insulating film all over an upper surface of the substrate;
forming a wiring groove in the second insulating film in a manner to connect it with the substitutive film;
forming a conductive film at a region comprising the contact hole and the wiring groove;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film
to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
Followings are specific embodiments of the aforementioned method [2] of manufacturing a semiconductor device.
(a) The contact hole is formed by means of RIE after an RIE stopper layer is formed on the first insulating film.
(b) A barrier film is formed after the contact hole is formed.
[3] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming an insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the insulating film to a depth reaching to the conductive layer;
forming a substitutive film at least in an interior of the contact hole;
forming a wiring groove in the insulating film;
forming a conductive film at a region comprising the contact hole and the wiring groove;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film
to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
Followings are a specific embodiment of the afore-mentioned method [3] of manufacturing a semiconductor device.
a) The contact hole is formed after a CMP stopper layer is formed on the first insulating film.
Followings are specific embodiments of the aforementioned methods [1] to [3] of manufacturing a semiconductor device.
(a) A substitutive film is formed all over the upper surface of the substrate to such a thickness that the substitutive film overflows from the contact hole, and then the substitutive film is etched back so as to selectively leave the
substitutive film in the interior of the contact hole.
(b) A substitutive film is formed by means of a CVD method all over the upper surface of the substrate to such a thickness that the substitutive film overflows from the contact hole, and then the substitutive film is etched back so as to
selectively leave the substitutive film in the interior of the contact hole.
(c) A substitutive film is formed by means of a CVD method all over the upper surface of the substrate to such a thickness that the substitutive film overflows from the contact hole, and then the substitutive film is etched back by means of a CDE
etch-back method, an RIE etch-back method, a CMP method or at least two methods selected from these methods so as to selectively leave the substitutive film in the interior of the contact hole.
(d) The substitutive film is formed by means of a selective CVD method or a plating method.
(e) In subsequent to the formation of the absorption layer, the substrate is subjected to a heat treatment thereby to allow the substitutive film to be substituted by the conductive film and to allow the substitutive film to be absorbed by the
absorption layer.
(f) In simultaneous with the formation of the absorption layer, the substrate is subjected to a heat treatment thereby to allow the substitutive film to be substituted by the conductive film and to allow the substitutive film to be absorbed by
the absorption layer.
(g) The conductive film is formed by means of a sputtering method or a CVD method.
(h) The conductive film is formed by means of a reflow so as to cover a step portion formed by a formation of the wiring groove.
(i) The absorption layer is formed by means of a sputtering method or a CVD method.
(j) The absorption layer is formed without breaking vacuum after the conductive film is formed in a vacuum, or the absorption layer is formed after a native oxide film and/or impurities are removed subsequent to the formation of the conductive
film in a vacuum.
(K) The removal of the absorption layer and the product, and the working of the conductive film are all performed by means of a CMP method, an RIE etch-back method, a CDE etch-back method, a wet etching method or a combination of at least two
methods selected from these methods.
(l) The conductive film is formed of a material which exhibits a lower volume density when it is employed in a form of a non-crystalline structure as compared with when it is employed in a form of a crystalline structure.
(m) The conductive film is formed of a porous crystalline material or an amorphous material.
(n) The conductive film contains at least partially a crystal defect or a region containing a rare gas.
[4] This invention further provides; a semiconductor device which comprises:
a semiconductor substrate provided with a conductive layer;
an insulating film formed on the substrate and having a flat upper surface;
a plug and a wiring formed on the insulating film and filled in interiors of a contact hole connected with the conductive layer and of a wiring groove, respectively; and
a barrier film interposed between a side wall of the contact hole and the conductive layer, between a side wall of the wiring groove and the wiring, and between a bottom of the wiring groove and the wiring.
[5] This invention further provides; a semiconductor device which comprises:
a semiconductor substrate provided with a conductive layer;
an insulating film formed on the substrate and having a flat upper surface;
a plug and a wiring formed on the insulating film and filled in interiors of a contact hole connected with the conductive layer and of a wiring groove, respectively; and
a barrier film interposed between a side wall and bottom of the contact hole and the conductive layer, and between a side wall and bottom of the wiring groove and the wiring.
[6] This invention further provides; a semiconductor device which comprises:
a semiconductor substrate provided with a conductive layer;
an insulating film formed on the substrate and having a flat upper surface;
a plug and a wiring formed on the insulating film and filled in interiors of a contact hole connected with the conductive layer and of a wiring groove, respectively; and
a barrier film interposed between a side wall and bottom of the contact hole and the conductive layer.
[7] This invention further provides; a semiconductor device which comprises:
a semiconductor substrate provided with a conductive layer;
an insulating film formed on the substrate and having a flat upper surface;
a plug and a wiring formed on the insulating film and filled in interiors of a contact hole connected with the conductive layer and of a wiring groove, respectively; and
a barrier film interposed between a side wall and bottom of the wiring groove and the conductive layer.
Followings are specific embodiments of the aforementioned semiconductor devices [4] to [7].
(a) A CMP stopper layer or an insulating barrier film is formed on an entire surface of insulating film excluding a region where the contact hole and the wiring groove are located.
(b) A barrier film is formed on a surface of the wiring.
(c) The conductive layer, the wiring and the plug are all formed of the same material.
(d) The conductive layer, the wiring and the plug are all formed of Al, an Al alloy, Cu or a Cu alloy.
(e) The conductive layer, the wiring and the plug are all formed of Al, an Al alloy, Cu or a Cu alloy, and the barrier film is formed of a refractory metal or a refractory metal compound.
[8] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming an insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the insulating film to a depth reaching to the conductive layer and forming a wiring groove in the insulating film;
forming a substitutive film by means of a CVD method to a thickness which enables it to cover inner surfaces of the contact hole and the wiring groove and to incompletely fill interiors of the contact hole and the wiring groove;
filling almost entirely the interiors of the contact hole and the wiring groove with a conductive film;
forming an absorption layer on the conductive film;
filling the interiors of the contact hole and the wiring groove completely with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film to be absorbed by the absorption layer under a
heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
[9] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming an insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the insulating film to a depth reaching to the conductive layer and forming a wiring groove in the insulating film;
forming a substitutive film by means of a CVD method to a thickness which enables it to cover inner surfaces of the contact hole and the wiring groove and to incompletely fill interiors of the contact hole and the wiring groove;
filling almost entirely the interiors of the contact hole and the wiring groove with a conductive film;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove completely with the conductive film by substituting the conductive film for the substitutive film and by allowing the
substitutive film to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
Followings are specific embodiments of the aforementioned methods [8] and [9] of manufacturing a semiconductor device.
(a) The conductive film is formed by means of a reflow method, a non-selective CVD method, a selective CVD method or a plating method, thereby filling almost entirely the interiors of the contact hole and the wiring groove with the conductive
film.
(b) In subsequent to the formation of the conductive film by means of a sputtering method, the interiors of the contact hole and the wiring groove are filled almost entirely with the conductive film by means of a reflow method which enables the
conductive film to be fluidized with heating.
(c) In subsequent to the formation of the conductive film by means of a sputtering method without heating, the conductive film is additionally formed by means of a sputtering method with heating, and then the interiors of the contact hole and the
wiring groove are filled with the conductive film by means of a two-step reflow method which enables the conductive film to be fluidized.
(d) In subsequent to the formation of the conductive film by means of a directional sputtering method without heating, the conductive film is additionally formed by means of a sputtering method with heating, and then the interiors of the contact
hole and the wiring groove are filled with the conductive film by means of a two-step reflow method which enables the conductive film to be fluidized.
(e) A barrier film is formed after the contact hole and the wiring groove are formed.
[10] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming an insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the insulating film to a depth reaching to the conductive layer and forming a wiring groove in the insulating film;
forming a substitutive film in the interiors of the contact hole and the wiring groove;
removing a native oxide film and/or impurities on a surface of the substitutive film;
forming a conductive film on a region comprising the contact hole and the wiring groove;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film
to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
Followings are specific embodiments of the aforementioned method [10] of manufacturing a semiconductor device.
(a) The native oxide film and/or impurities are removed by means of a wet etching, a physical etching or a chemical etching.
(b) The native oxide film and/or impurities are removed by means of a wet etching, and then the surface of the substitutive film is subjected to a hydrogen termination treatment.
(c) After the native oxide film and/or impurities are removed by means of a physical etching, the substrate is kept in a vacuum until the conductive film is formed.
(d) After the native oxide film and/or impurities are removed by means of a chemical etching, the substrate is kept in a vacuum until the conductive film is formed.
[11] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming an insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the insulating film to a depth reaching to the conductive layer and forming a wiring groove in the insulating film;
forming a substitutive film to such a thickness that the interiors of the contact hole and the wiring groove are filled with the substitutive film and the substitutive film overflows from the contact hole and from the wiring groove;
removing the substitutive film in a vacuum by means of an RIE etch-back method or a CDE etch-back method to such an extent that the substitutive film is left remained at least in the interiors of the contact hole and the wiring groove;
forming a conductive film on a region comprising the contact hole and the wiring groove without breaking vacuum;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film
to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
[12] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming an insulating film on a semiconductor substrate provided with a conductive layer;
forming a contact hole through the insulating film to a depth reaching to the conductive layer and forming a wiring groove in the insulating film;
forming a substitutive film to such a degree that the interiors of the contact hole and the wiring groove are filled with the substitutive film;
forming a conductive film on a region comprising the contact hole and the wiring groove in a heated condition which enables a native oxide film formed on a surface of the substitutive film to be decomposed through a reaction between the
conductive film and the substitutive film during the formation of the conductive film;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film
to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
Followings are a specific embodiment of the afore-mentioned method [12] of manufacturing a semiconductor device.
(a) The conductive film is formed by mean, of a thermal sputtering.
[13] This invention further provides; a method of manufacturing semiconductor device which comprises the steps of:
forming a conductive layer on a semiconductor substrate;
forming an insulating film to cover the conductive layer formed on the substrate;
forming a contact hole through the insulating film to a depth reaching to the conductive layer and forming a wiring groove in the insulating film;
removing a native oxide film and/or impurities on a surface of the substitutive film, which has been exposed at a bottom of the contact hole;
forming a substitutive film at least in the interiors of the contact hole;
forming a conductive film on a region comprising the contact hole and the wiring groove;
forming an absorption layer on the conductive film, and filling the interiors of the contact hole and the wiring groove with the conductive film by substituting the conductive film for the substitutive film and by allowing the substitutive film
to be absorbed by the absorption layer under a heat treatment; and
removing a compound formed in the process of allowing the substitutive film to be absorbed by the absorption layer, and forming a plug comprising the conductive film in the contact hole as well as a wiring comprising the conductive film in the
wiring groove by working the conductive film so as to selectively leave the conductive film in the interiors of the contact hole and the wiring groove.
Followings are specific embodiments of the afore-mentioned method [13] of manufacturing a semiconductor device.
(a) After the native oxide film and/or impurities are removed in a vacuum by means of a physical etching or a chemical etching employing a halogen gas as an etching gas, the substrate is kept in a vacuum until the substitutive film is formed.
(b) After the native oxide film and/or impurities are removed by means of a physical etching or a chemical etching employing a halogen gas as an etching gas, the conductive film is formed by making use of a single-wafer processing type CVD
apparatus, wherein the entire process beginning from the removal of the native oxide film and/or impurities until the formation of the substitutive film is finished is performed in a vacuum so as to prevent a reoxidation of the surface of the conductive
layer.
(c) After the native oxide film and/or impurities are removed by means of a physical etching or a chemical etching employing a halogen gas as an etching gas, the conductive film is formed by making use of a high-speed single-wafer processing type
CVD apparatus, wherein the entire process beginning from the removal of the native oxide film and/or impurities until the formation of the substitutive film is finished is performed in a vacuum so as to prevent a reoxidation of the surface of the
conductive layer.
(d) After the native oxide film and/or impurities are removed by means of a chemical etching employing a halogen gas as an etching gas, the conductive film is formed by making use of a batch type CVD apparatus, wherein the entire process
beginning from the removal of the native oxide film and/or impurities until the formation of the substitutive film is finished is performed in a vacuum so as to prevent a reoxidation of the surface of the conductive layer.
(e) The native oxide film and/or impurities are removed in a vacuum by means of a reduction reaction employing a reducing agent.
(f) After the native oxide film and/or impurities are removed, a barrier film is formed.
[14] This invention further provides; a method of manufacturing semiconductor device which comprises a step of:
substituting a conductive film for a substitutive film in the interior of a contact hole and/or a wiring groove, the conductive film being formed in advance on the substitutive film, rendering the substitutive film to be absorbed by an absorption
layer to form a compound, whereby filling the contact hole and/or the wiring groove with the conductive film; and
wherein the conductive film is formed to have a roughened | | |
