A memory device having a plurality of memory arrays. Each array has a plurality of memory cells, each memory cell including an electrode defining a respective contact area. Each memory array is formed by depositing a continuous chalcogenide layer. This chalcogenide layer, even when continuous, will have active areas formed above the electrodes, and a conductive layer electrically coupling at least a portion of the active areas. The memory array can also include a dielectric volume surrounding at least a portion of the plurality of electrodes. The electrodes can be contacts, plugs or pillars deposited in etched openings in the dielectric volume.
A nonvolatile memory cell occupying a minimum chip area is provided with a cell structure that includes two or more base materials being programmable by a heat induced chemical reaction to form a layer or layers of alloy. The formation of alloy results in a change in resistance of the cell structure so that one or more programmed states are determined. A semiconductor memory constructed by a large number of the nonvolatile memory cells can be obtained in a compact manner with simple and as few as possible steps. This process vertically stacked layers, and this semiconductor memory is thus easily to be combined with other integrated circuits on a single chip.
An electrical and thermal contact which includes an intermediate conductive layer, an insulator component, and a contact layer. The insulator component is fabricated from a thermally insulative material and may be sandwiched between the intermediate conductive layer and the contact layer. The electrical and thermal contact may be fabricated by forming a first thin layer on a surface of the semiconductor device, depositing a dielectric layer adjacent the first thin layer, patterning the dielectric layer to define the insulator component, forming a second thin layer adjacent the insulator component and in partial contact with the first thin layer. The first and second thin layers are respectively patterned to define the intermediate conductive layer and the contact layer. The electrical and thermal contact effectively contains heat within and prevents heat from dissipating from a contacted structure, such as a phase change component that may be switched between two or more electrical states.
An electrical and thermal contact for use in a semiconductor device. The electrical and thermal contact includes an intermediate conductive layer, an insulator component, and a contact layer. The intermediate conductive layer may contact a structure of the semiconductor device. The insulator component, which is fabricated from a thermally and electrically insulative material, may be sandwiched between the intermediate conductive layer and the contact layer, which may substantially envelop the insulator component. The electrical and thermal contact may be fabricated by a process which includes forming a first thin layer on a surface of the semiconductor device, depositing a dielectric layer adjacent the first thin layer, patterning the dielectric layer to define the insulator component, forming a second thin layer adjacent the insulator component and in partial contact with the first thin layer, and patterning the first and second thin layers to define the intermediate conductive layer and the contact layer, respectively. Due to its structure, which requires relatively little electrical current to generate a desired amount of heat, the electrical and thermal contact effectively contains heat within and prevents heat from dissipating from a contacted structure, and is particularly useful for contacting and inducing a change in the electrical conductivity of structures which include phase change materials.
The electrical and thermal contact fabricated by forming a first layer on a surface of a semiconductor device, depositing a dielectric layer adjacent the first layer, patterning the dielectric layer to define an insulator component, and forming a second layer adjacent the insulator component and in partial contact with the first layer. The first layer contacts an adjacent structure of the semiconductor device. The first and second layers may be patterned separately or simultaneously to respectively define an intermediate conductive layer, which communicates with ths contacted structure, and a contact layer. Due to its structure, which requires relatively little electrical current to generate a desired amount of heat, the electrical and thermal contact effectively contains heat within and prevents heat from dissipating from a contacted structure, and is particularly useful for contacting and inducing a change in the electrical conductivity of structures which include phase change materials.
A method for manufacturing the memory device by plasma decomposition of sulfur dioxide. A first copper electrode having a surface is provided. The surface of the first copper electrode may be made amorphous. A copper sulfide layer, Cu.sub.x S, where 1.ltoreq.x.ltoreq.2, is disposed on the copper surface by decomposing sulfur dioxide in an ambient containing excess hydrogen. The copper sulfide layer may be is cuprous sulfide or cupric sulfide. A second copper electrode is coupled to the copper sulfide layer.
