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Method for filling high aspect ratio openings of an integrated circuit to minimize electromigration failure
   
Document Number
US Patent 6077780
Issued Date
June 20, 2000
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Abstract
A method for filling, with a conductive material, a high aspect ratio opening such as a via hole or a trench opening within an integrated circuit minimizes the formation of voids and seams. This conductive material such as copper which fills the high aspect ratio opening is amenable for fine line metallization. The method of the present invention includes steps for enhancing copper plating processes such as copper electroplating or copper electroless plating. This method includes a first step of copper plating for depositing a thin layer of copper within the integrated circuit opening. This thin layer preferably has a thickness on the field regions surrounding the opening that is less than 1/2 of the width of the opening. Then, copper reflow heats this thin deposited copper layer within the opening to minimize the occurrence of any seams within this copper layer. Finally, a second step of copper plating completely fills the integrated circuit opening. This two-step copper plating process with intermittent copper reflow minimizes formation of seams and subsequently minimizes eletromigration failure within filled integrated circuit openings having high aspect ratio.
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Method for filling high aspect ratio openings of an integrated circuit to minimize electromigration failure - US Patent 6077780 Drawing
Drawing from US Patent 6077780
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Number of Claims:
15
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Published
June 20, 2000
Application Number
08/984,352
Filed
December 3, 1997
US Classification
438/687   257/E21.584 257/E21.585 438/627 438/631 438/637 438/675 438/678
Int'l Classification
H01L   21/768   (20060101)   H01L   21/70   (20060101)  
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Assistant Examiner
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USPTO Field of Search
438/464   438/653   438/654   438/660   438/675   438/688   438/909   438/927   438/977   438/614   438/615   438/627   438/631   438/637   438/678   438/687  
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